CXP82600 CMOS 8-bit Single Chip Microcomputer Description The CXP82600 is a CMOS 8-bit single chip microcomputer of piggyback/evaluator combined type, which is developed for evaluating the function of the CXP82612/82616. Piggyback/ evaluator type 80 pin PQFP (Ceramic) Features • A wide instruction set (213 instructions) which cover various types of data. — 16-bit operation/multiplication and division/boolean bit operation instructions • Minimum instruction cycle 400ns at 10MHz operation 122µs at 32kHz operation • Applicable EPROM LCC type 27C128, LCC type 27C256 (Maximum 16K bytes are available.) • Incorporated RAM capacity 448 bytes ( fluorescent display data area included) • Peripheral functions — A/D converter 8-bit, 8-channel, successive approximation method (Conversion time of 32µs/10MHz) — Serial interface Incorporated 8-bit and 8-stage FIFO (Auto transfer for 1 to 8 bytes), 1 circuit 2channels — Timer 8-bit timer, 8-bit timer/counter, 19-bit time base timer, 32kHz timer/counter — Fluorescent display panel controller/driver Maximum 336 segments display possible 1 to 16-digit dynamic display Dimmer function High voltage drive output (40V) On-chip pull-down resistor (Mask option) Hardware key scan function (Maximum 8 × 16 key matrix compatible.) — Remote control receiving circuit 8-bit pulse measurement counter with on-chip 6-stage FIFO • Interruption 13 factors, 13 vectors, multi-interruption possible • Standby mode SLEEP/STOP • Package 80-pin ceramic PQFP Note) Mask option depends on the type of the CXP82600. Refer to the Products List for details. Structure Silicon gate CMOS IC Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E94X10-PP CXP82600 T5 T4 T3 T2 T1 T0 VFDP VDD PH3/TX PH2/TEX NC PH1 PH0 PE0/EC/INT0 PE1/INT1 PE2/INT2 Pin Assigument in Piggyback Mode 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 3 62 T8/S28 PE6 4 61 T9/S27 PE7/TO/ADJ 5 60 T10/S26 PB0/CS1 6 59 T11/S25 PB1/CS0 7 58 T12/S24 57 T13/S23 56 T14/S22 55 T15/S21 54 S20 53 S19 52 S18 51 S17 50 S16 49 PF7/S15 48 PF6/S14 PB2/SCK0 8 PB3/SI0 9 PB4/SO0 10 PB5/SCK1 11 PB6/SI1 PB7/SO1 12 13 PC0/KR0 14 PC1/KR1 15 PC2/KR2 PC3/KR3 4 16 17 NC 2 3 A13 T7 PE5 A14 PE4/RMC VDD T6 63 A15 64 2 A12 1 A7 PE3/INT3/NMI 1 32 31 30 A6 5 29 A8 A5 6 28 A9 A4 7 27 A11 A3 8 26 NC A2 9 25 OE A1 10 24 A10 A0 11 23 CE NC 12 22 D7 D0 13 21 D6 14 15 16 17 18 19 20 20 45 PF3/S11 PC7/KR7 21 44 PF2/S10 PA0/AN0 22 43 PF1/S9 PA1/AN1 23 42 PF0/S8 PA2/AN2 24 41 PD7/S7 NC D5 PC6/KR6 D4 PF4/S12 D3 PF5/S13 46 GND 47 19 D2 18 PC5/KR5 D1 PC4/KR4 Note) PD6/S6 PD5/S5 PD4/S4 PD3/S3 PD2/S2 PD1/S1 PD0/S0 VSS XTAL EXTAL RST PA7/AN7 PA6/AN6 PA5/AN5 PA4/AN4 PA3/AN3 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 1. NC (Pin 75) is always connected to VDD. 2. PH3/TX (Pin 73) is input port during port selection; oscillation output during oscillation selection. –2– CXP82600 T5 T4 T3 T2 T1 T0 VFDP VDD PH3/TX PH2/TEX NC PH1 PH0 PE0/EC/INT0 PE1/INT1 PE2/INT2 Pin Assigument in Evaluator Mode 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 PE4/RMC 2 63 T7 PE5 3 62 T8/S28 PE6 4 61 T9/S27 PE7/TO/ADJ 5 60 T10/S26 PB0/CS1 6 59 T11/S25 PB1/CS0 7 58 T12/S24 PB2/SCK0 8 57 T13/S23 56 T14/S22 55 T15/S21 54 S20 53 S19 52 S18 51 S17 50 S16 49 PF7/S15 48 PF6/S14 PB3/SI0 PB4/SO0 PB5/SCK1 PB6/SI1 PB7/SO1 PC0/KR0 PC1/KR1 PC2/KR2 9 10 11 12 13 14 15 16 2 1 32 31 30 A13 3 A14 4 VDD NC T6 A15 64 A12 1 A7/D7 PE3/INT3/NMI A6/D6 5 29 A8 A5/D5 6 28 A9 A4/D4 7 27 A11 A3/D3 8 26 NC A2/D2 9 25 HALT A1/D1 10 24 A10 A0/D0 11 23 E/P NC 12 22 I/T RD 13 21 MON PC3/KR3 17 PC4/KR4 18 47 PF5/S13 PC5/KR5 19 46 PF4/S12 PC6/KR6 20 45 PF3/S11 PC7/KR7 21 44 PF2/S10 PA0/AN0 22 43 PF1/S9 PA1/AN1 23 42 PF0/S8 PA2/AN2 24 41 PD7/S7 RST C1 C2 NC GND SYNC WR 14 15 16 17 18 19 20 Note) PD6/S6 PD5/S5 PD4/S4 PD3/S3 PD2/S2 PD1/S1 PD0/S0 VSS XTAL EXTAL RST PA7/AN7 PA6/AN6 PA5/AN5 PA4/AN4 PA3/AN3 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 1. NC (Pin 75) is always connected to VDD. 2. PH3/TX (Pin 73) is input port during port selection; oscillation output during oscillation selection. –3– CXP82600 EPROM Read Timing (Ta = –20 to +75°C, VDD = 4.5 to 5.5V, VSS = 0V reference) Item Symbol Pin Min. Address → data input delay time tACC A0 to A15 D0 to D7 Address → data hold time tIH A0 to A15 D0 to D7 Max. Unit 120 ns ns 0 0.8VDD A0 to A15 Address data 0.2VDD tACC tIH 0.8VDD D0 to D7 Input data 0.2VDD Products List Products Option item Package Mask product Piggyback/evaluator product CXP82612 CXP82616 80-pin plastic QFP CXP82600-U01Q 80-pin ceramic PQFP ROM capacity 12Kbytes 16Kbytes Pull-up resistance for reset pin Existent/Non-existent Existent Pull-down resistor for high voltage drive pin Existent/Non-existent Only port for display –4– EPROM 16Kbytes CXP82600 Piggyback mode/evaluator mode can be switched as shown below. Piggyback mode Piggyback/evaluator product Evaluator mode Pin 1 marking Pin 1 index LCC type EPROM Pin 1 marking Note) CPU probe Note) Evaluation cap should be connected to CPU probe. Package Outline Unit: mm 80PIN PQFP (CERAMIC) PIN No. 1 INDEX 18.7 16.3 ± 0.2 INDEX 80 65 65 64 PIN No. 1 INDEX 1 64 0.8 ± 0.05 1 80 0.4 ± 0.08 14.22 18.12 ± 0.2 1.27 ± 0.13 12.02 0.7 1.0 0.3 6.0 24 40 9.48 24 41 1.3 ± 0.3 41 25 40 25 0.6 11.66 15.58 ± 0.2 PACKAGE STRUCTURE PACKAGE MATERIAL + 0.05 0.15 – 0.02 9.59 MAX –5– CERAMIC SONY CODE PQFP-80C-L01 LEAD TREATMENT GOLD PLATING EIAJ CODE AQFP080-C-0000-A LEAD MATERIAL 42 ALLOY PACKAGE WEIGHT 5.7g JEDEC CODE 3.57 ± 0.36 24.7 22.3 ± 0.25 4.5