TL080 JFET-INPUT OPERATIONAL AMPLIFIER SLOS368 – JUNE 2001 D D D D D D D D D D P PACKAGE (TOP VIEW) Low Power Consumption Wide Common-Mode and Differential Voltage Ranges Low Input Bias and Offset Currents Output Short-Circuit Protection Low Total Harmonic Distortion . . . 0.003% Typ High Input Impedance . . . JFET Input Stage N1/COMP IN– IN+ VCC 1 8 2 7 3 6 4 5 COMP VCC+ OUT OFFSET N2 External Frequency Compensation Common-Mode Input Voltage Range Includes VCC+ Latch-Up-Free Operation High Slew Rate . . . 13 V/µs Typ description The TL080 JFET-input operational amplifier incorporates well-matched, high-voltage JFET and bipolar transistors in an integrated circuit. This device features high slew rates, low input bias and offset currents, and a low offset-voltage temperature coefficient. Offset adjustment and external-compensation options are available. The TL080C is characterized for operation from 0°C to 70°C. AVAILABLE OPTIONS PACKAGE TA VIOmax AT 25°C PLASTIC DIP (P) 0°C to 70°C 10 mV TL080CP Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2001, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 TL080 JFET-INPUT OPERATIONAL AMPLIFIER SLOS368 – JUNE 2001 schematic VCC+ IN+ 7 3 2 64 Ω IN– 128 Ω 6 OUT N1/COMP OFFSET N2 64 Ω 1 5 8 COMP 1080 Ω VCC– 4 ÌÌÌ 1080 Ω All component values shown are nominal. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TL080 JFET-INPUT OPERATIONAL AMPLIFIER SLOS368 – JUNE 2001 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage (see Note 1): VCC+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V VCC– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –18 V Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±30 V Input voltage, VI (see Notes 1 and 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±15 V Duration of short-circuit current (see Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Unlimited Package thermal impedance, θJA (see Notes 5 and 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85°C/W Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VCC+ and VCC–. 2. Differential voltages are at IN+ with respect to IN–. 3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less. 4. The output can be shorted to ground or to either supply. Temperature and/or supply voltages must be limited to ensure that the dissipation rating is not exceeded. 5. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can impact reliability. 6. The package thermal impedance is calculated in accordance with JESD 51-7. electrical characteristics, VCC± = ±15 V (unless otherwise noted) PARAMETER TEST CONDITIONS VIO Input offset voltage VO = 0 0, RS = 50 Ω aV Temperature coefficient of input offset voltage VO = 0, RS = 50 Ω IO IIO Input offset current‡ VO = 0 IIB Input bias current‡ VICR Common-mode input voltage range VOM Maximum peak output voltage swing TA† 25°C MIN TYP MAX 3 15 Full range 20 5 200 pA 2 nA 30 400 pA 10 nA Full range 25°C ±11 –12 to 15 25°C ±12 ±13.5 Full range RL ≥ 2 kΩ VO = ±10 V, V RL ≥ 2 kΩ V ±10 ±12 25 200 Full range 15 Large signal differential voltage amplification Large-signal B1 ri Unity-gain bandwidth 25°C Input resistance 25°C CMRR Common-mode rejection ratio VIC = VICRmin, VO = 0, RS = 50 Ω kSVR Supply-voltage rejection ratio (∆VCC±/∆VIO) VCC = ±15 V to ±9 V, VO = 0, RS = 50 Ω 25°C ICC VO1/VO2 Supply current VO = 0, 25°C V ±12 25°C AVD No load µV/°C 18 25°C 25°C RL = 10 kΩ RL ≥ 10 kΩ mV Full range Full range VO = 0 UNIT V/mV 3 1012 MHz Ω 25°C 70 86 dB 70 86 dB 1.4 2.8 mA Crosstalk attenuation AVD = 100 25°C 120 dB † All characteristics are measured under open-loop conditions with zero common-mode voltage unless otherwise specified. Full range for TA is –40°C to 85°C. ‡ Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive, as shown in Figure 5. Pulse techniques must be used that will maintain the junction temperature as close to the ambient temperature as possible. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 TL080 JFET-INPUT OPERATIONAL AMPLIFIER SLOS368 – JUNE 2001 operating characteristics, VCC± = ±15 V, TA = 25°C PARAMETER TEST CONDITIONS SR Slew rate at unity gain VI = 10 V, RL = 2 kΩ, CL = 100 pF, See Figure 1 tr Rise time overshoot factor Rise-time VI = 20 mV, mV RL = 2 kΩ kΩ, CL = 100 pF pF, See Figure 1 Vn Equivalent input noise voltage RS = 100 Ω In Equivalent input noise current RS = 100 Ω, f = 1 kHz THD Total harmonic distortion VO(rms) = 10 V, RS ≤ 1 kΩ, MIN TYP 8 13 MAX V/µs µs 0.05 20% f = 1 kHz 18 nV/√Hz 4 µV f = 10 Hz to 10 kHz 0.01 RL ≥ 2 kΩ, UNIT f = 1 kHz pA/√Hz 0.003% APPLICATION INFORMATION _ 10 kΩ OUT 1 kΩ – VI + OUT CL = 100 pF RL = 2 kΩ + VI RL CC = 18 pF Figure 1. Unity-Gain Amplifier CL = 100 pF Figure 2. Gain-of-10 Inverting Amplifier 100 kΩ VCC+ C2 1 MΩ C1 = 500 pF 2 MΩ N2 CC N1 IN– – OUT – IN– COMP OUT + Figure 3. Feed-Forward Compensation POST OFFICE BOX 655303 + IN+ 4 N1 Figure 4. Input Offset Voltage Null Circuit • DALLAS, TEXAS 75265 TL080 JFET-INPUT OPERATIONAL AMPLIFIER SLOS368 – JUNE 2001 TYPICAL CHARACTERISTICS Table of Graphs FIGURE Maximum peak output voltage vs Frequency vs Free-air temperature vs Load resistance vs Supply voltage 5, 6, 7 8 9 10 Large signal differential voltage amplification Large-signal vs Free-air temperature vs Frequency 11 12 Differential voltage amplification vs Frequency 13 Total power dissipation vs Free-air temperature 14 ICC Supply current vs Free-air temperature vs Supply voltage 14 15 IIB Input bias current vs Free-air temperature 16 VOM AVD PD Large-signal pulse response vs Time 17 VO CMRR Output voltage vs Elapsed time 18 Common-mode rejection ratio vs Free-air temperature 19 Vn THD Equivalent input noise voltage vs Frequency 20 Total harmonic distortion vs Frequency 21 MAXIMUM PEAK OUTPUT VOLTAGE vs FREQUENCY MAXIMUM PEAK OUTPUT VOLTAGE vs FREQUENCY ± 15 VCC ± = ± 15 V RL = 10 kΩ TA = 25°C See Figure 2 ± 12.5 ± 10 VCC ± = ± 10 V ± 7.5 VCC ± = ± 5 V ±5 ± 2.5 VOM – Maximum Peak Output Voltage – V VOM – Maximum Peak Output Voltage – V ± 15 RL = 2 kΩ TA = 25°C See Figure 2 VCC ± = ± 15 V ± 12.5 ± 10 VCC ± = ± 10 V ± 7.5 ±5 VCC ± = ± 5 V ± 2.5 0 0 100 1k 10 k 100 k 1M 10 M 100 f – Frequency – Hz 1k 10 k 100 k 1M 10 M f – Frequency – Hz Figure 5 Figure 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 TL080 JFET-INPUT OPERATIONAL AMPLIFIER SLOS368 – JUNE 2001 TYPICAL CHARACTERISTICS MAXIMUM PEAK OUTPUT VOLTAGE vs FREQUENCY MAXIMUM PEAK OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE TA = 25°C ± 12.5 ± 10 TA = – 55°C ± 7.5 ±5 TA = 125°C ± 2.5 0 10 k 40 k 100 k 400 k 1M 4M ÌÌÌÌÌ ÌÌÌÌ ±15 VCC ± = ± 15 V RL = 2 kΩ See Figure 2 VOM – Maximum Peak Output Voltage – V VOM – Maximum Peak Output Voltage – V ± 15 RL = 10 kΩ ±12.5 RL = 2 kΩ ±10 ±7.5 ±5 ±2.5 ÌÌÌÌÌ ÌÌÌÌÌ VCC± = ±15 V See Figure 2 0 –75 10 M –50 –25 Figure 7 50 75 100 125 Figure 8 MAXIMUM PEAK OUTPUT VOLTAGE vs SUPPLY VOLTAGE MAXIMUM PEAK OUTPUT VOLTAGE vs LOAD RESISTANCE ± 15 ± 15 VCC ± = ± 15 V TA = 25°C See Figure 2 ± 12.5 VOM – Maximum Peak Output Voltage – V VOM – Maximum Peak Output Voltage – V 25 TA – Free-Air Temperature – °C f – Frequency – Hz RL = 10 kΩ TA = 25°C ± 12.5 ± 10 ± 7.5 ±5 ± 2.5 0 ± 10 ± 7.5 ±5 ± 2.5 0 0.1 0.2 0.4 0.7 1 2 4 7 10 0 2 4 6 8 Figure 10 Figure 9 POST OFFICE BOX 655303 10 12 | VCC ± | – Supply Voltage – V RL – Load Resistance – kΩ 6 0 • DALLAS, TEXAS 75265 14 16 TL080 JFET-INPUT OPERATIONAL AMPLIFIER SLOS368 – JUNE 2001 1000 400 200 100 40 20 10 ÌÌÌÌÌ ÌÌÌÌÌ 4 2 1 –75 VCC± = ±15 V VO = ±10 V RL = 2 kΩ –50 –25 0 25 50 75 100 125 TA – Free-Air Temperature – °C 106 LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE SHIFT vs FREQUENCY ÌÌÌÌÌÌÌ ÌÌÌÌÌÌÌ ÌÌÌÌÌÌÌ ÌÌÌÌÌ ÌÌÌÌÌ ÌÌÌÌÌ ÌÌÌÌ ÌÌÌÌ VCC± = ±5 V to ±15 V RL = 2 kΩ TA = 25°C 105 104 Differential Voltage Amplification (left scale) 103 102 Phase Shift (right scale) 101 1 1 10 100 10 k 100 k 1M 45° 90° 135° 180° 10 M f – Frequency – Hz Figure 11 Figure 12 DIFFERENTIAL VOLTAGE AMPLIFICATION vs FREQUENCY WITH FEED-FORWARD COMPENSATION SUPPLY CURRENT PER AMPLIFIER vs FREE-AIR TEMPERATURE 106 2.0 VCC ± = ± 15 V C2 = 3 pF TA = 25°C See Figure 3 105 104 103 102 VCC ± = ± 15 V No Signal No Load 1.8 I CC ± – Supply Current – mA AVD – Differential Voltage Amplification – V/mV 1k 0° Phase Shift LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION vs FREE-AIR TEMPERATURE A VD – Large-Signal Differential Voltage Amplification – V/mV A VD – Large-Signal Differential Voltage Amplification – V/mV TYPICAL CHARACTERISTICS 1.6 1.4 1.2 1.0 0.8 0.6 0.4 10 0.2 1 100 1k 10 k 100 k 1M 10 M 0 –75 – 50 – 25 0 25 50 75 100 125 TA – Free-Air Temperature – °C f – Frequency – Hz Figure 13 Figure 14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 TL080 JFET-INPUT OPERATIONAL AMPLIFIER SLOS368 – JUNE 2001 TYPICAL CHARACTERISTICS INPUT BIAS CURRENT vs FREE-AIR TEMPERATURE SUPPLY CURRENT vs SUPPLY VOLTAGE 100 2.0 1.6 I IB – Input Bias Current – nA I CC ± – Supply Current – mA V CC ± = ± 15 V TA = 25°C No Signal No Load 1.8 1.4 1.2 1.0 0.8 0.6 10 1 0.1 0.4 0.2 0.01 – 50 0 0 2 4 6 8 10 12 14 16 – 25 0 | VCC ± | – Supply Voltage – V Figure 15 50 75 100 125 Figure 16 OUTPUT VOLTAGE vs ELAPSED TIME VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE 6 28 VCC ± = ± 15 V RL = 2 k Ω CL = 100 pF TA = 25°C 4 24 VO – Output Voltage – mV Input and Output Voltages – V 25 TA – Free-Air Temperature – °C Output 2 0 –2 Input 20 16 VCC ± = ± 15 V RL = 2 k Ω CL = 100 pF TA = 25°C See Figure 1 12 8 4 –4 0 –6 –4 0 0.5 1 1.5 2 2.5 3 3.5 0 t – Time – µ s Figure 17 8 0.2 0.4 0.6 t – Elapsed Time – µ s Figure 18 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 0.8 1.0 1.2 TL080 JFET-INPUT OPERATIONAL AMPLIFIER SLOS368 – JUNE 2001 TYPICAL CHARACTERISTICS EQUIVALENT INPUT NOISE VOLTAGE vs FREQUENCY COMMON-MODE REJECTION RATIO vs FREE-AIR TEMPERATURE 50 Vn – Equilvalent Input Noise Voltage – nV/ Hz VCC ± = ± 15 V RL = 10 kΩ 88 87 86 85 84 83 – 75 VCC ± = ± 15 V AVD = 10 RS = 100Ω TA = 25°C 40 30 20 10 0 – 50 – 25 0 25 50 75 100 125 10 40 100 TA – Free-Air Temperature – °C 400 1 k 4 k 10 k 40 k 100 k f – Frequency – Hz Figure 19 Figure 20 TOTAL HARMONIC DISTORTION vs FREQUENCY 1 VCC ± = ± 15 V AVD = 1 VI(RMS) = 6 V TA = 25°C 0.4 THD – Total Harmonic Distortion – % CMRR – Common-Mode Rejection Ratio – dB 89 0.1 0.04 0.01 0.004 0.001 100 400 1k 4k 10 k 40 k 100 k f – Frequency – Hz Figure 21 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 TL080 JFET-INPUT OPERATIONAL AMPLIFIER SLOS368 – JUNE 2001 APPLICATION INFORMATION 220 kΩ 0.00375 µF 10 kΩ 0.01 µF 0.003 µF 0.03 µF 27 kΩ MIN VCC+ 100 Ω – TL080 + 1 µF Input 100 Ω + 75 µF 47 kΩ 10 pF 3.3 kΩ 10 kΩ 0.003 µF 5 kΩ + Gain 47 µF – TL080 + VCC– 10 pF 50 pF POST OFFICE BOX 655303 VCC+ 68 kΩ Figure 22. IC Preamplifier 10 MIN 100 kΩ Treble MAX 0.03 µF VCC– Balance 10 kΩ 100 kΩ Bass MAX • DALLAS, TEXAS 75265 Output PACKAGE OPTION ADDENDUM www.ti.com 27-Feb-2006 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TL080CP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TL080CPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TL080IP OBSOLETE PDIP P 8 TBD Call TI Lead/Ball Finish MSL Peak Temp (3) Call TI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 MECHANICAL DATA MPDI001A – JANUARY 1995 – REVISED JUNE 1999 P (R-PDIP-T8) PLASTIC DUAL-IN-LINE 0.400 (10,60) 0.355 (9,02) 8 5 0.260 (6,60) 0.240 (6,10) 1 4 0.070 (1,78) MAX 0.325 (8,26) 0.300 (7,62) 0.020 (0,51) MIN 0.015 (0,38) Gage Plane 0.200 (5,08) MAX Seating Plane 0.010 (0,25) NOM 0.125 (3,18) MIN 0.100 (2,54) 0.021 (0,53) 0.015 (0,38) 0.430 (10,92) MAX 0.010 (0,25) M 4040082/D 05/98 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001 For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. 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