FAIRCHILD IRFW/IZ44A

$GYDQFHG 3RZHU 026)(7
IRFW/IZ44A
FEATURES
BVDSS = 60 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.024Ω
♦ Lower Input Capacitance
♦ Improved Gate Charge
ID = 50 A
♦ Extended Safe Operating Area
♦ 175°C Operating Temperature
D2-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 60V
♦ Lower RDS(ON): 0.020Ω (Typ.)
I2-PAK
2
1
1
2
3
3
1. Gate 2. Drain 3. Source
Absolute Maximum Ratings
Symbol
VDSS
ID
Characteristic
Value
Drain-to-Source Voltage
60
Continuous Drain Current (TC=25°C)
50
Continuous Drain Current (TC=100°C)
35.4
Units
V
A
IDM
Drain Current-Pulsed
VGS
Gate-to-Source Voltage
±20
V
EAS
Single Pulsed Avalanche Energy
(2)
857
mJ
A
A
200
(1)
IAR
Avalanche Current
(1)
50
EAR
Repetitive Avalanche Energy
(1)
12.6
mJ
dv/dt
Peak Diode Recovery dv/dt
(3)
5.5
V/ns
Total Power Dissipation (TA=25°C) *
3.8
W
Total Power Dissipation (TC=25°C)
126
W
Linear Derating Factor
0.84
W/°C
PD
TJ , TSTG
TL
Operating Junction and
- 55 to +175
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
300
Purposes, 1/8 from case for 5-seconds
Thermal Resistance
Symbol
RθJC
Characteristic
Typ.
Max.
Junction-to-Case
--
1.19
RθJA
Junction-to-Ambient *
--
40
RθJA
Junction-to-Ambient
--
62.5
Units
°C/W
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B
©1999 Fairchild Semiconductor Corporation
1&+$11(/
32:(5 026)(7
IRFW/IZ44A
Electrical Characteristics (TC=25°C unless otherwise specified)
Characteristic
Min. Typ. Max. Units
BVDSS
Drain-Source Breakdown Voltage
60
--
--
∆BV/∆TJ
Breakdown Voltage Temp. Coeff.
--
0.063
--
VGS(th)
IGSS
IDSS
RDS(on)
Gate Threshold Voltage
2.0
--
4.0
Gate-Source Leakage , Forward
--
--
100
Gate-Source Leakage , Reverse
--
--
-100
--
--
10
Drain-to-Source Leakage Current
Static Drain-Source
On-State Resistance
--
--
100
--
--
0.024
--
gfs
Forward Transconductance
--
32.6
Ciss
Input Capacitance
--
1770 2300
Coss
Output Capacitance
--
590
680
Crss
Reverse Transfer Capacitance
--
220
255
td(on)
Turn-On Delay Time
--
20
40
Rise Time
--
16
40
Turn-Off Delay Time
--
68
140
Fall Time
--
70
140
Qg
Total Gate Charge
--
64
83
Qgs
Gate-Source Charge
--
12.3
--
Qgd
Gate-Drain ( Miller ) Charge
--
23.6
--
tr
td(off)
tf
V
Test Condition
VGS=0V,ID=250µA
V/°C ID=250µA
V
nA
µA
Ω
Ω
Symbol
pF
See Fig 7
VDS=5V,ID=250µA
VGS=20V
VGS=-20V
VDS=60V
VDS=48V,TC=150°C
VGS=10V,ID=25A
(4)
VDS=30V,ID=25A
(4)
VGS=0V,VDS=25V,f =1MHz
See Fig 5
VDD=30V,ID=50A,
ns
RG=9.1Ω
See Fig 13
(4) (5)
VDS=48V,VGS=10V,
nC
ID=50A
See Fig 6 & Fig 12 (4) (5)
Source-Drain Diode Ratings and Characteristics
Symbol
Characteristic
Min. Typ. Max. Units
Test Condition
IS
Continuous Source Current
--
--
50
ISM
Pulsed-Source Current
(1)
--
--
200
VSD
Diode Forward Voltage
(4)
--
--
1.8
V
TJ=25°C,IS=50A,VGS=0V
trr
Reverse Recovery Time
--
85
--
ns
TJ=25°C,IF=50A
Qrr
Reverse Recovery Charge
--
0.24
--
µC
diF/dt=100A/µs
A
Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=0.4mH, IAS=50A, VDD=25V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 50A, di/dt ≤ 350A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
Integral reverse pn-diode
in the MOSFET
(4)
1&+$11(/
32:(5 026)(7
IRFW/IZ44A
Fig 1. Output Characteristics
Fig 2. Transfer Characteristics
VGS
15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
ID , Drain Current [A]
ID , Drain Current [A]
102
Top :
102
101
@ Notes :
1. 250 µs Pulse Test
2. TC = 25 oC
100 -1
10
0
175 oC
100
@ Notes :
1. VGS = 0 V
2. VDS = 30 V
3. 250 µs Pulse Test
25 oC
- 55 oC
10-1
1
10
101
10
2
4
6
8
10
VGS , Gate-Source Voltage [V]
VDS , Drain-Source Voltage [V]
Fig 3. On-Resistance vs. Drain Current
Fig 4. Source-Drain Diode Forward Voltage
IDR , Reverse Drain Current [A]
RDS(on) , [ Ω ]
Drain-Source On-Resistance
0.04
VGS = 10 V
0.03
0.02
VGS = 20 V
0.01
@ Note : TJ = 25 oC
0.00
0
102
101
@ Notes :
1. VGS = 0 V
2. 250 µs Pulse Test
175 oC
25 oC
0
40
80
120
160
200
10
0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0
240
ID , Drain Current [A]
VSD , Source-Drain Voltage [V]
Fig 5. Capacitance vs. Drain-Source Voltage
Fig 6. Gate Charge vs. Gate-Source Voltage
3500
2100
C iss
C oss
1400
@ Notes :
1. VGS = 0 V
2. f = 1 MHz
C rss
700
00
10
1
10
VDS , Drain-Source Voltage [V]
10
VGS , Gate-Source Voltage [V]
Capacitance [pF]
2800
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd
Crss= Cgd
VDS = 12 V
VDS = 30 V
VDS = 48 V
5
@ Notes : ID = 50.0 A
0
0
10
20
30
40
50
QG , Total Gate Charge [nC]
60
70
1&+$11(/
32:(5 026)(7
IRFW/IZ44A
Fig 7. Breakdown Voltage vs. Temperature
Fig 8. On-Resistance vs. Temperature
2.5
RDS(on) , (Normalized)
Drain-Source On-Resistance
BVDSS , (Normalized)
Drain-Source Breakdown Voltage
1.2
1.1
1.0
0.9
0.8
-75
@ Notes :
1. VGS = 0 V
2. ID = 250 µA
-50
-25
0
25
50
75
100
125
150
175
2.0
1.5
1.0
@ Notes :
1. VGS = 10 V
2. ID =25 A
0.5
-75
200
-50
-25
o
0
25
50
75
100
125
150
175
200
TJ , Junction Temperature [oC]
TJ , Junction Temperature [ C]
Fig 9. Max. Safe Operating Area
Fig 10. Max. Drain Current vs. Case Temperature
60
ID , Drain Current [A]
Operation in This Area
is Limited by R DS(on)
10 µs
2
10
100 µs
1 ms
10 ms
101
DC
@ Notes :
1. TC = 25 oC
100
10-1 0
10
50
40
30
20
10
2. TJ = 175 oC
3. Single Pulse
101
0
25
102
50
75
100
125
Tc , Case Temperature [oC]
VDS , Drain-Source Voltage [V]
Thermal Response
Fig 11. Thermal Response
100
D=0.5
@ Notes :
1. Zθ J C (t)=1.19 o C/W Max.
2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
0.2
10- 1
0.1
0.05
0.02
0.01
PDM
t1
single pulse
t2
θ
Z JC(t) ,
ID , Drain Current [A]
103
10- 2 - 5
10
10- 4
10- 3
10- 2
10- 1
t1 , Square Wave Pulse Duration
100
[sec]
101
150
175
1&+$11(/
32:(5 026)(7
IRFW/IZ44A
Fig 12. Gate Charge Test Circuit & Waveform
Current Regulator
VGS
Same Type
as DUT
50kΩ
Qg
200nF
12V
10V
300nF
VDS
Qgs
VGS
Qgd
DUT
3mA
R1
R2
Current Sampling (IG)
Resistor
Charge
Current Sampling (ID)
Resistor
Fig 13. Resistive Switching Test Circuit & Waveforms
RL
Vout
Vout
90%
VDD
Vin
( 0.5 rated VDS )
RG
DUT
Vin
10%
10V
tr
td(on)
td(off)
t on
tf
t off
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
BVDSS
1
EAS = ---- LL IAS2 -------------------2
BVDSS -- VDD
LL
VDS
Vary tp to obtain
required peak ID
BVDSS
IAS
ID
RG
C
DUT
ID (t)
VDD
VDS (t)
VDD
10V
tp
tp
Time
1&+$11(/
32:(5 026)(7
IRFW/IZ44A
Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
+
VDS
--
IS
L
Driver
VGS
RG
VGS
VGS
( Driver )
Same Type
as DUT
VDD
dv/dt controlled by RG
IS controlled by Duty Factor D
Gate Pulse Width
D = -------------------------Gate Pulse Period
10V
IFM , Body Diode Forward Current
IS
( DUT )
di/dt
IRM
Body Diode Reverse Current
VDS
( DUT )
Body Diode Recovery dv/dt
Vf
Body Diode
Forward Voltage Drop
VDD
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
TinyLogic™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.