FAIRCHILD IRLW/I520A

IRLW/I520A
Advanced Power MOSFET
FEATURES
BVDSS = 100 V
■ Avalanche Rugged Technology
RDS(on) = 0.22 Ω
■ Rugged Gate Oxide Technology
■ Lower Input Capacitance
ID = 9.2 A
■ Improved Gate Charge
■ Extended Safe Operating Area
I2-PAK
D2-PAK
■ 175℃ Operating Temperature
■ Lower Leakage Current : 10 μA (Max.) @ VDS = 100V
2
■ Lower RDS(ON) : 0.176 Ω (Typ.)
1
1
2
3
3
1. Gate 2. Drain 3. Source
Absolute Maximum Ratings
Symbol
VDSS
ID
Characteristic
Value
Drain-to-Source Voltage
100
Continuous Drain Current (TC=25℃)
9.2
Continuous Drain Current (TC=100℃)
6.5
①
Units
V
A
IDM
Drain Current-Pulsed
VGS
Gate-to-Source Voltage
±20
V
EAS
Single Pulsed Avalanche Energy
②
112
mJ
IAR
Avalanche Current
①
9.2
A
EAR
Repetitive Avalanche Energy
①
4.9
mJ
dv/dt
Peak Diode Recovery dv/dt
③
6.5
V/ns
3.8
W
32
Total Power Dissipation (TA=25℃) *
PD
Total Power Dissipation (TC=25℃)
Linear Derating Factor
TJ , TSTG
TL
Operating Junction and
A
49
W
0.33
W/℃
- 55 to +175
Storage Temperature Range
℃
Maximum Lead Temp. for Soldering
300
Purposes, 1/8” from case for 5-seconds
Thermal Resistance
Symbol
Characteristic
Typ.
Max.
RθJC
Junction-to-Case
--
3.04
RθJA
Junction-to-Ambient *
--
40
RθJA
Junction-to-Ambient
--
62.5
Units
℃/W
* When mounted on the minimum pad size recommended (PCB Mount).
1
N-CHANNEL
POWER MOSFET
IRLW/I520A
Electrical Characteristics (TC=25℃ unless otherwise specified)
Symbol
Characteristic
Min. Typ. Max. Units
BVDSS
Drain-Source Breakdown Voltage
ΔBV/ΔTJ Breakdown Voltage Temp. Coeff.
VGS(th)
Gate Threshold Voltage
IDSS
RDS(on)
--
--
V
--
0.1
--
V/℃
1.0
--
2.0
V
Gate-Source Leakage , Forward
--
--
100
Gate-Source Leakage , Reverse
--
--
-100
--
--
10
Drain-to-Source Leakage Current
Static Drain-Source
On-State Resistance
VGS=20V
VGS=-20V
VDS=100V
VDS=80V,TC=150℃
100
--
--
0.22
Ω
VGS=5V,ID=4.6A
--
VDS=40V,ID=4.6A
--
7.7
Ciss
Input Capacitance
--
340 440
Coss
Output Capacitance
--
90
115
Crss
Reverse Transfer Capacitance
--
39
50
td(on)
Turn-On Delay Time
--
5
20
Rise Time
--
10
30
Turn-Off Delay Time
--
19
50
Fall Time
--
9
30
Qg
Total Gate Charge
--
10.2
15
Qgs
Gate-Source Charge
--
1.7
--
Qgd
Gate-Drain("Miller") Charge
--
6.0
--
tf
VDS=5V,ID=250μA
--
Forward Transconductance
td(off)
μA
See Fig 7
--
gfs
tr
nA
VGS=0V,ID=250μA
ID=250μA
Ω
IGSS
100
Test Condition
pF
④
④
VGS=0V,VDS=25V,f =1MHz
See Fig 5
VDD=50V,ID=9.2A,
ns
RG=9Ω
See Fig 13
④⑤
VDS=80V,VGS=5V,
nC
ID=9.2A
See Fig 6 & Fig 12 ④ ⑤
Source-Drain Diode Ratings and Characteristics
Symbol
Characteristic
Min. Typ. Max. Units
IS
Continuous Source Current
--
--
ISM
Pulsed-Source Current
①
--
--
32
VSD
Diode Forward Voltage
④
--
--
1.5
trr
Reverse Recovery Time
--
98
Qrr
Reverse Recovery Charge
--
0.34
9.2
A
Test Condition
Integral reverse pn-diode
in the MOSFET
V
TJ=25℃,IS=9.2A,VGS=0V
--
ns
TJ=25℃,IF=9.2A
--
μC
diF/dt=100A/μs
④
Notes ;
① Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature
② L=2mH, IAS=9.2A, VDD=25V, RG=27Ω, Starting TJ =25℃
③ ISD≤9.2A, di/dt≤300A/μs, VDD≤BVDSS , Starting TJ =25℃
④ Pulse Test : Pulse Width = 250μs, Duty Cycle ≤ 2%
⑤ Essentially Independent of Operating Temperature
2
N-CHANNEL
POWER MOSFET
IRLW/I520A
Fig 1. Output Characteristics
Fig 2. Transfer Characteristics
VGS
101
7.0 V
6.0 V
5.5 V
5.0 V
4.5 V
4.0 V
3.5 V
Bottom : 3.0 V
100
@ Notes :
1. 250 µs Pulse Test
2. TC = 25 oC
10-1
100
175 oC
100
25 oC
@ Notes :
1. VGS = 0 V
2. VDS = 40 V
3. 250 µs Pulse Test
- 55 oC
-1
10
101
ID , Drain Current [A]
ID , Drain Current [A]
Top :
10-1
101
0
2
4
6
8
10
VDS , Drain-Source Voltage [V]
VGS , Gate-Source Voltage [V]
Fig 3. On-Resistance vs. Drain Current
Fig 4. Source-Drain Diode Forward Voltage
IDR , Reverse Drain Current [A]
RDS(on) , [ Ω ]
Drain-Source On-Resistance
0.4
VGS = 5 V
0.3
0.2
0.1
VGS = 10 V
@ Note : TJ = 25 oC
0.0
0
10
20
30
101
100
@ Notes :
1. VGS = 0 V
2. 250 µs Pulse Test
175 oC
25 oC
40
10-1
0.4
0.6
0.8
ID , Drain Current [A]
1.0
1.2
1.4
1.6
1.8
2.0
2.2
VSD , Source-Drain Voltage [V]
Fig 5. Capacitance vs. Drain-Source Voltage
Fig 6. Gate Charge vs. Gate-Source Voltage
600
360
C iss
C oss
240
@ Notes :
1. VGS = 0 V
2. f = 1 MHz
C rss
120
00
10
101
VDS , Drain-Source Voltage [V]
6
VGS , Gate-Source Voltage [V]
Capacitance [pF]
480
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd
Crss= Cgd
VDS = 20 V
VDS = 50 V
VDS = 80 V
4
2
@ Notes : ID = 9.2 A
0
0
2
4
6
8
10
12
QG , Total Gate Charge [nC]
3
N-CHANNEL
POWER MOSFET
IRLW/I520A
Fig 7. Breakdown Voltage vs. Temperature
Fig 8. On-Resistance vs. Temperature
3.0
RDS(on) , (Normalized)
Drain-Source On-Resistance
BVDSS , (Normalized)
Drain-Source Breakdown Voltage
1.2
1.1
1.0
0.9
@ Notes :
1. V = 0 V
GS
2.5
2.0
1.5
1.0
@ Notes :
1. VGS = 5 V
2. ID = 4.6 A
0.5
2. I = 250 µA
D
0.8
-75
-50
-25
0
25
50
75
100
125
150
175
0.0
-75
200
-50
-25
TJ , Junction Temperature [oC]
0
25
50
75
100
125
150
175
200
TJ , Junction Temperature [oC]
Fig 9. Max. Safe Operating Area
Fig 10. Max. Drain Current vs. Case Temperature
102
10
Operation in This Area
is Limited by R
ID , Drain Current [A]
100 µs
1 ms
101
10 ms
DC
100
@ Notes :
1. T = 25 oC
C
8
6
4
2
2. T = 175 oC
J
3. Single Pulse
10-1 0
10
101
0
25
102
50
75
100
125
150
175
Tc , Case Temperature [oC]
VDS , Drain-Source Voltage [V]
Thermal Response
Fig 11. Thermal Response
D=0.5
100
@ Notes :
1. Zθ J C (t)=3.04
0.2
0.1
o
C/W Max.
2. Duty Factor, D=t1 /t2
0.05
3. TJ M -TC =PD M *Z
θJC
-1
10
t1
single pulse
10- 5
(t)
PDM
0.02
0.01
θJC
Z (t) ,
ID , Drain Current [A]
DS(on)
10- 4
10- 3
t2
10- 2
10- 1
t 1 , Square Wave Pulse Duration
100
101
[sec]
4
N-CHANNEL
POWER MOSFET
IRLW/I520A
Fig 12. Gate Charge Test Circuit & Waveform
* Current Regulator ”
VGS
Same Type
as DUT
50KΩ
Qg
200nF
12V
10V
300nF
VDS
Qgs
VGS
Qgd
DUT
3mA
R1
R2
Current Sampling (IG)
Resistor
Current Sampling (ID)
Resistor
Charge
Fig 13. Resistive Switching Test Circuit & Waveforms
RL
Vout
Vout
90%
VDD
Vin
( 0.5 rated VDS )
RG
DUT
Vin
10%
10V
tr
td(on)
td(off)
t on
tf
t off
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
BVDSS
1
EAS = ---- LL IAS2 -------------------2
BVDSS -- VDD
LL
VDS
Vary tp to obtain
required peak ID
BVDSS
IAS
ID
RG
C
DUT
ID (t)
VDD
VDS (t)
VDD
5V
tp
tp
Time
5
N-CHANNEL
POWER MOSFET
IRLW/I520A
Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
+
VDS
--
IS
L
Driver
VGS
RG
VGS
VGS
( Driver )
Same Type
as DUT
VDD
• dv/dt controlled by "RG"
• IS controlled by Duty Factor "D"
Gate Pulse Width
D = -------------------------Gate Pulse Period
10V
IFM , Body Diode Forward Current
IS
( DUT )
di/dt
IRM
Body Diode Reverse Current
VDS
( DUT )
Body Diode Recovery dv/dt
Vf
VDD
Body Diode
Forward Voltage Drop
6
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
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Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
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This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. G