A-POWER AP4410M

AP4410M
Advanced Power
Electronics Corp.
N-CHANNEL ENHANCEMENT MODE
POWER MOSFET
▼ Low On-Resistance
D
▼ Fast Switching
D
D
D
▼ Simple Drive Requirement
S
30V
RDS(ON)
13.5mΩ
ID
G
SO-8
BVDSS
10A
S
S
Description
D D
The Advanced Power MOSFETs from APEC provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and cost-effectiveness.
G
G
S S
The SO-8 package is universally preferred for all commercial-industrial
surface mount applications and suited for low voltage applications
such as DC/DC converters.
Absolute Maximum Ratings
Parameter
Symbol
VDS
Drain-Source Voltage
VGS
Gate-Source Voltage
ID@TA=25℃
ID@TA=70℃
Rating
Units
30
V
± 25
V
3
10
A
3
8
A
Continuous Drain Current
Continuous Drain Current
1
IDM
Pulsed Drain Current
50
A
PD@TA=25℃
Total Power Dissipation
2.5
W
Linear Derating Factor
0.02
W/℃
TSTG
Storage Temperature Range
-55 to 150
℃
TJ
Operating Junction Temperature Range
-55 to 150
℃
Thermal Data
Symbol
Rthj-amb
Parameter
Thermal Resistance Junction-ambient
Data and specifications subject to change without notice
3
Max.
Value
Unit
50
℃/W
200606032
AP4410M
Electrical Characteristics@Tj=25oC(unless otherwise specified)
Symbol
Parameter
Test Conditions
Min.
Typ.
Max. Units
30
-
-
V
BVDSS
Drain-Source Breakdown Voltage
ΔBVDSS/ΔTj
Breakdown Voltage Temperature Coefficient Reference to 25℃, ID=1mA
-
0.037
-
V/℃
RDS(ON)
Static Drain-Source On-Resistance2
VGS=10V, ID=10A
-
-
13.5
mΩ
VGS=4.5V, ID=5A
-
-
22
mΩ
VDS=VGS, ID=250uA
1
-
3
V
VGS(th)
Gate Threshold Voltage
gfs
Forward Transconductance
IDSS
VDS=15V, ID=10A
-
20
-
S
o
VDS=30V, VGS=0V
-
-
1
uA
o
Drain-Source Leakage Current (Tj=70 C)
VDS=24V, VGS=0V
-
-
25
uA
Gate-Source Leakage
VGS= ± 25V
-
-
±100
nA
ID=10A
-
13.5
-
nC
Drain-Source Leakage Current (Tj=25 C)
IGSS
VGS=0V, ID=250uA
2
Qg
Total Gate Charge
Qgs
Gate-Source Charge
VDS=15V
-
4
-
nC
Qgd
Gate-Drain ("Miller") Charge
VGS=5V
-
7
-
nC
VDS=25V
-
14
-
ns
2
td(on)
Turn-on Delay Time
tr
Rise Time
ID=1A
-
16
-
ns
td(off)
Turn-off Delay Time
RG=3.3Ω,VGS=5V
-
21
-
ns
tf
Fall Time
RD=25Ω
-
15
-
ns
Ciss
Input Capacitance
VGS=0V
-
1160
-
pF
Coss
Output Capacitance
VDS=15V
-
240
-
pF
Crss
Reverse Transfer Capacitance
f=1.0MHz
-
165
-
pF
Min.
Typ.
Source-Drain Diode
Symbol
Parameter
2
Test Conditions
Max. Units
VSD
Forward On Voltage
IS=2.1A, VGS=0V
-
-
1.2
V
trr
Reverse Recovery Time
IS=5A, VGS=0V,
-
17.1
-
ns
Qrr
Reverse Recovery Charge
dI/dt=100A/µs
-
12
-
nC
Notes:
1.Pulse width limited by Max. junction temperature.
2.Pulse width <300us , duty cycle <2%.
3.Surface mounted on 1 in2 copper pad of FR4 board ; 125 ℃/W when mounted on Min. copper pad.
AP4410M
200
150
T A =25 o C
T A =150 o C
10V
10V
8.0V
8.0V
ID , Drain Current (A)
ID , Drain Current (A)
150
6.0V
100
50
100
6.0V
50
V G =4.0V
V G =4.0V
0
0
0
1
2
3
4
5
6
7
0
8
2
Fig 1. Typical Output Characteristics
6
8
Fig 2. Typical Output Characteristics
20
1.8
I D =10A
I D =10A
V G =10V
1.6
T A =25 o C
Normalized RDS(ON)
18
RDS(ON) (mΩ )
4
V DS , Drain-to-Source Voltage (V)
V DS , Drain-to-Source Voltage (V)
16
14
1.4
1.2
1
12
0.8
10
0.6
3
4
5
6
7
8
9
10
11
-50
V GS , Gate-to-Source Voltage (V)
0
50
100
150
o
T j , Junction Temperature ( C)
Fig 3. On-Resistance v.s. Gate Voltage
Fig 4. Normalized On-Resistance
v.s. Junction Temperature
100.00
3
10.00
2
T j =25 o C
VGS(th) (V)
IS(A)
T j =150 o C
1.00
1
0.10
0
0.01
0
0.4
0.8
1.2
V SD , Source-to-Drain Voltage (V)
Fig 5. Forward Characteristic of
Reverse Diode
-50
0
50
T j , Jujnction Temperature (
100
o
150
C)
Fig 6. Gate Threshold Voltage v.s.
Junction Temperature
AP4410M
f=1.0MHz
10000
I D =10A
V DS =15V
10
8
Ciss
1000
C (pF)
VGS , Gate to Source Voltage (V)
12
6
Coss
Crss
100
4
2
10
0
0
5
10
15
20
25
1
30
6
Q G , Total Gate Charge (nC)
16
21
26
31
V DS , Drain-to-Source Voltage (V)
Fig 7. Gate Charge Characteristics
Fig 8. Typical Capacitance Characteristics
1
Normalized Thermal Response (Rthja)
100
100us
10
1ms
ID (A)
11
10ms
1
100ms
1s
0.1
DC
T A =25 o C
Single Pulse
0.01
DUTY=0.5
0.2
0.1
0.1
0.05
0.02
0.01
0.01
PDM
t
Single Pulse
T
Duty factor = t/T
Peak Tj = PDM x Rthja + T a
Rthja=125 oC/W
0.001
0.1
1
10
100
0.0001
0.001
V DS , Drain-to-Source Voltage (V)
Fig 9. Maximum Safe Operating Area
0.01
0.1
1
10
100
1000
t , Pulse Width (s)
Fig 10. Effective Transient Thermal Impedance
VG
VDS
90%
QG
5V
QGS
QGD
10%
VGS
td(on) tr
td(off) tf
Fig 11. Switching Time Circuit
Charge
Fig 12. Gate Charge Circuit
Q