SN74ALVC14 HEX SCHMITT-TRIGGER INVERTER SCES107E – JULY 1997 – REVISED AUGUST 1999 D D D D EPIC (Enhanced-Performance Implanted CMOS) Submicron Process ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II Package Options Include Plastic Small-Outline (D), Thin Very Small-Outline (DGV), and Thin Shrink Small-Outline (PW) Packages D, DGV, OR PW PACKAGE (TOP VIEW) 1A 1Y 2A 2Y 3A 3Y GND 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 6A 6Y 5A 5Y 4A 4Y description This hex Schmitt-trigger inverter is designed for 2.3-V to 3.6-V VCC operation. The SN74ALVC14 contains six independent inverters and performs the Boolean function Y = A. The SN74ALVC14 is characterized for operation from –40°C to 85°C. FUNCTION TABLE (each gate) INPUT A OUTPUT Y H L L H logic symbol† 1A 2A 3A 4A 5A 6A 1 2 3 4 5 6 9 8 11 10 13 12 1Y 2Y 3Y 4Y 5Y 6Y † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. logic diagram, each inverter (positive logic) A Y Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC is a trademark of Texas Instruments Incorporated. Copyright 1999, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN74ALVC14 HEX SCHMITT-TRIGGER INVERTER SCES107E – JULY 1997 – REVISED AUGUST 1999 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 4.6 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 4.6 V Output voltage range, VO (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA Package thermal impedance, θJA (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/W DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 182°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. This value is limited to 4.6 V maximum. 3. The package thermal impedance is calculated in accordance with JESD 51. recommended operating conditions (see Note 4) VCC VI Supply voltage VO Output voltage IOH IOL Input voltage MIN MAX 2.3 3.6 V 0 VCC VCC V 0 High-level output current Low-level output current VCC = 2.3 V VCC = 2.7 V –12 VCC = 3 V VCC = 2.3 V –24 VCC = 2.7 V VCC = 3 V 12 –12 UNIT V mA 12 mA 24 TA Operating free-air temperature –40 85 °C NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN74ALVC14 HEX SCHMITT-TRIGGER INVERTER SCES107E – JULY 1997 – REVISED AUGUST 1999 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN 0.7 1.7 2.7 V 0.8 2 3V 0.8 2 3.6 V 0.8 2 2.3 V 0.35 1.3 2.7 V 0.4 1.4 3V 0.6 1.5 3.6 V 0.8 1.8 2.3 V 0.3 1 2.7 V 0.3 1.1 3V 0.3 1.2 3.6 V 0.3 1.2 2.3 V to 3.6 V 2.3 V VCC–0.2 2 2.3 V 1.7 2.7 V 2.2 3V 2.4 3V 2 VT+ Positive-going Positive going threshold VT– Negative-going Negative going threshold ∆VT Hysteresis (VT+ – VT–) IOH = –100 µA IOH = –6 mA VOH IOH = –12 mA IOH = –24 mA IOL = 100 µA II ICC 0.2 0.4 2.3 V 0.7 ∆ICC Ci IOL = 24 mA VI = VCC or GND IO = 0 Other inputs at VCC or GND UNIT V V V V 2.3 V IOL = 12 mA VI = VCC or GND, One input at VCC – 0.6 V, MAX 2.3 V to 3.6 V IOL = 6 mA VOL TYP† VCC 2.3 V 2.7 V 0.4 3V 0.55 V 3.6 V ±5 µA 3.6 V 10 µA 3 V to 3.6 V 750 µA VI = VCC or GND † All typical values are at VCC = 3.3 V, TA = 25°C. 3.3 V 4 pF switching characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figures 1 and 2) PARAMETER tpd FROM (INPUT) TO (OUTPUT) A Y VCC = 2.5 V ± 0.2 V MIN MAX 1 3.7 VCC = 2.7 V MIN VCC = 3.3 V ± 0.3 V MAX MIN MAX 3.9 1 3.4 UNIT ns operating characteristics, TA = 25°C PARAMETER Cpd TEST CONDITIONS Power dissipation capacitance per inverter POST OFFICE BOX 655303 CL = 0, f = 10 MHz • DALLAS, TEXAS 75265 VCC = 2.5 V TYP 27 VCC = 3.3 V TYP 31 UNIT pF 3 SN74ALVC14 HEX SCHMITT-TRIGGER INVERTER SCES107E – JULY 1997 – REVISED AUGUST 1999 PARAMETER MEASUREMENT INFORMATION VCC = 2.5 V ± 0.2 V From Output Under Test 2 × VCC S1 500 Ω Open GND CL = 30 pF (see Note A) 500 Ω TEST S1 tpd tPLZ/tPZL tPHZ/tPZH Open 2 × VCC GND LOAD CIRCUIT tw VCC Timing Input VCC/2 VCC/2 VCC/2 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VCC/2 VCC/2 0V tPLH Output Control (low-level enabling) tPLZ VCC VCC/2 VCC/2 VOL Output Waveform 2 S1 at GND (see Note B) VOL + 0.15 V VOL tPHZ tPZH VOH VCC/2 0V Output Waveform 1 S1 at 2 × VCC (see Note B) tPHL VCC/2 VCC VCC/2 tPZL VCC Input VOLTAGE WAVEFORMS PULSE DURATION th VCC Data Input VCC/2 0V 0V tsu Output VCC VCC/2 Input VCC/2 VOH VOH – 0.15 V 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2 ns, tf ≤ 2 ns. D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. Figure 1. Load Circuit and Voltage Waveforms 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN74ALVC14 HEX SCHMITT-TRIGGER INVERTER SCES107E – JULY 1997 – REVISED AUGUST 1999 PARAMETER MEASUREMENT INFORMATION VCC = 2.7 V AND 3.3 V ± 0.3 V 6V S1 500 Ω From Output Under Test Open GND CL = 50 pF (see Note A) 500 Ω TEST S1 tpd tPLZ/tPZL tPHZ/tPZH Open 6V GND tw LOAD CIRCUIT 2.7 V 2.7 V Timing Input 1.5 V Input 1.5 V 1.5 V 0V 0V tsu VOLTAGE WAVEFORMS PULSE DURATION th 2.7 V Data Input 1.5 V 1.5 V 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES 2.7 V Output Control (low-level enabling) 1.5 V 0V tPZL 2.7 V Input 1.5 V 1.5 V 0V tPLH 1.5 V tPLZ 3V 1.5 V tPZH VOH Output Output Waveform 1 S1 at 6 V (see Note B) tPHL 1.5 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES 1.5 V Output Waveform 2 S1 at GND (see Note B) VOL + 0.3 V VOL tPHZ 1.5 V VOH – 0.3 V VOH 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. Figure 2. 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