CMX018 UHF FM/FSK Receiver D/018/3 April 1999 Advance Information Features Applications • Double Conversion Super-Heterodyne Receiver and FM/FSK Demodulator • High Performance Analogue/Digital Radio Links (860-965MHz) • LNA with Switched Gain • General ISM 915MHz Band • High Performance UHF Down-Converter Stage with Integrated VCO • Analogue/Digital Cordless Phones • 2.7V Operation • Spread Spectrum Receivers • Zero-Power Mode (<10µA) • Analogue FM Receivers • 28-Pin SSOP Package • Handheld Data Terminals • Temperature Compensated RSSI • So-Ho Wireless Data Links GAINSEL TANK OSCOUT OSCBA OSCEM ENABLE BANDGAP & BIAS CONTROL BUFFERED OSCILLATOR OUTPUT 1st DOWN CONVERTER LNAIN 50Ω Ω LNA RSSI VCO 2nd DOWN CONVERTER IF LIMITING AMPLIFIER Ω 50Ω FM/FSK DISCRIMINATOR Ω 50Ω Ω 100Ω Ω 100Ω DETOUT Ω 430Ω 430Ω Ω LNADEC 1.1 LNAOUT MIX1IN MIX1OUT MIX2IN MIX2OUT LIMIN LIMDEC1 LIMDEC2 LIMOUT QUADIN Brief Description The CMX018 is a single chip UHF FM/FSK double-conversion super-heterodyne receiver. It combines a dual gain mode Low Noise Amplifier (LNA), two down-converters (including integrated oscillators), limiting amplifier, RSSI, FM/FSK demodulator and zero-power mode control. The CMX018 can be used in conjunction with the CMX017, an integrated FM/FSK modulator and transmitter, to implement a complete UHF radio link. CONTENTS Section Page 1.0 Features and Applications ............................................................................ 1 1.1 Brief Description ............................................................................................ 1 1.2 Internal Block Diagram .................................................................................. 3 1.3 Signal List ....................................................................................................... 4 1.4 External Components .................................................................................... 6 1.5 General Description ....................................................................................... 7 1.5.1 Low Noise Amplifier....................................................................... 7 1.5.2 First Down-Converter .................................................................... 7 1.5.3 Second Down-Converter ............................................................... 7 1.5.4 Limiting Amplifier and RSSI.......................................................... 7 1.5.5 FM/FSK Demodulator..................................................................... 8 1.5.6 Zero-Power Mode ........................................................................... 8 1.6 Application Notes........................................................................................... 9 1.6.1 General ............................................................................................ 9 1.6.2 Example Schematic and Layout ................................................... 9 1.7 Performance Specification .......................................................................... 12 1.7.1 Electrical Performance ................................................................ 12 1.7.2 Packaging ..................................................................................... 15 1.7.3 Handling Precautions .................................................................. 15 Note: As this product is still in development, it is likely that a number of changes and additions will be made to this specification. Items marked TBD or left blank will be included in later issues. Information in this data sheet should not be relied upon for final product design. 1999 Consumer Microcircuits Limited 2 D/018/3 1.2 Internal Block Diagram LNAIN 1 GND 28 ENABLE 2 27 GAINSEL LNAOUT 3 26 LNADEC GND 4 25 Vcc1 24 GND LNA FIRST DOWN CONVERTER MIX1IN 5 MIX1OUT 6 23 TANK GND 7 22 Vcc2 BUFFERED VCO OUTPUT MIX2IN 8 21 OSCOUT MIX2OUT 9 20 OSCBA 19 OSCEM 18 DETOUT 17 Vcc3 LIMDEC2 13 16 LIMOUT RSSI 14 15 QUADIN SECOND DOWN CONVERTER GND 10 LIMIN 11 LIMDEC1 12 IF LIMITING AMPLIFIER 430Ω FM/FSK DEMODULATOR Figure 1 Internal Block Diagram 1999 Consumer Microcircuits Limited 3 D/018/3 1.3 Signal List Package D6 Signal Description Pin No. Name Type 1 LNAIN I/P 2 GND GROUND 3 LNAOUT O/P 4 GND GROUND 5 MIX1IN I/P RF Input to the First Down-Converter 6 MIX1OUT O/P IF Output from the First Down-Converter 7 GND GROUND First Down-Converter Ground connection 8 MIX2IN I/P RF Input to the Second Down-Converter 9 MIX2OUT O/P IF Output from the Second Down-Converter 10 GND GROUND 11 LIMIN I/P 12 LIMDEC1 I/P 13 LIMDEC2 I/P External Decoupling capacitors - one required at each Limiting Amplifier Input 14 RSSI O/P Receive Signal Strength Indicator output 15 QUADIN I/P Quadrature input to the FM Demodulator 16 LIMOUT O/P Output from the Limiting Amplifier 17 Vcc3 POWER 18 DETOUT O/P 19 OSCEM Emitter connection to the Second DownConverter Local Oscillator transistor 20 OSCBA Base connection to the Second Down-Converter Local Oscillator transistor 21 OSCOUT O/P 22 VCC2 POWER 1999 Consumer Microcircuits Limited LNA RF Input LNA Ground connection LNA RF Output LNA Ground connection Second Down-Converter, Limiting Amplifier, RSSI and Demodulator stages Ground connection Input to the Limiting Amplifier Power supply to the Second Down-Converter, Limiting Amplifier, RSSI and Demodulator stages - nominally 3.0V Output of the FM/FSK Quadrature Demodulator Buffered Local Oscillator (Open-Collector) output from the First Down-Converter First Down-Converter Power supply - nominally 3.0V 4 D/018/3 Package D6 Signal Description Pin No. Name Type 23 TANK I/P 24 GND GROUND 25 VCC1 POWER 26 LNADEC 27 GAINSEL CMOS I/P 28 ENABLE CMOS I/P Notes: I/P = O/P = First Down-Converter Local Oscillator (VCO) TANK/resonator connection First Down-Converter VCO Ground connection LNA Power supply - nominally 3.0V External LNA bias decoupling capacitor LNA Gain control logic input. A logic '0' provides a typical power gain of 16dB and a logic '1' provides an attenuation of 6dB Zero-Power logic control. A logic '0' powers down the device. Input Output 1999 Consumer Microcircuits Limited 5 D/018/3 1.4 External Components Component Values: X1 L1 L2 L3 L4 D1 ~ C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 R1 R2 R3 60.175MHz 22nH 680nH 680nH 1µH Varactor Resonator 100nF 100nF 100nF 200pF 8 - 50pF 5pF 220pF 6.8pF 15pF 33pF 4.7pF 6.2pF 10nF 100pF 100pF 10kΩ 10kΩ 2.0kΩ 50ppm Xtal Varactor Diode, type SMV1233-011 Co-Axial Resonator, type RG402, length = 11mm, shorted end. Trimmer NOTE: Components are surface mount, type SMD0603, unless otherwise marked. Figure 2 Example of CMX018 with External Components 1999 Consumer Microcircuits Limited 6 D/018/3 1.5 General Description The CMX018 is a single chip UHF FM/FSK double-conversion super-heterodyne receiver. It combines a dual gain mode Low Noise Amplifier (LNA), two down-converters (including integrated oscillators), limiting amplifier, RSSI, FM/FSK demodulator and zero-power mode control. The receiver frequency is selected using an external PLL or synthesizer which is driven by the buffered RF oscillator signal from the first down-converter. The CMX018 can be used in conjunction with the CMX017, an integrated FM/FSK modulator and transmitter, to implement a complete UHF radio link. 1.5.1 Low Noise Amplifier The LNA includes a switched gain function which is used to increase the dynamic range of the receiver. The gain is selected using the GAINSEL logic input at pin 2. With a logic '0' at the GAINSEL input a high gain is selected and the amplifier achieves the lowest noise figure. This mode is used where maximum sensitivity is required for low level input signals. Where high level signals are present at the receiver input, which cause difficulties due to inter-modulation, the gain of the LNA can be reduced by typically 22dB from about +16dB to about -6dB. The attenuation is selected by applying a logic '1' at the GAINSEL input, this minimises the amount of non-linear distortion in the overall receiver at the expense of small signal sensitivity. The input and output impedances of the LNA are typically 50Ω. 1.5.2 First Down-Converter The first down-converter includes a double balanced mixer with a low noise pre-amplifier and on-chip oscillator components. The oscillator is configured as a “high-sided” voltage controlled local oscillator, using an external varicap diode and tank resonator circuit, such that the first IF is typically centred at 70MHz. A buffered oscillator signal (OSCOUT at pin 21) is provided to drive the frequency synthesizer which controls the frequency tuning. The input impedance is typically 50Ω and the output impedance is typically 100Ω. 1.5.3 Second Down-Converter The second down-converter also includes a double balanced mixer with a low noise pre-amplifier and on-chip oscillator components. The oscillator is configured as a “low-sided” local oscillator, using an external crystal at typically 60MHz, such that the second IF is centred at 10.7MHz. The input impedance is typically 100Ω and the output impedance is typically 430Ω. 1.5.4 Limiting Amplifier and RSSI The limiting amplifier provides the IF amplification and limiting prior to the FM/FSK demodulator. An RSSI circuit is included which has temperature compensation. An RF signal level of -100dBm at the LNA input will produce an RSSI voltage of typically TBD mV. The RSSI voltage will increase with increasing RF input level at a rate of 20mV/dB up to a typical voltage of TBD V at a -60dBm RF input. In practice the absolute RSSI voltage will depend upon the insertion losses associated with each of the IF filters. The input impedance is typically 430Ω. 1999 Consumer Microcircuits Limited 7 D/018/3 1.5.5 FM/FSK Demodulator A quadrature detector is employed together with an external discriminator and phase shift network to demodulate the FM or FSK signal. 1.5.6 Zero-Power Mode The device is powered down by applying a logic '0' level at the ENABLE input (pin 28). In this mode the device current is reduced to less than 10µA. This feature is useful when the device is operating within a transceiver where the receiver needs to be enabled and disabled. A delay should be allowed for the receiver to settle after power-up. This is likely to be less than the xtal oscillator stabilisation time, which may be altered by adjusting the value of R2, shown in Figure 2. 1999 Consumer Microcircuits Limited 8 D/018/3 1.6 Application Notes 1.6.1 General TBD 1.6.2 Example Schematic and Layout The following schematic (Figure 3) and printed circuit layout (Figure 4) show a typical application interface for the CMX018. To aid legibility, the schematic and layout are available electronically from the CML website http://www.cmlmicro.co.uk or on floppy disk by request from CML's office. Alternative components and component values are shown on the schematic. These should be selected according to the intended application. The schematic uses the following ICs: U2 U3 U4 Motorola MC34072D-SO8 IC Works WB1315X Analog Devices AD8532-SO8 1999 Consumer Microcircuits Limited 9 D/018/3 Figure 3 Application Schematic 5V 10 3 2 + - 8 4 1 U2 C11 MC34072D C7 1nF 2.2uF R9 10k R2 6 100k 5 - + 100k R5 100k C71 6p8 R4 C32 47nF 2.2uF 1nF C6 1nF C5 C70 7 N/C FLT2 C21 C58 C10 C78 100 R100 100pF 100pF 100pF 100pF C48 C59 120+47pF 330pF C51 180pF C49 120+33pF 8nH C52 C50 33pF L5 C41 N/C C30 SAW FILTER 12.5nH C40 33pF L4 C39 C26 360pF 100pF C31 N/C 6 4 3 1 180pF C53 C54 12.5nH C42 L6 360pF C38 100pF C27 16 18 20 15 17 19 C79 100nF C80 C8 L11 100pF 100nF 3V 5V C17 C460 1uF C81 100pF C65 1nF C60 100pF C35 100pF 100pF C67 2 GND U6 820nH 3 IN OUT 1 2 GND U5 KMFC545P C470 2k2 N/C 3 C28 N/C IN OUT 1 N/C C12 KMFC545S 100pF C34 100pF 10nF C87 R47 R10 N/C N/C TFMCON20M 14 10 12 8 13 9 11 7 6 4 3 5 2 1 J1 120+33pF 100uF 1 3 4 6 C9 SAW FILTER F5CH-915M-L2 2 5 IN OUT C93 N/C FLT1 C4 N/C F5CH-915M-L2 5 OUT IN 2 33pF GND GND GND GND J2 RFIN C2 GND GND GND GND 1999 Consumer Microcircuits Limited D/018/3 C55 100pF C61 100nF C66 1nF 100nF 9 MIX2OUT 100pF C13 100nF 2k 1nF 100pF C77 1uH L10 RSSI C25 C22 14 10 9 8 7 6 5 4 3 2 1 C14 15uH U3 WB1315X L2 5V C73 5pF C68 1nF SYNT_CLK SYNT_DATA SYNT_STB FO_LD GND OSC_IN GND FIN1B FIN1 GND DO1 VP1 15 C36 200pF CV1206 VCC1 C72 QUADIN LIMOUT 16 18 13 LIMDEC2 R22 OSCBA 20 OSCEM 19 DETOUT VCC3 17 LIMIN 21 12 LIMDEC1 11 10 GND4 OSCOUT TANK 23 CMX018D6 VCC2 22 MIX2IN 7 GND3 8 6 MIX1OUT OSCGND 24 VCC1 25 LNADEC 26 U4 GAINSEL 27 5 MIX1IN 4 GND2 3 LNAOUT ENABLE 28 2 GND1 1 LNAIN C24 C16 10nF C69 100nF L15 C62 R19 100k CLOCK DATA LE GND FIN2B FIN2 GND DO2 VP2 VCC2 11 12 13 14 15 16 17 18 19 20 R20 100k C23 R21 100k 100pF C64 L8 680nH R18 100pF C29 10k-N/C 6.8pF 15pF C33 N/C 22nH 3V L9 N/C C20 4.7pF C43 1nF L3 C63 1uF HC49U-S 1nF XT1 C45 33pF C56 C320 100nF 3V 10k-N/C L16 C57 220pF L7 680nH 1nF C37 100nF R14 100nF 100pF 2.2uF C15 L14 100pF 1 100pF IN RXRESNR2 GND C44 R7 C18 5V D1 470nF 47K - N/C 10pF 100nF C19 2 3 1k R8 N/C R3 15uH R1 - + 4 U1 8 0R 6 ( 7-NC) 1 AD8532-SO8 R6 5 R16 100R 10nF 2.2uF C3 1nF C1 10k C47 R15 0R-N/C 3pF L1 C46 Figure 4a Application Layout - Top Copper Figure 4b Application Layout - Bottom Copper (not reversed) Available from http://www.cmlmicro.co.uk 1999 Consumer Microcircuits Limited 11 D/018/3 1.7 Performance Specification 1.7.1 Electrical Performance Absolute Maximum Ratings Exceeding these maximum ratings can result in damage to the device. Supply Voltage (VCC) Input Voltage LNA Input Power Pins 17, 22, 25 27, 28 1 D6 Package Total Allowable Power Dissipation at Tamb = 25°C ... Derating Storage Temperature Min. -0.3 -0.3 Max. 7.0 VCC + 0.3 0 Units V V dBm Min. Max. 1100 11 +125 Units mW mW/°C °C Max. 3.3 965 +60 Units V MHz °C -55 Operating Limits Correct operation of the device outside these limits is not implied. Notes Supply Voltage (VCC) RF Input Range Operating Temperature 1999 Consumer Microcircuits Limited 12 Min. 2.7 860 -10 D/018/3 Operating Characteristics For the following conditions unless otherwise specified: VCC = 2.7V to 3.3V, Tamb = - 10°C to +60°C, RF = 915MHz, 50Ω source and load impedance. Pin Min. Typ. Max. Units 10 mA mA µA DC Parameters Icc (ENABLE = VCC and GAINSEL = 0V) Icc (ENABLE = VCC and GAINSEL = VCC) Icc (ENABLE = 0V) 17, 22, 25 17, 22, 25 17, 22, 25 50 42 AC Parameters LNA (RF = 915MHz) Power Gain (GAINSEL = 0V) Power Gain (GAINSEL = VCC) Noise Figure Input 1dB Gain Compression Point 1, 3 1, 3 1, 3 1 16 -6.0 3.0 -20 dB dB dB dBm 1 16 dBm 1 -10 dBm 1 25 dBm Reverse Isolation (GAINSEL = 0V) Reverse Isolation (GAINSEL = VCC) Input Impedance Output Impedance Input Return Loss (50Ω source) Output Return Loss (50Ω load) VCO to LNA Leakage 3, 1 3, 1 1 3 1 3 1 -35 -6.0 50 50 10 15 -45 dB dB Ω Ω dB dB dBm First Down Converter (RF = 915MHz and IF = 70MHz) Conversion Gain Noise Figure Input 1dB Gain Compression Point Input Third Order Intercept Point Input Impedance Output Impedance Input Return Loss (50Ω source) Output Return Loss (50Ω load) Buffered oscillator output power RF to IF Leakage LO to IF Leakage LO to RF Leakage 5, 6 5, 6 5 5 5 6 5 6 21 5, 6 6 5 15 15 -12 -4.0 50 100 TBD TBD -10 TBD TBD TBD dB dB dBm dBm Ω Ω dB dB dBm dB dBm dBm (GAINSEL = 0V) Input 1dB Gain Compression Point (GAINSEL = VCC) Input Third Order Intercept Point (GAINSEL = 0V) Input Third Order Intercept Point (GAINSEL = VCC) 1999 Consumer Microcircuits Limited 13 D/018/3 Operating Characteristics (Continued) Pin Second Down Converter (RF = 70MHz and IF = 10.7MHz) Conversion Gain Noise Figure Output 1dB Gain Compression Point Output Third Order Intercept Point Input Impedance Output Impedance Min. Typ. Max. Units 8, 9 8, 9 9 9 8 9 24 13 -11 -2 100 430 dB dB dBm dBm Ω Ω Limiting Amplifier and RSSI (IF = 10.7MHz) Bandwidth Internal Voltage Gain Input Impedance RSSI Dynamic Range RSSI Slope 1 RSSI Voltage Range 11, 16 11 11 14 14 14 40 74 430 TBD TBD TBD MHz dBV Ω dB V/dB V Demodulator (IF = 10.7MHz) 2 Output Swing Output Impedance 18 18 TBD 1 mVp-p kΩ Notes: 1. Input power = TBD to TBD 2. 125kHz Deviation, 1kΩ Load 1999 Consumer Microcircuits Limited 14 D/018/3 UHF FM/FSK Receiver 1.7.2 CMX018 Packaging Figure 5 28-Pin Plastic SSOP Mechanical Outline: Order as part no. CMX018D6 1.7.3 Handling Precautions This device is a high performance RF integrated circuit and is ESD sensitive. Adequate precautions must be taken during handling and assembly of this device. CML does not assume any responsibility for the use of any circuitry described. No IPR or circuit patent licences are implied. CML reserves the right at any time without notice to change the said circuitry and this product specification. CML has a policy of testing every product shipped using calibrated test equipment to ensure compliance with this product specification. Specific testing of all circuit parameters is not necessarily performed. 1 WHEATON ROAD WITHAM - ESSEX CM8 3TD - ENGLAND Telephone: +44 1376 513833 Telefax: +44 1376 518247 e-mail: [email protected] http://www.cmlmicro.co.uk