TI 74AC11086D

74AC11086
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE
SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996
D
D
D
D
Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
EPIC  (Enhanced-Performance Implanted
CMOS) 1-µm Process
500-mA Typical Latch-Up Immunity at
125°C
Package Options Include Plastic
Small-Outline (D) Packages and Standard
Plastic 300-mil DIPs (N)
D OR N PACKAGE
(TOP VIEW)
1A
1Y
2Y
GND
GND
3Y
4Y
4B
description
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
1B
2A
2B
VCC
VCC
3A
3B
4A
This device contains four independent 2-input exclusive-OR gates. It performs the Boolean function
Y = A ⊕ B = AB + AB in positive logic.
A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced
in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the
output.
The 74AC11086 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each gate)
INPUTS
A
OUTPUT
Y
B
L
L
L
L
H
H
H
L
H
H
H
L
logic symbol†
1A
1B
2A
2B
3A
3B
4A
4B
1
=1
16
2
1Y
15
3
14
2Y
11
6
10
3Y
9
7
8
4Y
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
Copyright  1996, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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1
74AC11086
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE
SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996
logic diagram (positive logic)
1A
1B
2A
2B
3A
3B
4A
4B
1
2
16
15
3
14
1Y
2Y
11
6
10
9
7
8
3Y
4Y
exclusive-OR logic
An exclusive-OR gate has many applications, some of which can be represented better by alternative logic symbols.
EXCLUSIVE OR
=1
These are five equivalent exclusive-OR symbols valid for a 74AC11086 gate in positive logic; negation may be shown
at any two ports.
LOGIC-IDENTITY ELEMENT
=
The output is active (high) if
all inputs stand at the same
logic level (i.e., A=B).
EVEN-PARITY ELEMENT
2k
The output is active (high) if
an even number of inputs
(i.e., 0 or 2) are active (high).
ODD-PARITY ELEMENT
2k+1
The output is active (high) if an
odd number of inputs (i.e., only
1 of the 2) are active (high).
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA
Maximum power dissipation at TA = 55°C (in still air) (see Note 2): D package . . . . . . . . . . . . . . . . . . . . 1.3 W
N package . . . . . . . . . . . . . . . . . . . . 1.1 W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The maximum package power dissipation is calculated using a junction temperature of 150_C and a board trace length of 750 mils,
except for the N package, which has a trace length of zero.
2
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74AC11086
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE
SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996
recommended operating conditions
VCC
Supply voltage
VIH
High-level input voltage
VCC = 3 V
VCC = 4.5 V
VCC = 5.5 V
VCC = 3 V
MIN
NOM
MAX
3
5
5.5
0.9
VI
VO
Input voltage
0
Output voltage
0
IOH
High-level output current
∆t/∆v
Input transition rise or fall rate
TA
Operating free-air temperature
V
3.85
Low-level input voltage
Low-level output current
V
2.1
3.15
VIL
IOL
UNIT
VCC = 4.5 V
VCC = 5.5 V
1.35
V
1.65
VCC
VCC
VCC = 3 V
VCC = 4.5 V
V
V
–4
–24
VCC = 5.5 V
VCC = 3 V
–24
VCC = 4.5 V
VCC = 5.5 V
24
mA
12
mA
24
0
10
ns/V
–40
85
°C
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
IOH = –50 µA
VOH
MIN
3V
2.9
2.9
4.5 V
4.4
4.4
5.4
5.4
3V
2.58
2.48
4.5 V
3.94
3.8
IOH = –24
24 mA
A
5.5 V
4.94
IOH = –75 mA†
5.5 V
IOL = 12 mA
IOL = 24 mA
II
ICC
TA = 25°C
MIN
TYP
MAX
5.5 V
IOH = –4 mA
IOL = 50 µA
VOL
VCC
MAX
UNIT
V
4.8
3.85
3V
0.1
0.1
4.5 V
0.1
0.1
5.5 V
0.1
0.1
3V
0.36
0.44
4.5 V
0.36
0.44
5.5 V
0.36
0.44
V
IOL = 75 mA†
5.5 V
VI = VCC or GND
VI = VCC or GND,
5.5 V
±0.1
±1
µA
5.5 V
4
40
µA
IO = 0
Ci
VI = VCC or GND
5V
3.5
† Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
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1.65
pF
3
74AC11086
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE
SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996
switching characteristics over recommended operating free-air temperature range,
VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A or B
Y
MIN
TA = 25°C
TYP
MAX
MIN
MAX
1.5
5.6
9.4
1.5
10.6
1.5
5.1
7.4
1.5
8.2
UNIT
ns
switching characteristics over recommended operating free-air temperature range,
VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A or B
Y
MIN
TA = 25°C
TYP
MAX
MIN
MAX
1.5
3.8
6.8
1.5
7.6
1.5
3.8
6.2
1.5
6.8
UNIT
ns
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER
Cpd
TEST CONDITIONS
Power dissipation capacitance per gate
CL = 50 pF,
TYP
f = 1 MHz
27
UNIT
pF
PARAMETER MEASUREMENT INFORMATION
Input
(see Note B)
From Output
Under Test
CL = 50 pF
(see Note A)
VCC
50%
50%
0V
tPLH
tPHL
500 Ω
Output
50% VCC
VOH
50% VCC
VOL
VOLTAGE WAVEFORMS
LOAD CIRCUIT
NOTES: A. CL includes probe and jig capacitance.
B. Input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 3 ns, tf = 3 ns.
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
4
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