SN74CBT1G125 SINGLE FET BUS SWITCH SCDS046C – FEBRUARY 1998 – REVISED OCTOBER 1998 D D D D D DBV OR DCK PACKAGE (TOP VIEW) 5-Ω Switch Connection Between Two Ports TTL-Compatible Control Input Levels ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Latch-Up Performance Exceeds 250 mA Per JESD 17 Packaged in Plastic Small-Outline Transistor (DBV, DCK) Packages OE A GND 1 5 VCC 4 B 2 3 description The SN74CBT1G125 features a single high-speed line switch. The switch is disabled when the output-enable (OE) input is high. The SN74CBT1G125 is characterized for operation from –40°C to 85°C. FUNCTION TABLE INPUT OE FUNCTION L A port = B port H Disconnect logic diagram (positive logic) 2 4 A B 1 OE Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 1998, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN74CBT1G125 SINGLE FET BUS SWITCH SCDS046C – FEBRUARY 1998 – REVISED OCTOBER 1998 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Continuous channel current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA Input clamp current, IIK (VI/O < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA Package thermal impedance, θJA (see Note 2): DBV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 347°C/W DCK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 389°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51. recommended operating conditions (see Note 3) MIN MAX 5.5 VCC VIH Supply voltage 4 High-level control input voltage 2 VIL TA Low-level control input voltage Operating free-air temperature –40 UNIT V V 0.8 V 85 °C NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK II ICC Ci Control input Cio(OFF) ron§ TEST CONDITIONS VCC = 4.5 V, VCC = 5.5 V, II = –18 mA VI = 5.5 V or GND VCC = 5.5 V, VI = 3 V or 0 IO = 0, VO = 3 V or 0, VCC = 4 V, OE = VCC VCC = 4.5 V MIN TYP‡ MAX V ±1 µA 1 µA VI = VCC or GND 3 TYP at VCC = 4 V, VI = 0 pF 4 VI = 2.4 V, II = 64 mA II = 15 mA II = 30 mA II = 15 mA UNIT –1.2 pF 14 20 5 7 5 7 Ω VI = 2.4 V, 10 15 ‡ All typical values are at VCC = 5 V (unless otherwise noted), TA = 25°C. § Measured by the voltage drop between the A and the B terminals at the indicated current through the switch. On-state resistance is determined by the lower of the voltages of the two (A or B) terminals. switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1) VCC = 4 V VCC = 5 V ± 0.5 V MIN MIN FROM (INPUT) TO (OUTPUT) tpd¶ A or B B or A 0.35 ten OE A or B 5.5 PARAMETER MAX 1.6 UNIT MAX 0.25 ns 4.9 ns tdis A or B 4.5 1 4.2 ns OE ¶ The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance). 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN74CBT1G125 SINGLE FET BUS SWITCH SCDS046C – FEBRUARY 1998 – REVISED OCTOBER 1998 PARAMETER MEASUREMENT INFORMATION 7V S1 500 Ω From Output Under Test Open GND CL = 50 pF (see Note A) 500 Ω TEST S1 tpd tPLZ/tPZL tPHZ/tPZH Open 7V Open 3V Output Control (low-level enabling) LOAD CIRCUIT 1.5 V 0V tPZL 3V Input 1.5 V 1.5 V 0V tPLH 1.5 V 1.5 V VOL tPLZ 3.5 V 1.5 V tPZH VOH Output Output Waveform 1 S1 at 7 V (see Note B) tPHL 1.5 V Output Waveform 2 S1 at Open (see Note B) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VOL + 0.3 V VOL tPHZ 1.5 V VOH VOH – 0.3 V 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The output is measured with one input transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. 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