TPD1E05U06 TPD4E05U06 TPD6E05U06 www.ti.com SLVSBO7B – DECEMBER 2012 – REVISED JANUARY 2013 1, 4, 6 CHANNEL PROTECTION SOLUTION FOR SUPER-SPEED (UP TO 6 GBPS) INTERFACE Check for Samples: TPD1E05U06, TPD4E05U06, TPD6E05U06 FEATURES • 1 • • • • • • • Provides System Level ESD Protection for Low- Voltage IO Interface IEC 61000-4-2 Level 4 – ±15kV (Air gap discharge) – ±12kV (Contact discharge) IO Capacitance 0.42pF (Typ) DC Breakdown Voltage 6.5V (Min) Ultra low Leakage Current 10nA (Max) Low ESD Clamping Voltage Industrial Temperature Range: -40°C to 125°C Easy Straight-through Routing Packages APPLICATIONS • • • • • • • HDMI1.4 USB3.0 MHL LVDS Interfaces DisplayPort PCI Express eSata Interfaces NC 1 14 D1+ NC 2 13 D1– I/O D1+ 1 10 N.C. D1– 2 9 N.C. NC 3 12 1 D2+ GND 3 8 GND NC 4 11 D2– 2 D2+ 4 7 N.C. GND 5 10 GND GND D2– 5 6 N.C. NC 6 9 D3+ NC 7 8 D3– DPY 1 mm x 0.6 mm x 0.35 mm (0.65-mm pitch) DQA 2.5 mm x 1 mm x 0.5 mm (0.5-mm pitch) RVZ 3.5 mm x 1.35 mm x 0.5 mm (0.5-mm pitch) DESCRIPTION The TPDxE05U06 is a family of unidirectional ESD protection devices with ultra low capacitance. This family of devices is constructed with a central ESD clamp with two hiding diodes to reduce the capacitive loading. They are rated to dissipate ESD strikes above the maximum level specified in the IEC61000-4-2 level 4 international standard. Its ultra low loading capacitance makes it ideal for protecting any high-speed signal pins. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2012–2013, Texas Instruments Incorporated TPD1E05U06 TPD4E05U06 TPD6E05U06 SLVSBO7B – DECEMBER 2012 – REVISED JANUARY 2013 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION TA –40°C to 85°C (1) (2) (3) PACKAGE (1) (2) SON – DPY Tape and reel SON – DPY SON – DQA SON – RVZ QUANTITY TOP-SIDE MARKING (3) ORDERABLE PART NUMBER 10K TPD1E05U06DPYR C1 Tape and reel 250 TPD1E05U06DPYT TBD Tape and reel 3000 TPD4E05U06DQAR TBD Tape and reel 3000 TPD6E05U06RVZR TBD Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. DQA: The actual top-side marking has one additional character that designates wafer fab/assembly site. FUNCTIONAL BLOCK DIAGRAM Figure 1. Single Channel Schematic Diagram 2 Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: TPD1E05U06 TPD4E05U06 TPD6E05U06 TPD1E05U06 TPD4E05U06 TPD6E05U06 www.ti.com SLVSBO7B – DECEMBER 2012 – REVISED JANUARY 2013 Figure 2. Quad Channel Schematic Diagram Figure 3. 6-Channel Schematic Diagram SINGLE CHANNEL TERMINAL FUNCTIONS TERMINAL TYPE NAME PIN NO. I/O 1 I/O GND 2 GND DESCRIPTION USAGE ESD protected channel Connect pin 1 as close to the connector as possible Ground Connect to ground Copyright © 2012–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TPD1E05U06 TPD4E05U06 TPD6E05U06 3 TPD1E05U06 TPD4E05U06 TPD6E05U06 SLVSBO7B – DECEMBER 2012 – REVISED JANUARY 2013 www.ti.com QUAD CHANNEL TERMINAL FUNCTIONS TERMINAL DESCRIPTION USAGE I/O ESD protected channel Connect it as close to the connector as possible I/O ESD protected channel Connect it as close to the connector as possible 4 I/O ESD protected channel Connect it as close to the connector as possible 5 I/O ESD protected channel Connect it as close to the connector as possible NC 6, 7, 9, 10 NC No connect Used for optional straight-through routing from D+; otherwise can be left floating or grounded GND 3, 8 GND Ground Connect to ground NAME PIN NO. D1+ 1 D1– 2 D2+ D2– TYPE QUAD CHANNEL TERMINAL FUNCTIONS TERMINAL DESCRIPTION USAGE I/O ESD protected channel Connect it as close to the connector as possible I/O ESD protected channel Connect it as close to the connector as possible 12 I/O ESD protected channel Connect it as close to the connector as possible 12 I/O ESD protected channel Connect it as close to the connector as possible 1, 2, 3, 4, 6, 7 NC No connect Used for optional straight-through routing from D+; otherwise can be left floating or grounded 5, 10 GND Ground Connect to ground NAME PIN NO. D1+ 14 D1– 13 D2+ D2– D3+ 9 D3– 8 NC GND TYPE ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT TA Operating free-air temperature range PARAMETER –40 125 °C Tstg Storage temperature range –65 ESD protection 155 °C IEC 61000-4-2 Contact Discharge ±12 kV IEC 61000-4-2 Air-Gap Discharge ±15 kV IPP Peak pulse current (tp = 8/20 μs) 2.5 A PPP Peak pulse power (tp = 8/20 μs) 40 W (1) 4 Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum-rated conditions for extended periods may affect device reliability. Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: TPD1E05U06 TPD4E05U06 TPD6E05U06 TPD1E05U06 TPD4E05U06 TPD6E05U06 www.ti.com SLVSBO7B – DECEMBER 2012 – REVISED JANUARY 2013 ELECTRICAL CHARACTERISTICS over operating free-air temperature range (unless otherwise noted) PARAMETER VRWM Vclamp TEST CONDITIONS Reverse stand-off voltage Clamp voltage MIN IIO = 10 µA 10.4 IPP= 2.5A, tp = 8/20 μs, from I/O to ground (1) 13.4 IPP= 1A, tp = 8/20 μs, from ground to I/O (1) DPY package dynamic resistance Pin x to GND Pin (2) DQA package dynamic resistance Pin x to GND Pin (2) RVZ package dynamic resistance Pin x to GND Pin (2) CL Line capacitance (3) VIO = 2.5 V, F = 1 MHz, I/O to GND CCROSS Channel to channel input capacitance GND Pin = 0 V, F = 1 GHz, VBIAS = 2.5 V, between channel pins ΔCIO-TOGND Variation of channel input capacitance GND Pin = 0 V, F = 1 GHz, VBIAS = 2.5 V, channel_x pin to gnd – channel_y pin to gnd VBR Break-down voltage IIO = 1 mA ILEAK Leakage current VIO = 2.5 V (1) (2) (3) GND Pin to Pin x GND Pin to Pin x GND Pin to Pin x MAX 5.5 IPP= 1 A, tp = 8/20 μs, from I/O to ground (1) UNIT V V 3.3 IPP= 3A, tp = 8/20 μs, from ground to I/O (1) RDYN TYP 7.6 0.65 (2) Ω 0.8 TBD (2) Ω TBD TBD (2) Ω TBD 0.42 0.5 pF 0.1 0.15 pF 0.05 0.07 pF 8.5 V 10 nA 6.5 1 Non-repetitive current pulse 8/20us exponentially decaying waveform according to IEC61000-4-5. Extraction of RDYIN using least squares fit of TLP characteristics between I = 10 A and I = 20 A. Capacitance data is taken at 25°C. Copyright © 2012–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TPD1E05U06 TPD4E05U06 TPD6E05U06 5 TPD1E05U06 TPD4E05U06 TPD6E05U06 SLVSBO7B – DECEMBER 2012 – REVISED JANUARY 2013 www.ti.com TYPICAL CHARACTERISTICS CURRENT vs VOLTAGE CURRENT and POWER vs TIME 3.5 1.0 0.8 50 Current Power 3.0 45 40 0.6 2.5 0.2 0.0 ±0.2 35 30 2.0 25 1.5 20 15 1.0 ±0.4 Power (W) Current (A) Current (mA) 0.4 10 ±0.6 0.5 ±0.8 5 0.0 ±1.0 ±2 0 ±1 1 2 3 4 5 6 7 8 9 Voltage (V) 0 0 ±5 10 5 10 15 20 25 30 35 40 45 50 Time ( s) C002 C001 Figure 4. DC Voltage Sweep I-V Curve Figure 5. Surge Curve (tp = 8/20μs), Pin IO to GND CURRENT vs VOLTAGE CURRENT vs TEMPERATURE 10 300 8 250 6 Current (pA) Current (A) 4 2 0 ±2 ±4 ±6 200 150 100 50 ±8 0 ±10 ±15 ±10 ±5 0 5 10 15 20 25 Voltage (V) ±40 30 20 40 60 80 100 120 C004 Figure 6. TLP Plot IO to GND Figure 7. Leakage vs Temp VOLTAGE vs TIME VOLTAGE vs TIME 10 70 0 60 ±10 50 ±20 Voltage (V) Voltage (V) 0 Temperature (ƒC) 80 40 30 20 ±30 ±40 ±50 ±60 10 ±70 0 ±80 ±10 ±90 0 25 50 75 100 125 150 Time (ns) Figure 8. +8kV IEC Waveform 6 ±20 C003 Submit Documentation Feedback 175 200 0 25 50 75 100 125 150 Time (ns) C005 175 200 C006 Figure 9. –8kV IEC Waveform Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: TPD1E05U06 TPD4E05U06 TPD6E05U06 TPD1E05U06 TPD4E05U06 TPD6E05U06 www.ti.com SLVSBO7B – DECEMBER 2012 – REVISED JANUARY 2013 TYPICAL CHARACTERISTICS (continued) INSERTION LOSS vs FREQUENCY 0 ±1 Insertion Loss (dB) ±2 ±3 ±4 ±5 ±6 ±7 ±8 ±9 ±10 ±11 ±12 100k 1M 10M 100M 1G 1000M Frequency (Hz) 10G 10000M C007 Figure 10. TPD1E05U06 Insertion Loss Copyright © 2012–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TPD1E05U06 TPD4E05U06 TPD6E05U06 7 TPD1E05U06 TPD4E05U06 TPD6E05U06 SLVSBO7B – DECEMBER 2012 – REVISED JANUARY 2013 www.ti.com TYPICAL CHARACTERISTICS (continued) Figure 11. TPD1E05U06 Eye Diagrams 8 Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links: TPD1E05U06 TPD4E05U06 TPD6E05U06 TPD1E05U06 TPD4E05U06 TPD6E05U06 www.ti.com SLVSBO7B – DECEMBER 2012 – REVISED JANUARY 2013 REVISION HISTORY Changes from Original (December 2012) to Revision A • Page Added TPS2EUSB30A part to document. ............................................................................................................................ 1 Changes from Revision A (December 2012) to Revision B Page • Added Insertion Loss Graphic. ............................................................................................................................................. 6 • Added Eye Diagrams. ........................................................................................................................................................... 8 Copyright © 2012–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TPD1E05U06 TPD4E05U06 TPD6E05U06 9 PACKAGE OPTION ADDENDUM www.ti.com 24-Jan-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Qty Drawing Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) TPD1E05U06DPYR ACTIVE X2SON DPY 2 10000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 C1 TPD1E05U06DPYT ACTIVE X2SON DPY 2 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 C1 TPD4E05U06DQAR PREVIEW SON DQA 10 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TPD6E05U06RVZR PREVIEW UQFN RVZ 14 3000 TBD Call TI Call TI -40 to 85 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Only one of markings shown within the brackets will appear on the physical device. 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