TI LMP91000

LMP91000
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SNAS506H – JANUARY 2011 – REVISED MARCH 2013
LMP91000 Sensor AFE System: Configurable AFE Potentiostat for Low-Power Chemical
Sensing Applications
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FEATURES
DESCRIPTION
•
•
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•
•
The LMP91000 is a programmable Analog Front End
(AFE) for use in micro-power electrochemical sensing
applications. It provides a complete signal path
solution between a sensor and a microcontroller that
generates an output voltage proportional to the cell
current. The LMP91000’s programmability enables it
to support multiple electrochemical sensors such as
3-lead toxic gas sensors and 2-lead galvanic cell
sensors with a single design as opposed to the
multiple discrete solutions. The LMP91000 supports
gas sensitivities over a range of 0.5 nA/ppm to 9500
nA/ppm. It also allows for an easy conversion of
current ranges from 5µA to 750µA full scale.
1
23
•
•
•
•
•
•
•
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•
•
Typical Values, TA = 25°C
Supply Voltage 2.7 V to 5.25 V
Supply Current (Average Over Time) <10 µA
Cell Conditioning Current up to 10 mA
Reference Electrode Bias Current (85°C)
900pA (max)
Output Drive Current 750µA
Complete Potentiostat Circuit to Interface to
Most Chemical Cells
Programmable Cell Bias Voltage
Low Bias Voltage Drift
Programmable TIA gain 2.75kΩ to 350kΩ
Sink and Source Capability
I2C Compatible Digital Interface
Ambient Operating Temperature -40°C to 85°C
Package 14 pin WSON
Supported by WEBENCH® Sensor AFE
Designer
APPLICATIONS
•
•
•
Chemical Species Identification
Amperometric Applications
Electrochemical Blood Glucose Meter
The LMP91000’s adjustable cell bias and
transimpedance
amplifier
(TIA)
gain
are
programmable through the I2C interface. The I2C
interface can also be used for sensor diagnostics. An
integrated temperature sensor can be read by the
user through the VOUT pin and used to provide
additional signal correction in the µC or monitored to
verify temperature conditions at the sensor.
The LMP91000 is optimized for micro-power
applications and operates over a voltage range of
2.7V to 5.25V. The total current consumption can be
less than 10μA. Further power savings are possible
by switching off the TIA amplifier and shorting the
reference electrode to the working electrode with an
internal switch.
1
2
3
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
WEBENCH is a registered trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2011–2013, Texas Instruments Incorporated
LMP91000
SNAS506H – JANUARY 2011 – REVISED MARCH 2013
www.ti.com
Typical Application
VDD
VREF
SCL
LMP91000
3-Lead
Electrochemical
Cell
CE
VARIABLE
BIAS
+
A1
I2C INTERFACE
AND
CONTROL
REGISTERS
VREF
DIVIDER
SDA
CONTROLLER
MENB
-
CE
RE
RE
TEMP
SENSOR
WE
WE
VOUT
+
-
DGND
TIA
RLoad
RTIA
AGND
C2
C1
Figure 1. AFE Gas Detector
Connection Diagram
DGND 1
14 CE
MENB
RE
SCL
WE
SDA
VREF
DAP
NC
C1
VDD
C2
AGND 7
8
VOUT
Figure 2. 14–Pin WSON — Top View
PIN DESCRIPTIONS
2
Name
Pin
Description
DGND
1
Connect to ground
MENB
2
Module Enable, Active Low
SCL
3
Clock signal for I2C compatible interface
SDA
4
Data for I2C compatible interface
NC
5
Not Internally Connected
VDD
6
Supply Voltage
AGND
7
Ground
VOUT
8
Analog Output
C2
9
External filter connector (Filter between C1 and C2)
C1
10
External filter connector (Filter between C1 and C2)
VREF
11
Voltage Reference input
WE
12
Working Electrode. Output to drive the Working Electrode of the chemical sensor
RE
13
Reference Electrode. Input to drive Counter Electrode of the chemical sensor
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PIN DESCRIPTIONS (continued)
Name
Pin
CE
14
DAP
Description
Counter Electrode. Output to drive Counter Electrode of the chemical sensor
Connect to AGND
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1) (2)
ESD Tolerance
(3)
Human Body Model
2kV
Charge-Device Model
1kV
Machine Model
200V
Voltage between any two pins
6.0V
Current through VDD or VSS
50mA
Current sunk and sourced by CE pin
10mA
Current out of other pins
(4)
5mA
Storage Temperature Range
Junction Temperature
-65°C to 150°C
(5)
150°C
For soldering specifications:
see product folder at www.national.com and
www.national.com/ms/MS/MS-SOLDERING.pdf
(1)
(2)
(3)
(4)
(5)
“Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of
device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or
other conditions beyond those indicated in the Operating Ratings is not implied. Operating Ratings indicate conditions at which the
device is functional and the device should not be operated beyond such conditions.
If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.
Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of
JEDEC) Field- Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC).
All non-power pins of this device are protected against ESD by snapback devices. Voltage at such pins will rise beyond absmax if
current is forced into pin.
The maximum power dissipation is a function of TJ(MAX), θJA, and the ambient temperature, TA. The maximum allowable power
dissipation at any ambient temperature is PDMAX = (TJ(MAX) - TA)/ θJA All numbers apply for packages soldered directly onto a PC board.
Operating Ratings (1)
Supply Voltage VS=(VDD - AGND)
Temperature Range
2.7V to 5.25V
(2)
Package Thermal Resistance
-40°C to 85°C
(2)
14-Pin WSON (θJA)
(1)
(2)
44 °C/W
“Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of
device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or
other conditions beyond those indicated in the Operating Ratings is not implied. Operating Ratings indicate conditions at which the
device is functional and the device should not be operated beyond such conditions.
The maximum power dissipation is a function of TJ(MAX), θJA, and the ambient temperature, TA. The maximum allowable power
dissipation at any ambient temperature is PDMAX = (TJ(MAX) - TA)/ θJA All numbers apply for packages soldered directly onto a PC board.
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Electrical Characteristics
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(1)
Unless otherwise specified, all limits guaranteed for TA = 25°C, VS=(VDD – AGND), VS=3.3V and AGND = DGND =0V,
VREF= 2.5V, Internal Zero= 20% VREF. Boldface limits apply at the temperature extremes.
Parameter
Test Conditions
Min
(2)
Typ
(3)
Max
(2)
Units
POWER SUPPLY SPECIFICATION
IS
Supply Current
3-lead amperometric cell mode
MODECN = 0x03
10
15
13.5
Standby mode
MODECN = 0x02
6.5
10
8
Temperature Measurement mode with TIA OFF
MODECN = 0x06
11.4
15
13.5
Temperature Measurement mode with TIA ON
MODECN = 0x07
14.9
20
18
2-lead ground referred galvanic cell mode
VREF=1.5V
MODECN = 0x01
6.2
9
8
Deep Sleep mode
MODECN = 0x00
0.6
1
0.85
µA
POTENTIOSTAT
Bias_RW
Bias Programming range
(differential voltage between RE
pin and WE pin)
Percentage of voltage referred to VREF or VDD
Bias Programming Resolution
First two smallest step
±1
All other steps
±2
±24
-90
-800
90
800
VDD=5.25V;
Internal Zero 50% VDD
-90
-900
90
900
Input bias current at RE pin
ICE
Minimum operating current
capability
sink
750
source
750
Minimum charging capability (4)
sink
10
source
10
AOL_A1
Open loop voltage gain of control
loop op amp (A1)
300mV≤VCE≤Vs-300mV;
-750µA≤ICE≤750µA
en_RW
Low Frequency integrated noise
between RE pin and WE pin
0.1Hz to 10Hz, Zero Bias
(5)
0.1Hz to 10Hz, with Bias
(5) (6)
(2)
(3)
(4)
(5)
(6)
4
%
VDD=2.7V;
Internal Zero 50% VDD
IRE
(1)
%
104
120
pA
µA
mA
dB
3.4
µVpp
5.1
Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under
conditions of internal self-heating where TJ > TA. Absolute Maximum Ratings indicate junction temperature limits beyond which the
device may be permanently degraded, either mechanically or electrically.
Limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlations using
statistical quality control (SQC) method.
Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on
shipped production material.
At such currents no accuracy of the output voltage can be expected.
This parameter includes both A1 and TIA's noise contribution.
In case of external reference connected, the noise of the reference has to be added.
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Electrical Characteristics (1) (continued)
Unless otherwise specified, all limits guaranteed for TA = 25°C, VS=(VDD – AGND), VS=3.3V and AGND = DGND =0V,
VREF= 2.5V, Internal Zero= 20% VREF. Boldface limits apply at the temperature extremes.
Parameter
Test Conditions
Min
(2)
Typ
(3)
Max
(2)
Units
0% VREF
Internal Zero=20% VREF
0% VREF
Internal Zero=50% VREF
-550
550
±1% VREF
-575
575
±2% VREF
-610
610
±4% VREF
-750
750
±6% VREF
-840
840
±8% VREF
-930
930
±10% VREF
-1090
1090
±12% VREF
-1235
1235
±14% VREF
-1430
1430
±16% VREF
-1510
1510
±18% VREF
-1575
1575
±20% VREF
-1650
1650
±22% VREF
-1700
1700
±24% VREF
-1750
1750
-4
4
±1% VREF
-4
4
±2% VREF
-4
4
±4% VREF
-5
5
±6% VREF
-5
5
±8% VREF
-5
5
±10% VREF
-6
6
±12% VREF
-6
6
±14% VREF
-7
7
±16% VREF
-7
7
±18% VREF
-8
8
±20% VREF
-8
8
±22% VREF
-8
8
±24% VREF
-8
8
0% VREF
Internal Zero=67% VREF
VOS_RW
WE Voltage Offset referred to RE
BIAS polarity
(7)
µV
0% VREF
Internal Zero=20% VREF
0% VREF
Internal Zero=50% VREF
0% VREF
Internal Zero=67% VREF
TcVOS_RW
(7)
(8)
WE Voltage Offset Drift referred
to RE from -40°C to 85°C
(8)
BIAS polarity
(7)
µV/°C
For negative bias polarity the Internal Zero is set at 67% VREF.
Offset voltage temperature drift is determined by dividing the change in VOS at the temperature extremes by the total temperature
change. Starting from the measured voltage offset at temperature T1 (VOS_RW(T1)), the voltage offset at temperature T2 (VOS_RW(T2)) is
calculated according the following formula: VOS_RW(T2)=VOS_RW(T1)+ABS(T2–T1)* TcVOS_RW.
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Electrical Characteristics (1) (continued)
Unless otherwise specified, all limits guaranteed for TA = 25°C, VS=(VDD – AGND), VS=3.3V and AGND = DGND =0V,
VREF= 2.5V, Internal Zero= 20% VREF. Boldface limits apply at the temperature extremes.
Parameter
TIA_GAIN
Test Conditions
Min
(2)
Typ
Transimpedance gain accuracy
Linearity
Programmable TIA Gains
TIA_ZV
Internal zero voltage
Programmable Load
%
2.75
3.5
7
14
35
120
350
350
3 programmable percentages of VREF
20
50
67
3 programmable percentages of VDD
20
50
67
kΩ
%
±0.04
%
10
33
50
100
Ω
5
%
110
dB
4 programmable resistive loads
Power Supply Rejection Ratio at
RE pin
Units
±0.05
Load accuracy
PSRR
(2)
%
Maximum external gain resistor
2.7 ≤VDD≤5.25V
Max
5
7 programmable gain resistors
Internal zero voltage Accuracy
RL
(3)
Internal zero 20% VREF
Internal zero 50% VREF
80
Internal zero 67% VREF
TEMPERATURE SENSOR SPECIFICATION (Refer to Table 1 in the Function Description for details)
Temperature Error
TA=-40˚C to 85˚C
Sensitivity
TA=-40˚C to 85˚C
-3
3
-8.2
Power on time
°C
mV/°C
1.9
ms
EXTERNAL REFERENCE SPECIFICATION
VREF
External Voltage reference range
1.5
VDD
Input impedance
10
V
MΩ
I2C Interface (1)
Unless otherwise specified, all limits guaranteed for at TA = 25°C, VS=(VDD – AGND), 2.7V <VS< 5.25V and AGND = DGND
=0V, VREF= 2.5V. Boldface limits apply at the temperature extremes
Parameter
VIH
Input High Voltage
VIL
Input Low Voltage
VOL
Output Low Voltage
Hysteresis
CIN
(1)
(2)
(3)
(4)
6
Test Conditions
Min
(2)
Typ
(3)
Max
(2)
0.7*VDD
V
IOUT=3mA
(4)
0.1*VDD
Input Capacitance on all digital pins
Units
0.3*VDD
V
0.4
V
V
0.5
pF
Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under
conditions of internal self-heating where TJ > TA. Absolute Maximum Ratings indicate junction temperature limits beyond which the
device may be permanently degraded, either mechanically or electrically.
Limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlations using
statistical quality control (SQC) method.
Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on
shipped production material.
This parameter is guaranteed by design or characterization.
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Timing Characteristics
(1)
Unless otherwise specified, all limits guaranteed for TA = 25°C, VS=(VDD – AGND), VS=3.3V and AGND = DGND =0V,
VREF= 2.5V, Internal Zero= 20% VREF. Boldface limits apply at the temperature extremes. Refer to Timing Diagram.
Parameter
Test Conditions
Min
Typ
Max
Units
100
kHz
fSCL
Clock Frequency
10
tLOW
Clock Low Time
4.7
µs
tHIGH
Clock High Time
4.0
µs
4.0
µs
After this period, the first clock
pulse is generated
tHD;STA
Data valid
tSU;STA
Set-up time for a repeated START condition
4.7
µs
tHD;DAT
Data hold time (2)
0
ns
tSU;DAT
Data Setup time
250
ns
tf
SDA fall time
tSU;STO
Set-up time for STOP condition
4.0
µs
tBUF
Bus free time between a STOP and START
condition
4.7
µs
tVD;DAT
Data valid time
3.45
µs
tVD;ACK
Data valid acknowledge time
3.45
µs
tSP
Pulse width of spikes that must be
suppressed by the input filter (3)
50
ns
t_timeout
SCL and SDA Timeout
25
100
ms
tEN;START
I2C Interface Enabling
600
ns
IL ≤ 3mA;
CL ≤ 400pF
(3)
250
2
ns
tEN;STOP
I C Interface Disabling
600
ns
tEN;HIGH
time between consecutive I2C interface
enabling and disabling
600
ns
(1)
(2)
(3)
Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under
conditions of internal self-heating where TJ > TA. Absolute Maximum Ratings indicate junction temperature limits beyond which the
device may be permanently degraded, either mechanically or electrically.
LMP91000 provides an internal 300ns minimum hold time to bridge the undefined region of the falling edge of SCL.
This parameter is guaranteed by design or characterization.
TIMING DIAGRAM
MENB
70%
30%
tEN;START
tEN;HIGH
tEN;STOP
70%
SDA
30%
tf
tLOW
tVD;DAT
tBUF
tHD;STA
tSP
SCL
70%
30%
tSU;STA
tHD;STA
tHIGH
tHD;DAT
START
1/fSCL
tSU;STO
tSU;DAT
tVD;ACK
REPEATED
START
STOP
START
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Typical Performance Characteristics
Unless otherwise specified, TA = 25°C, VS=(VDD – AGND), 2.7V <VS< 5.25V and AGND = DGND =0V, VREF= 2.5V.
Input VOS_RW
vs.
temperature (Vbias 0mV)
-100
-100
VDD = 2.7V
VDD = 3.3V
VDD = 5V
-120
-140
-140
-160
-160
-180
-200
-220
-180
-200
-220
-240
-240
-260
-260
-280
-280
-300
-300
-50
-25
0
25
50
75
TEMPERATURE (°C)
100
2.5
3.0
3.5
4.0
4.5
5.0
SUPPLY VOLTAGE (V)
5.5
IWE Step current response (rise)
IWE Step current response (fall)
2.75k
3.5k
7k
14k
35k
120k
350k
IWE
IWE(50 A/DIV)
IWE(50 A/DIV)
IWE
NORMALIZED OUTPUT TIA (200mV/DIV)
Figure 4.
NORMALIZED OUTPUT (200mV/DIV)
Figure 3.
2.75k
3.5k
7k
14k
35k
120k
350k
TIME (200 s/DIV)
TIME (200 s/DIV)
Figure 5.
Figure 6.
AC PSRR
vs.
Frequency
Temperature sensor output
vs.
VDD (Temperature = 30°C)
140
1320
130
1318
120
VOUT (mV)
PSRR (dB)
85°C
25°C
-40°C
-120
VOS ( V)
VOS ( V)
Input VOS_RW
vs.
VDD (Vbias 0mV)
110
1316
1314
100
1312
90
80
1310
10
100
1k
10k
FREQUENCY (Hz)
100k
Figure 7.
8
2.5
3.0 3.5 4.0 4.5 5.0
SUPPLY VOLTAGE (V)
5.5
Figure 8.
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Typical Performance Characteristics (continued)
Unless otherwise specified, TA = 25°C, VS=(VDD – AGND), 2.7V <VS< 5.25V and AGND = DGND =0V, VREF= 2.5V.
Supply current
vs.
temperature (Deep Sleep Mode)
SUPPLY CURRENT ( A)
0.9
1.0
VDD = 2.7V
VDD = 3.3V
VDD = 5V
0.8
0.7
0.6
0.5
0.4
0.3
0.2
SUPPLY CURRENT ( A)
7.25
0
25
50
TEMPERATURE (°C)
75
100
0.5
0.4
0.3
2.5
3.0
3.5
4.0
4.5
5.0
SUPPLY VOLTAGE (V)
Figure 10.
Supply current
vs.
temperature (Standby Mode)
Supply current
vs.
VDD (Standby Mode)
7.50
VDD = 2.7V
VDD = 3.3V
VDD = 5V
6.75
6.50
6.25
6.00
5.5
85°C
25°C
-40°C
7.25
5.75
7.00
6.75
6.50
6.25
6.00
5.75
5.50
5.50
-25
0
25
50
TEMPERATURE (°C)
75
100
2.5
3.0
3.5
4.0
4.5
5.0
SUPPLY VOLTAGE (V)
5.5
Figure 11.
Figure 12.
Supply current
vs.
temperature (3-lead amperometric Mode)
Supply current
vs.
VDD (3-lead amperometric Mode)
10.8
11.0
VDD = 2.7V
VDD = 3.3V
VDD = 5V
10.8
SUPPLY CURRENT ( A)
11.0
SUPPLY CURRENT ( A)
0.6
Figure 9.
7.00
-50
0.7
0.1
-25
SUPPLY CURRENT ( A)
7.50
0.8
0.2
0.1
-50
85°C
25°C
-40°C
0.9
SUPPLY CURRENT ( A)
1.0
Supply current
vs.
VDD (Deep Sleep Mode)
10.6
10.4
10.2
10.0
9.8
9.6
9.4
9.2
10.6
10.4
10.2
10.0
9.8
9.6
9.4
9.2
9.0
-50
85°C
25°C
-40°C
9.0
-25
0
25
50
75
TEMPERATURE (°C)
100
Figure 13.
2.5
3.0
3.5
4.0
4.5
5.0
SUPPLY VOLTAGE (V)
5.5
Figure 14.
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Typical Performance Characteristics (continued)
Unless otherwise specified, TA = 25°C, VS=(VDD – AGND), 2.7V <VS< 5.25V and AGND = DGND =0V, VREF= 2.5V.
Supply current
vs.
temperature (Temp Measurement TIA ON)
SUPPLY CURRENT ( A)
16.5
16.0
VDD = 2.7V
VDD = 3.3V
VDD = 5V
16.0
15.5
15.0
14.5
14.0
13.5
15.4
15.2
15.0
14.8
14.6
14.4
14.0
-25
0
25
50
75
TEMPERATURE (°C)
100
2.5
3.0
3.5
4.0
4.5
5.0
SUPPLY VOLTAGE (V)
5.5
Figure 15.
Figure 16.
Supply current
vs.
temperature (Temp Measurement TIA OFF)
Supply current
vs.
VDD (Temp Measurement TIA OFF)
SUPPLY CURRENT ( A)
12.5
13.0
VDD = 2.7V
VDD = 3.3V
VDD = 5V
SUPPLY CURRENT ( A)
13.0
12.0
11.5
11.0
10.5
10.0
9.5
9.0
-50
85°C
25°C
-40°C
12.5
12.0
11.5
11.0
10.5
10.0
-25
0
25
50
75
TEMPERATURE (°C)
100
2.5
3.0
3.5
4.0
4.5
5.0
SUPPLY VOLTAGE (V)
5.5
Figure 17.
Figure 18.
Supply current
vs.
temperature (2-lead ground referred amperometric Mode)
Supply current
vs.
VDD (2-lead ground referred amperometric Mode)
SUPPLY CURRENT ( A)
7.25
9.0
VDD = 2.7V
VDD = 3.3V
VDD = 5V
7.00
6.75
6.50
6.25
6.00
5.75
5.50
8.0
7.5
7.0
6.5
6.0
5.5
5.25
5.00
-50
85°C
25°C
-40°C
8.5
SUPPLY CURRENT ( A)
7.50
5.0
-25
0
25
50
TEMPERATURE (°C)
75
100
Figure 19.
10
15.6
14.2
13.0
-50
85°C
25°C
-40°C
15.8
SUPPLY CURRENT ( A)
17.0
Supply current
vs.
VDD (Temp Measurement TIA ON)
2.5
3.0
3.5
4.0
4.5
5.0
SUPPLY VOLTAGE (V)
5.5
Figure 20.
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Typical Performance Characteristics (continued)
Unless otherwise specified, TA = 25°C, VS=(VDD – AGND), 2.7V <VS< 5.25V and AGND = DGND =0V, VREF= 2.5V.
0.1Hz to 10Hz noise, 0V bias
0.1Hz to 10Hz noise, 300mV bias
1.5
2.5
2.0
1.5
0.5
EN_RW ( V)
EN_RW ( V)
1.0
0.0
-0.5
1.0
0.5
0.0
-0.5
-1.0
-1.5
-1.0
-2.0
-1.5
-2.5
1
2
3
4 5 6
TIME (s)
7
8
9 10
0
1
2
3
4 5 6
TIME (s)
7
8
9 10
Figure 21.
Figure 22.
0.1Hz to 10Hz noise, 600mV bias
A VOUT step response 100 ppm to 400 ppm CO
(CO gas sensor connected to LMP91000)
2.5
2.0
2.0
1.9
1.5
1.8
1.0
1.7
VOUT (V)
EN_RW ( V)
0
0.5
0.0
-0.5
1.6
1.5
1.4
-1.0
1.3
-1.5
1.2
-2.0
LMP91000
RTIA=35k ,
Rload=10 ,
VREF=5V
1.1
-2.5
1.0
0
1
2
3
4 5 6
TIME (s)
7
8
9 10
Figure 23.
0
25
50
75
100
TIME (s)
125
150
Figure 24.
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FUNCTION DESCRIPTION
GENERAL
The LMP91000 is a programmable AFE for use in micropower chemical sensing applications. The LMP91000 is
designed for 3-lead single gas sensors and for 2-lead galvanic cell sensors. This device provides all of the
functionality for detecting changes in gas concentration based on a delta current at the working electrode. The
LMP91000 generates an output voltage proportional to the cell current. Transimpedance gain is user
programmable through an I2C compatible interface from 2.75kΩ to 350kΩ making it easy to convert current
ranges from 5µA to 750µA full scale. Optimized for micro-power applications, the LMP91000 AFE works over a
voltage range of 2.7V to 5.25 V. The cell voltage is user selectable using the on board programmability. In
addition, it is possible to connect an external transimpedance gain resistor. A temperature sensor is embedded
and it can be power cycled through the interface. The output of this temperature sensor can be read by the user
through the VOUT pin. It is also possible to have both temperature output and output of the TIA at the same
time; the pin C2 is internally connected to the output of the transimpedance (TIA), while the temperature is
available at the VOUT pin. Depending on the configuration, total current consumption for the device can be less
than 10µA. For power savings, the transimpedance amplifier can be turned off and instead a load impedance
equivalent to the TIA’s inputs impedance is switched in.
VDD
VREF
LMP91000
3-Lead
Electrochemical
Cell
CE
+
A1
SCL
VARIABLE
BIAS
I2C INTERFACE
AND
CONTROL
REGISTERS
VREF
DIVIDER
SDA
MENB
-
CE
RE
RE
TEMP
SENSOR
WE
WE
VOUT
+
-
DGND
TIA
RLoad
RTIA
C1
AGND
C2
Figure 25. System Block Diagram
POTENTIOSTAT CIRCUITRY
The core of the LMP91000 is a potentiostat circuit. It consists of a differential input amplifier used to compare the
potential between the working and reference electrodes to a required working bias potential (set by the Variable
Bias circuitry). The error signal is amplified and applied to the counter electrode (through the Control Amplifier
- A1). Any changes in the impedance between the working and reference electrodes will cause a change in the
voltage applied to the counter electrode, in order to maintain the constant voltage between working and
reference electrodes. A Transimpedance Amplifier connected to the working electrode, is used to provide an
output voltage that is proportional to the cell current. The working electrode is held at virtual ground (Internal
ground) by the transimpedance amplifier. The potentiostat will compare the reference voltage to the desired bias
potential and adjust the voltage at the counter electrode to maintain the proper working-to-reference voltage.
Transimpedance amplifier
The transimpedance amplifier (TIA in Figure 25) has 7 programmable internal gain resistors. This accommodates
the full scale ranges of most existing sensors. Moreover an external gain resistor can be connected to the
LMP91000 between C1 and C2 pins. The gain is set through the I2C interface.
12
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Control amplifier
The control amplifier (A1 op amp in Figure 25) has two tasks: a) providing initial charge to the sensor, b)
providing a bias voltage to the sensor. A1 has the capability to drive up to 10mA into the sensor in order to to
provide a fast initial conditioning. A1 is able to sink and source current according to the connected gas sensor
(reducing or oxidizing gas sensor). It can be powered down to reduce system power consumption. However
powering down A1 is not recommended, as it may take a long time for the sensor to recover from this situation.
Variable Bias
The Variable Bias block circuitry (Figure 25) provides the amount of bias voltage required by a biased gas sensor
between its reference and working electrodes. The bias voltage can be programmed to be 1% to 24% (14 steps
in total) of the supply, or of the external reference voltage. The 14 steps can be programmed through the I2C
interface. The polarity of the bias can be also programmed.
Internal zero
The internal Zero is the voltage at the non-inverting pin of the TIA. The internal zero can be programmed to be
either 67%, 50% or 20%, of the supply, or the external reference voltage. This provides both sufficient headroom
for the counter electrode of the sensor to swing, in case of sudden changes in the gas concentration, and best
use of the ADC’s full scale input range.
The Internal zero is provided through an internal voltage divider (Vref divider box in Figure 25). The divider is
programmed through the I2C interface.
Temperature sensor
The embedded temperature sensor can be switched off during gas concentration measurement to save power.
The temperature measurement is triggered through the I2C interface. The temperature output is available at the
VOUT pin until the configuration bit is reset. The output signal of the temperature sensor is a voltage, referred to
the ground of the LMP91000 (AGND).
Table 1. Temperature Sensor Transfer
Temperature
(°C)
Output Voltage
(mV)
Temperature
(°C)
Output Voltage
(mV)
-40
1875
23
1375
-39
1867
24
1367
-38
1860
25
1359
-37
1852
26
1351
-36
1844
27
1342
-35
1836
28
1334
-34
1828
29
1326
-33
1821
30
1318
-32
1813
31
1310
-31
1805
32
1302
-30
1797
33
1293
-29
1789
34
1285
-28
1782
35
1277
-27
1774
36
1269
-26
1766
37
1261
-25
1758
38
1253
-24
1750
39
1244
-23
1742
40
1236
-22
1734
41
1228
-21
1727
42
1220
-20
1719
43
1212
-19
1711
44
1203
-18
1703
45
1195
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Table 1. Temperature Sensor Transfer (continued)
-17
1695
46
1187
-16
1687
47
1179
-15
1679
48
1170
-14
1671
49
1162
-13
1663
50
1154
-12
1656
51
1146
-11
1648
52
1137
-10
1640
53
1129
-9
1632
54
1121
-8
1624
55
1112
-7
1616
56
1104
-6
1608
57
1096
-5
1600
58
1087
-4
1592
59
1079
-3
1584
60
1071
-2
1576
61
1063
-1
1568
62
1054
0
1560
63
1046
1
1552
64
1038
2
1544
65
1029
3
1536
66
1021
4
1528
67
1012
5
1520
68
1004
6
1512
69
996
7
1504
70
987
8
1496
71
979
9
1488
72
971
10
1480
73
962
11
1472
74
954
12
1464
75
945
13
1456
76
937
14
1448
77
929
15
1440
78
920
16
1432
79
912
17
1424
80
903
18
1415
81
895
19
1407
82
886
20
1399
83
878
21
1391
84
870
22
1383
85
861
Although the temperature sensor is very linear, its response does have a slight downward parabolic shape. This
shape is very accurately reflected in Table 1. For a linear approximation, a line can easily be calculated over the
desired temperature range from Table 1 using the two-point equation:
V-V1=((V2–V1)/(T2–T1))*(T-T1)
Where V is in mV, T is in °C, T1 and V1 are the coordinates of the lowest temperature, T2 and V2 are the
coordinates of the highest temperature.
For example, if we want to determine the equation of a line over a temperature range of 20°C to 50°C, we would
proceed as follows:
14
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V-1399mV=((1154mV - 1399mV)/(50°C -20°C))*(T-20°C)
V-1399mV= -8.16mV/°C*(T-20°C)
V=(-8.16mV/°C)*T+1562.2mV
Using this method of linear approximation, the transfer function can be approximated for one or more
temperature ranges of interest.
I2C INTERFACE
The I2C compatible interface operates in Standard mode (100kHz). Pull-up resistors or current sources are
required on the SCL and SDA pins to pull them high when they are not being driven low. A logic zero is
transmitted by driving the output low. A logic high is transmitted by releasing the output and allowing it to be
pulled-up externally. The appropriate pull-up resistor values will depend upon the total bus capacitance and
operating speed. The LMP91000 comes with a 7 bit bus fixed address: 1001 000.
WRITE AND READ OPERATION
In order to start any read or write operation with the LMP91000, MENB needs to be set low during the whole
communication. Then the master generates a start condition by driving SDA from high to low while SCL is high.
The start condition is always followed by a 7-bit slave address and a Read/Write bit. After these 8 bits have been
transmitted by the master, SDA is released by the master and the LMP91000 either ACKs or NACKs the
address. If the slave address matches, the LMP91000 ACKs the master. If the address doesn't match, the
LMP91000 NACKs the master. For a write operation, the master follows the ACK by sending the 8-bit register
address pointer. Then the LMP91000 ACKs the transfer by driving SDA low. Next, the master sends the 8-bit
data to the LMP91000. Then the LMP91000 ACKs the transfer by driving SDA low. At this point the master
should generate a stop condition and optionally set the MENB at logic high level (refer to Figure 26, Figure 27,
and Figure 28).
A read operation requires the LMP91000 address pointer to be set first, also in this case the master needs
setting at low logic level the MENB, then the master needs to write to the device and set the address pointer
before reading from the desired register. This type of read requires a start, the slave address, a write bit, the
address pointer, a Repeated Start (if appropriate), the slave address, and a read bit (refer to Figure 26,
Figure 27, and Figure 28). Following this sequence, the LMP91000 sends out the 8-bit data of the register.
When just one LMP91000 is present on the I2C bus the MENB can be tied to ground (low logic level).
MENB
1
9
1
9
SCL
SDA
A6
A5
A4
A3
A2
A1
A0 R/W
Start by
Master
Frame 1
Serial Bus Address Byte
from Master
MENB
(continued)
SCL
(continued)
1
SDA
(continued)
D7
D7
Ack
by
LMP91000
D6
D5
D4
D3
D2
D1
Frame 2
Internal Address Register
Byte from Master
D0
Ack
by
LMP91000
9
D6
D5
D4
D3
Frame 3
Data Byte
D2
D1
D0
Ack
Stop by
by
Master
LMP91000
Figure 26. Register Write Transaction
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MENB
1
9
1
9
SCL
SDA
A6
A5
A4
A3
A2
A1
A0 R/W
D7
Ack
by
LMP91000
Start by
Master
Frame 1
Serial Bus Address Byte
from Master
D6
D5
D4
D3
D2
D1
Frame 2
Internal Address Register
Byte from Master
D0
Ack
by
LMP91000
Stop by
Master
Figure 27. Pointer Set Transaction
MENB
1
9
1
9
SCL
SDA
A6
A5
A4
A3
A2
A1
A0 R/W
D7
Ack
by
LMP91000
Start by
Master
Frame 1
Serial Bus Address Byte
from Master
D6
D5
D4
D3
D2
D1
D0
No Ack
by
Master
Frame 2
Data Byte from
Slave
Stop
by
Master
Figure 28. Register Read Transaction
TIMEOUT FEATURE
The timeout is a safety feature to avoid bus lockup situation. If SCL is stuck low for a time exceeding t_timeout,
the LMP91000 will automatically reset its I2C interface. Also, in the case the LMP91000 hangs the SDA for a time
exceeding t_timeout, the LMP91000’s I2C interface will be reset so that the SDA line will be released. Since the
SDA is an open-drain with an external resistor pull-up, this also avoids high power consumption when LMP91000
is driving the bus and the SCL is stopped.
REGISTERS
The registers are used to configure the LMP91000.
If writing to a reserved bit, user must write only 0. Readback value is unspecified and should be discarded.
Table 2. Register map
Address
Name
Power on default
Access
Lockable?
0x00
STATUS
0x00
Read only
N
0x01
LOCK
0x01
R/W
N
0x02 through 0x09
RESERVED
Y
0x10
TIACN
0x03
R/W
0x11
REFCN
0x20
R/W
Y
0x12
MODECN
0x00
R/W
N
0x13 through 0xFF
RESERVED
STATUS -- Status Register (address 0x00)
The status bit is an indication of the LMP91000's power-on status. If its readback is “0”, the LMP91000 is not
ready to accept other I2C commands.
16
Bit
Name
[7:1]
RESERVED
0
STATUS
Function
Status of Device
0 Not Ready (default)
1 Ready
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LOCK -- Protection Register (address 0x01)
The lock bit enables and disables the writing of the TIACN and the REFCN registers. In order to change the
content of the TIACN and the REFCN registers the lock bit needs to be set to “0”.
Bit
Name
[7:1]
RESERVED
0
LOCK
Function
Write protection
0 Registers 0x10, 0x11 in write mode
1 Registers 0x10, 0x11 in read only mode (default)
TIACN -- TIA Control Register (address 0x10)
The parameters in the TIA control register allow the configuration of the transimpedance gain (RTIA) and the load
resistance (RLoad).
Bit
Name
[7:5]
RESERVED
[4:2]
[1:0]
TIA_GAIN
RLOAD
Function
RESERVED
TIA feedback resistance selection
000 External resistance (default)
001 2.75kΩ
010 3.5kΩ
011 7kΩ
100 14kΩ
101 35kΩ
110 120kΩ
111 350kΩ
RLoad selection
00 10Ω
01 33Ω
10 50Ω
11 100Ω (default)
REFCN -- Reference Control Register (address 0x11)
The parameters in the Reference control register allow the configuration of the Internal zero, Bias and Reference
source. When the Reference source is external, the reference is provided by a reference voltage connected to
the VREF pin. In this condition the Internal Zero and the Bias voltage are defined as a percentage of VREF
voltage instead of the supply voltage.
Bit
7
Name
REF_SOURCE
[6:5]
INT_Z
4
BIAS_SIGN
Function
Reference voltage source selection
0 Internal (default)
1 external
Internal zero selection (Percentage of the source reference)
00 20%
01 50% (default)
10 67%
11 Internal zero circuitry bypassed (only in O2 ground referred measurement)
Selection of the Bias polarity
0 Negative (VWE – VRE)<0V (default)
1 Positive (VWE –VRE)>0V
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Bit
[3:0]
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Name
BIAS
Function
BIAS selection (Percentage of the source reference)
0000 0% (default)
0001 1%
0010 2%
0011 4%
0100 6%
0101 8%
0110 10%
0111 12%
1000 14%
1001 16%
1010 18%
1011 20%
1100 22%
1101 24%
MODECN -- Mode Control Register (address 0x12)
The Parameters in the Mode register allow the configuration of the Operation Mode of the LMP91000.
Bit
Name
7
FET_SHORT
[6:3]
RESERVED
[2:0]
OP_MODE
Function
Shorting FET feature
0 Disabled (default)
1 Enabled
Mode of Operation selection
000 Deep Sleep (default)
001 2-lead ground referred galvanic cell
010 Standby
011 3-lead amperometric cell
110 Temperature measurement (TIA OFF)
111 Temperature measurement (TIA ON)
When the LMP91000 is in Temperature measurement (TIA ON) mode, the output of the temperature sensor is
present at the VOUT pin, while the output of the potentiostat circuit is available at pin C2.
GAS SENSOR INTERFACE
The LMP91000 supports both 3-lead and 2-lead gas sensors. Most of the toxic gas sensors are amperometric
cells with 3 leads (Counter, Worker and Reference). These leads should be connected to the LMP91000 in the
potentiostat topology. The 2-lead gas sensor (known as galvanic cell) should be connected as simple buffer
either referred to the ground of the system or referred to a reference voltage. The LMP91000 support both
connections for 2-lead gas sensor.
3-lead Amperometric Cell In Potentiostat Configuration
Most of the amperometric cell have 3 leads (Counter, Reference and Working electrodes). The interface of the 3lead gas sensor to the LMP91000 is straightforward, the leads of the gas sensor need to be connected to the
namesake pins of the LMP91000.
The LMP91000 is then configured in 3-lead amperometric cell mode; in this configuration the Control Amplifier
(A1) is ON and provides the internal zero voltage and bias in case of biased gas sensor. The transimpedance
amplifier (TIA) is ON, it converts the current generated by the gas sensor in a voltage, according to the
transimpedance gain:
Gain=RTIA
If different gains are required, an external resistor can be connected between the pins C1 and C2. In this case
the internal feedback resistor should be programmed to “external”. The RLoad together with the output
capacitance of the gas sensor acts as a low pass filter.
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VDD
VREF
LMP91000
3-Lead
Electrochemical
Cell
CE
+
A1
SCL
VARIABLE
BIAS
VREF
DIVIDER
I2C INTERFACE
AND
CONTROL
REGISTERS
SDA
MENB
-
CE
RE
RE
TEMP
SENSOR
WE
WE
VOUT
+
-
DGND
TIA
RLoad
RTIA
C1
C2
AGND
Figure 29. 3-Lead Amperometric Cell
2-lead Galvanic Cell In Ground Referred Configuration
When the LMP91000 is interfaced to a galvanic cell (for instance to an Oxygen gas sensor) referred to the
ground of the system, an external resistor needs to be placed in parallel to the gas sensor; the negative
electrode of the gas sensor is connected to the ground of the system and the positive electrode to the Vref pin of
the LMP91000, the working pin of the LMP91000 is connected to the ground.
The LMP91000 is then configured in 2-lead galvanic cell mode and the Vref bypass feature needs to be enabled.
In this configuration the Control Amplifier (A1) is turned off, and the output of the gas sensor is amplified by the
Transimpedance Amplifier (TIA) which is configured as a simple non-inverting amplifier.
The gain of this non inverting amplifier is set according the following formula
Gain= 1+(RTIA/RLoad)
If different gains are required, an external resistor can be connected between the pins C1 and C2. In this case
the internal feedback resistor should be programmed to “external”.
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VE2-wire
Sensor
such as
Oxygen
NC
VE+
VDD
VREF
SCL
LMP91000
I2C INTERFACE
AND
CONTROL
REGISTERS
VARIABLE
BIAS
+
A1
CE
VREF
DIVIDER
SDA
MENB
-
RE
TEMP
SENSOR
WE
DGND
VOUT
+
TIA
RLoad
RTIA
C2
C1
AGND
Figure 30. 2-Lead Galvanic Cell Ground Referred
2-lead Galvanic Cell In Potentiostat Configuration
When the LMP91000 is interfaced to a galvanic cell (for instance to an Oxygen gas sensor) referred to a
reference, the Counter and the Reference pin of the LMP91000 are shorted together and connected to negative
electrode of the galvanic cell. The positive electrode of the galvanic cell is then connected to the Working pin of
the LMP91000.
The LMP91000 is then configured in 3-lead amperometric cell mode (as for amperometric cell). In this
configuration the Control Amplifier (A1) is ON and provides the internal zero voltage. The transimpedance
amplifier (TIA) is also ON, it converts the current generated by the gas sensor in a voltage, according to the
transimpedance gain:
Gain= RTIA
If different gains are required, an external resistor can be connected between the pins C1 and C2. In this case
the internal feedback resistor should be programmed to “external”.
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VDD
VREF
LMP91000
2-wire Sensor
such as Oxygen
CE
+
A1
SCL
VARIABLE
BIAS
VREF
DIVIDER
I2C INTERFACE
AND
CONTROL
REGISTERS
SDA
MENB
-
VERE
NC
TEMP
SENSOR
VE+
WE
VOUT
+
-
DGND
TIA
RLoad
RTIA
C1
C2
AGND
Figure 31. 2-Lead Galvanic Cell In Potentiostat Configuration
APPLICATION INFORMATION
CONNECTION OF MORE THAN ONE LMP91000 TO THE I2C BUS
The LMP91000 comes out with a unique and fixed I2C slave address. It is still possible to connect more than one
LMP91000 to an I2C bus and select each device using the MENB pin. The MENB simply enables/disables the
I2C communication of the LMP91000. When the MENB is at logic level low all the I2C communication is enabled,
it is disabled when MENB is at high logic level.
In a system based on a μcontroller and more than one LMP91000 connected to the I2C bus, the I2C lines (SDA
and SCL) are shared, while the MENB of each LMP91000 is connected to a dedicate GPIO port of the
μcontroller.
The μcontroller starts communication asserting one out of N MENB signals where N is the total number of
LMP91000s connected to the I2C bus. Only the enabled device will acknowledge the I2C commands. After
finishing communicating with this particular LMP91000, the microcontroller de-asserts the corresponding MENB
and repeats the procedure for other LMP91000s. Figure 32 shows the typical connection when more than one
LMP91000 is connected to the I2C bus.
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21
LMP91000
SNAS506H – JANUARY 2011 – REVISED MARCH 2013
SCL
GPIO N
GPIO 3
GPIO 2
µC
SDA
MENB
SCL
LMP91000
SDA
MENB
LMP91000
SDA
MENB
SCL
SDA
GPIO 1
SCL
LMP91000
LMP91000
MENB
www.ti.com
SCL
SDA
Figure 32. More than one LMP91000 on I2C bus
SMART GAS SENSOR ANALOG FRONT END
The LMP91000 together with an external EEPROM represents the core of a SMART GAS SENSOR AFE. In the
EEPROM it is possible to store the information related to the GAS sensor type, calibration and LMP91000's
configuration (content of registers 10h, 11h, 12h). At startup the microcontroller reads the EEPROM's content
and configures the LMP91000. A typical smart gas sensor AFE is shown in Figure 33. The connection of MENB
to the hardware address pin A0 of the EEPROM allows the microcontroller to select the LMP91000 and its
corresponding EEPROM when more than one smart gas sensor AFE is present on the I2C bus. Note: only
EEPROM I2C addresses with A0=0 should be used in this configuration.
SCL
A0
SDA
SCL
MENB
MENB
SCL
SDA
I2C EEPROM
LMP91000
SDA
Figure 33. SMART GAS SENSOR AFE
SMART GAS SENSOR AFES ON I2C BUS
The connection of Smart gas sensor AFEs on the I2C bus is the natural extension of the previous concepts. Also
in this case the microcontroller starts communication asserting 1 out of N MENB signals where N is the total
number of smart gas sensor AFE connected to the I2C bus. Only one of the devices (either LMP91000 or its
corresponding EEPROM) in the smart gas sensor AFE enabled will acknowledge the I2C commands. When the
communication with this particular module ends, the microcontroller de-asserts the corresponding MENB and
repeats the procedure for other modules. Figure 34 shows the typical connection when several smart gas sensor
AFEs are connected to the I2C bus.
22
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LMP91000
SNAS506H – JANUARY 2011 – REVISED MARCH 2013
SMART SENSOR AFE
SMART SENSOR AFE
SCL
SMART SENSOR AFE
GPIO 2
GPIO 1
I2C EEPROM
SDA
SCL
SDA
MENB
LMP91000
A0
I2C EEPROM
A0
SCL
SDA
MENB
SDA
A0
LMP91000
SCL
I2C EEPROM
SCL
SCL
SDA
MENB
LMP91000
SDA
www.ti.com
GPIO N
µC
SCL
SDA
Figure 34. Smart Gas Sensor AFEs on I2C bus
POWER CONSUMPTION
The LMP91000 is intended for use in portable devices, so the power consumption is as low as possible in order
to guarantee a long battery life. The total power consumption for the LMP91000 is below 10µA at 3.3v average
over time, (this excludes any current drawn from any pin). A typical usage of the LMP91000 is in a portable gas
detector and its power consumption is summarized in Table 3. This has the following assumptions:
• Power On only happens a few times over life, so its power consumption can be ignored.
• Deep Sleep mode is not used.
• The system is used about 8 hours a day, and 16 hours a day it is in Standby mode.
• Temperature Measurement is done about once per minute.
This results in an average power consumption of approximately 7.95 µA. This can potentially be further reduced,
by using the Standby mode between gas measurements. It may even be possible, depending on the sensor
used, to go into deep sleep for some time between measurements, further reducing the average power
consumption.
Table 3. Power Consumption Scenario
Deep Sleep
StandBy
3-Lead
Amperometric
Cell
Temperature
Measurement
TIA OFF
Temperature
Measurement
TIA ON
0.6
6.5
10
11.4
14.9
Time ON
(%)
0
60
39
0
1
Average
(µA)
0
3.9
3.9
0
0.15
Current consumption
(µA)
typical value
Total
7.95
Notes
A1
OFF
ON
ON
ON
ON
TIA
OFF
OFF
ON
OFF
ON
TEMP SENSOR
OFF
OFF
OFF
ON
ON
I2C interface
ON
ON
ON
ON
ON
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LMP91000
SNAS506H – JANUARY 2011 – REVISED MARCH 2013
www.ti.com
SENSOR TEST PROCEDURE
The LMP91000 has all the hardware and programmability features to implement some test procedures. The
purpose of the test procedure is to:
a. test proper function of the sensor (status of health)
b. test proper connection of the sensor to the LMP91000
The test procedure is very easy. The variable bias block is user programmable through the digital interface. A
step voltage can be applied by the end user to the positive input of A1. As a consequence a transient current will
start flowing into the sensor (to charge its internal capacitance) and it will be detected by the TIA. If the current
transient is not detected, either a sensor fault or a connection problem is present. The slope and the aspect of
the transient response can also be used to detect sensor aging (for example, a cell that is drying and no longer
efficiently conducts the current). After it is verified that the sensor is working properly, the LMP91000 needs to be
reset to its original configuration. It is not required to observe the full transient in order to contain the testing time.
All the needed information are included in the transient slopes (both edges). Figure 35 shows an example of the
test procedure, a Carbon Monoxide sensor is connected to the LMP91000, two pulses are then sequentially
applied to the bias voltage:
1. from 0mV to 40mV
2. from 40mV to -40mV
and finally the bias is set again at 0mV since this is the normal operation condition for this sensor.
INPUT PULSE (100mV/DIV)
OUTPUTT VOLTTAGE (1V/DIV)
LMP91000 OUTPUT
TEST PULSE
TIME (25ms/DIV)
Figure 35. Test Procedure Example
24
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SNAS506H – JANUARY 2011 – REVISED MARCH 2013
REVISION HISTORY
Changes from Revision G (March 2013) to Revision H
•
Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 24
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25
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
(4)
LMP91000SD/NOPB
ACTIVE
WSON
NHL
14
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-3-260C-168 HR
-40 to 85
L91000
LMP91000SDE/NOPB
ACTIVE
WSON
NHL
14
250
Green (RoHS
& no Sb/Br)
CU SN
Level-3-260C-168 HR
-40 to 85
L91000
LMP91000SDX/NOPB
ACTIVE
WSON
NHL
14
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-3-260C-168 HR
-40 to 85
L91000
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
Samples
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Mar-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
LMP91000SD/NOPB
WSON
NHL
14
LMP91000SDE/NOPB
WSON
NHL
LMP91000SDX/NOPB
WSON
NHL
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
1000
178.0
12.4
4.3
4.3
1.3
8.0
12.0
Q1
14
250
178.0
12.4
4.3
4.3
1.3
8.0
12.0
Q1
14
4500
330.0
12.4
4.3
4.3
1.3
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Mar-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LMP91000SD/NOPB
WSON
NHL
14
1000
213.0
191.0
55.0
LMP91000SDE/NOPB
WSON
NHL
14
250
213.0
191.0
55.0
LMP91000SDX/NOPB
WSON
NHL
14
4500
367.0
367.0
35.0
Pack Materials-Page 2
MECHANICAL DATA
NHL0014B
SDA14B (Rev A)
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