TI AM26LS33A-SP

AM26LS33A-SP
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SLLSE22 – FEBRUARY 2010
QML CLASS V RS-422 QUADRUPLE DIFFERENTIAL LINE RECEIVER
Check for Samples: AM26LS33A-SP
FEATURES
1
•
•
•
•
•
•
•
•
•
•
•
AM26LS33A Devices Meet or Exceed the
Requirements of ANSI TIA/EIA-422-B,
TIA/EIA-423-B, and ITU Recommendations V.10
and V.11
±15-V Common-Mode Range With ±500-mV
Sensitivity
Input Hysteresis . . . 50 mV Typical
Operate From a Single 5-V Supply
Low-Power Schottky Circuitry
3-State Outputs
Complementary Output-Enable Inputs
Input Impedance . . . 12 kΩ Minimum
Designed to Be Interchangeable With
Advanced Micro Device AM26LS33™
QML-V Qualified, SMD 5962-78020
Military Temperature Range (-55°C to 125°C)
•
Rad-Tolerant: 25 kRad (Si) TID
(1)
J PACKAGE
(TOP VIEW)
(1)
Radiation tolerance is a typical value based upon initial device
qualification with dose rate = 10 mrad/sec. Radiation Lot
Acceptance Testing is available - contact factory for details.
DESCRIPTION
The AM26LS33A is a quadruple differential line receiver for balanced and unbalanced digital data transmission.
The enable function is common to all four receivers and offers a choice of active-high or active-low input. The
3-state outputs permit connection directly to a bus-organized system. Fail-safe design ensures that, if the inputs
are open, the outputs always are high.
Compared to the AM26LS33, the AM26LS33A incorporates an additional stage of amplification to improve
sensitivity. The input impedance has been increased, resulting in less loading of the bus line. The additional
stage has increased propagation delay; however, this does not affect interchangeability in most applications.
The AM26LS33A is characterized for operation over the temperature range of –55°C to 125°C.
ORDERING INFORMATION (1)
(1)
(2)
TA
PACKAGE (2)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
–55°C to 125°C
CDIP - J
5962-7802007VEA
5962-7802007VEA
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2010, Texas Instruments Incorporated
AM26LS33A-SP
SLLSE22 – FEBRUARY 2010
www.ti.com
Table 1. FUNCTION TABLE
Each Receiver
ENABLES
DIFFERENTIAL
A–B
VID ≥ VIT+
VIT– ≤ VID ≤ VIT+
VID ≤ VIT–
X
Open
G
G
OUTPUT
Y
H
X
H
X
L
H
H
X
?
X
L
?
H
X
L
X
L
L
L
H
Z
H
X
H
X
L
H
LOGIC DIAGRAM (POSITIVE LOGIC)
G
G
1A
1B
2A
2B
3A
3B
4A
4B
4
12
2
3
1
1Y
6
5
7
2Y
10
11
9
3Y
14
13
15
4Y
SCHEMATICS OF INPUTS AND OUTPUTS
8.3 kΩ
85 Ω
100 kΩ
20 kΩ
960 Ω
960 Ω
100 kΩ
2
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SLLSE22 – FEBRUARY 2010
ABSOLUTE MAXIMUM RATINGS (1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
Supply voltage (2)
VCC
7
Any differential input
VI
Input voltage
VID
Differential input voltage (3)
±25
Other inputs
7
±25
Continuous total power dissipation
(1)
(2)
(3)
V
V
V
See Dissipation Ratings Table
Lead temperature 1.6 mm (1/16 inch) from case for 60
seconds
Tstg
UNIT
Storage temperature range
–65
300
°C
150
°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values, except differential voltages, are with respect to the network ground terminal.
Differential voltage values are at the noninverting (A) input terminals with respect to the inverting (B) input terminals.
1000
Electromigration Fail Mode
Estimated Life (Years)
100
10
1
80
90
100
110
120
130
140
150
160
170
180
190
200
Continuous T J (°C)
A.
See datasheet for absolute maximum and minimum recommended operating conditions.
B.
Silicon operating life design goal is 10 years at 105°C junction temperature (does not include package interconnect
life).
Figure 1. AM26LS33A 16/J Package Operating Life Derating Chart
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RECOMMENDED OPERATING CONDITIONS
MIN
NOM
MAX
4.5
5
5.5
UNIT
VCC
Supply voltage
VIH
High-level input voltage
VIL
Low-level input voltage
VIC
Common-mode input voltage
±15
V
IOH
High-level output current
–440
mA
IOL
Low-level output current
8
mA
TA
Operating free-air temperature
125
°C
MAX
UNIT
2
V
V
0.8
-55
V
ELECTRICAL CHARACTERISTICS
over recommended ranges of VCC, VIC, and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VIT+
Positive-going
input threshold voltage
VO = VOHmin, IOH = –440 mA
-15 V ≤ VIC ≤ 15 V
VIT–
Negative-going
input threshold voltage
VO = 0.45 V , IOL = 8 mA
-15 V ≤ VIC ≤ 15 V
Vhys
Hysteresis voltage
(VIT+ – VIT–)
VIK
Enable-input clamp voltage
VCC = 4.5 V,
VOH
High-level output voltage
VCC = 4.5 V, VID = 1 V,
VI(G) = 0.8 V, IOH = –440 mA
VOL
Low-level output voltage
VCC = 4.5 V, VID = –1 V,
VI(G) = 0.8 V
IOZ
Off-state
(high-impedance state)
output current
VCC = 5.5 V
II
MIN
TYP (1)
0.5
–0.5 (2)
V
50
II = –18 mA
mV
–1.5
2.5
V
V
IOL= 4 mA
0.4
IOL= 8 mA
0.45
VO = 2.4 V
20
VO = 0.4 V
–20
VI = 15 V,
Other input at –10 V to
15 V
1.2
VI = –15 V,
Other input at –15 V to
10 V
–1.7
Line input current
V
V
mA
mA
II(EN)
Enable input current
VI = 5.5 V, VCC = 5.5 V
IH
High-level enable current
VI = 2.7 V, VCC = 5.5 V
20
mA
IL
Low-level enable current
VI = 0.4 V, VCC = 5.5 V
–0.36
mA
ri
Input resistance
VIC = –15 V to 15 V,
IOS
Short-circuit output
current (3)
VCC = MAX, VID = 1 V, VO = 0 V
ICC
Supply current
VCC = MAX, data inputs = GND,
(1)
(2)
(3)
4
100
One input to ac ground
12
15
–15
All outputs disabled
52
mA
kΩ
–85
mA
70
mA
All typical values are at VCC = 5 V, TA = 25°C, and VIC = 0.
The algebraic convention, in which the less positive (more negative) limit is designated as minimum, is used in this data sheet for
threshold levels only.
Not more than one output should be shorted to ground at a time, and duration of the short circuit should not exceed one second.
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SLLSE22 – FEBRUARY 2010
SWITCHING CHARACTERISTICS
VCC = 5 V, over operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
tPLH
Propagation delay time, low-to-high-level
output
CL = 15 pF,
tPHL
Propagation delay time, high-to-low-level
output
CL = 15 pF,
tPZH
Output enable time to high level
CL = 15 pF,
tPZL
Output enable time to low level
CL = 15 pF,
tPHZ
Output disable time from high level
CL = 15 pF,
tPLZ
Output disable time from low level
CL = 15 pF,
(1)
MIN
See Figure 2
TYP (1)
MAX
20
35
TA = –55°C to 125°C
See Figure 2
53
22
TA = –55°C to 125°C
See Figure 2
53
17
TA = –55°C to 125°C
See Figure 2
20
TA = –55°C to 125°C
30
45
30
TA = –55°C to 125°C
25
38
21
See Figure 2
25
38
TA = –55°C to 125°C
See Figure 2
35
40
60
UNIT
ns
ns
ns
ns
ns
ns
All typical values are at VCC = 5 V, TA = 25°C, and VIC = 0.
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PARAMETER MEASUREMENT INFORMATION
VCC
Test
Point
RL = 2 kΩ
2.5 V
S1
From Output
Under Test
CL
(see Note A)
Input
00
–2.5 V
5 kΩ
tPLH
See Note B
tPHL
VOH
Output
S2
1.3 V
1.3 V
VOL
S1 and S2 Closed
TEST CIRCUIT
VOLTAGE WAVEFORMS FOR tPLH, tPHL
≤5 ns
90%
Enable G
≤5 ns
3V
90%
10%
See Note C
90%
90%
10%
S1 Open
S2 Closed
10%
3V
90%
90%
10%
VOH
1.3 V
Output
≈1.4 V
S1 Closed
S2 Closed
tPHZ
10%
S1 Closed
S2 Closed
tPZL
1.3 V
VOLTAGE WAVEFORMS FOR tPHZ, tPZH
3V
1.3 V
1.3 V
0
0.5 V
0
See Note C
Enable G
10%
tPZH
3V
1.3 V1.3 V
10%
0
1.3 V
1.3 V
Enable G
≤5 ns
90%
90%
Enable G
1.3 V1.3 V
10%
Output
≤5 ns
0
≈1.4 V
tPLZ
VOL
S1 Closed
S2 Open
0.5 V
VOLTAGE WAVEFORMS FOR tPLZ, tPZL
NOTES: A. CL includes probe and jig capacitance.
B. All diodes are 1N3064 or equivalent.
C. Enable G is tested with G high; G is tested with G low.
Figure 2. Test Circuit and Voltage Waveforms
6
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TYPICAL CHARACTERISTICS
HIGH-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
High-Level Output Voltage, VOH (V)
High-Level Output Voltage, VOH (V)
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
IOH = –440 μA
High-Level Output Current, IOH (mA)
Free-Air Temperature, TA (°C)
Figure 4.
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
Low-Level Output Voltage, VOL (V)
Low-Level Output Votlage, VOL (V)
Figure 3.
Low-Level Output Current, IOL (mA)
Figure 5.
Free-Air Temperature, TA (°C)
Figure 6.
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TYPICAL CHARACTERISTICS (continued)
OUTPUT VOLTAGE
vs
ENABLE G VOLTAGE
OUTPUT VOLTAGE
vs
ENABLE G VOLTAGE
Load = 8 kΩ to GND
Output Voltage, VO (V)
Output Voltage, VO (V)
Load = 8 kΩ to GND
Enable G Voltage (V)
Enable G Voltage (V)
Figure 8.
OUTPUT VOLTAGE
vs
ENABLE G VOLTAGE
OUTPUT VOLTAGE
vs
ENABLE G VOLTAGE
Output Voltage, VO (V)
Output Voltage, VO (V)
Figure 7.
Load = 1 kΩ to VCC
Load = 1 kΩ to VCC
Enable G Voltage (V)
Enable G Voltage (V)
Figure 9.
8
Figure 10.
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SLLSE22 – FEBRUARY 2010
TYPICAL CHARACTERISTICS (continued)
INPUT CURRENT
vs
INPUT VOLTAGE
Input Current, II (mA)
Output Voltage, VO (V)
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
Differential Input Voltage, VID (mV)
Input Voltage, VI (V)
The unshaded area shows requirements of paragraph 4.2.1 of ANSI
Standards EIA/TIA-422-B and EIA/TIA-423-B.
Figure 11.
Figure 12.
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APPLICATION INFORMATION
Figure 13. Circuit with Multiple Receivers
10
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PACKAGE OPTION ADDENDUM
www.ti.com
29-Aug-2012
PACKAGING INFORMATION
Orderable Device
5962-7802007VEA
Status
(1)
ACTIVE
Package Type Package
Drawing
CDIP
J
Pins
Package Qty
16
1
Eco Plan
TBD
(2)
Lead/
Ball Finish
A42
MSL Peak Temp
(3)
Samples
(Requires Login)
N / A for Pkg Type
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
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provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
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In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF AM26LS33A-SP :
• Catalog: AM26LS33A
• Military: AM26LS33AM
NOTE: Qualified Version Definitions:
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
29-Aug-2012
• Catalog - TI's standard catalog product
• Military - QML certified for Military and Defense Applications
Addendum-Page 2
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