SSD50P03-09D 61A, -30V, RDS(ON) 9mΩ P-Ch Enhancement Mode Power MOSFET Elektronische Bauelemente RoHS Compliant Product A suffix of “-C” specifies halogen free TO-252(D-Pack) DESCRIPTION These miniature surface mount MOSFETs utilize high cell density process. Low RDS(on) assures minimal power loss and conserves energy, making this device ideal for use in power management circuitry. Typical applications are PWMDC-DC converters, power management in portable and battery-powered products such as computers, printers, battery charger, telecommunication power system, and telephones power system. A B C D FEATURES Low RDS(on) provides higher efficiency and extends battery life. Miniature TO-252 surface mount package saves board space. High power and current handling capability. Extended VGS range (±25) for battery pack applications. GE K M A B C D E F G H Package MPQ LeaderSize TO-252 2.5K 13’ inch N O P J REF. PACKAGE INFORMATION HF Millimeter Min. Max. 6.4 6.8 5.20 5.50 2.20 2.40 0.45 0.58 6.8 7.3 2.40 3.0 5.40 6.2 0.8 1.20 Millimeter Min. Max. 2.30 REF. 0.70 0.90 0.50 1.1 0.9 1.6 0 0.15 0.43 0.58 REF. J K M N O P Drain Gate Source ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise specified) PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Current 1 2 Continuous Source Current (Diode Conduction) Total Power Dissipation 1 1 Operating Junction and Storage Temperature Range SYMBOL RATINGS UNIT VDS -30 V VGS ±25 V ID @TA=25℃ 61 A IDM ±40 A IS -30 A PD @TA=25℃ 50 W TJ, TSTG -55 ~ 175 °C THERMAL RESISTANCE RATINGS Maximum Thermal Resistance Junction-Ambient 1 RθJA 50 °C / W Maximum Thermal Resistance Junction-Case RθJC 3.0 °C / W Notes： 1 Surface Mounted on 1” x 1” FR4 Board. 2 Pulse width limited by maximum junction temperature. http://www.SeCoSGmbH.com/ 02-Dec-2010 Rev.A Any changes of specification will not be informed individually. Page 1 of 2 SSD50P03-09D 61A, -30V, RDS(ON) 9mΩ P-Ch Enhancement Mode Power MOSFET Elektronische Bauelemente ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise specified) SYMBO MIN. TYP. MAX. UNIT PARAMETER TEST CONDITIONS Static Gate-Threshold Voltage VGS(th) -1 - - Gate-Body Leakage IGSS - - ±100 Zero Gate Voltage Drain Current IDSS - - -1 - - -5 On-State Drain Current 1 ID(on) -41 - - - - 9 - - 13 gfs - 31 - S VDS= -15V, ID= -61A VSD - -0.7 - V IS= -41 A, VGS= 0 V Drain-Source On-Resistance 1 Forward Transconductance Diode Forward Voltage 1 RDS(ON) VDS= VGS, ID = -250 μA nA μA A VDS = 0V, VGS= ±25V VDS= -24V, VGS= 0V VDS= -24V, VGS=0V, TJ=55°C VDS = -5V, VGS= -10V mΩ VGS= -10V, ID= -61A VGS= -4.5V, ID= -51A Dynamic 2 Total Gate Charge Qg - 37 - Gate-Source Charge Qgs - 10 - Gate-Drain Charge Qgd - 14.5 - nC VDS = -15 V VGS = -4.5 V ID = -61 A nS VDD= -15 V ID= -41 A VGEN = -10 V RL= 15 RG= 6 Switching Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Td(on) - 15 - Tr - 12 - Td(off) - 62 - Tf - 46 - Notes 1 Pulse test：Pulse width ≦ 300 μs, duty cycle ≦ 2％. 2 Guaranteed by design, not subject to production testing. http://www.SeCoSGmbH.com/ 02-Dec-2010 Rev.A Any changes of specification will not be informed individually. Page 2 of 2