SKYWORKS SKY77321

DATA SHEET
SKY77321 PA Module for Tri-Band EGSM / GPRS
Applications
Description
• Tri-band cellular handsets
encompassing
- Class 4 EGSM900
- Class 1 DCS1800
- PCS1900
- GPRS (up to Class 12)
The SKY77321 Power Amplifier Module (PAM) is designed in a compact form factor for tri-band
cellular handsets comprising EGSM900, DCS1800, and PCS1900 operation. It also supports Class 12
General Packet Radio Service (GPRS) multislot operation.
Features
• High efficiency
- EGSM900 53%
- DCS1800 47%
PCS1900 47%
• Input/output matching
50 Ω internal
• Small outline
6 mm x 6 mm
• Low profile
1.2 mm maximum
• Low APC current
10 µA typical
• Gold plated, lead-free
contacts
The PAM consists of an EGSM900 PA block, a DCS1800/PCS1900 PA block, impedance-matching
circuitry for 50 Ω input and output, and bias control circuitry. Two separate Heterojunction Bipolar
Transistor (HBT) PA blocks are fabricated on a single Gallium Arsenide (GaAs) die. One PA block
operates in the EGSM900 band and the other PA block supports both the DCS1800 and the PCS1900
bands. Optimized for Li-Ion battery operation, both PA blocks share common power supply pins to
distribute current. A custom CMOS integrated circuit provides the internal interface circuitry, including
a current amplifier that minimizes the required power control current (IAPC) to 10 µA, typical. The GaAs
die, the Silicon (Si) die, and passive comments are mounted on a multi-layer laminate substrate. The
assembly is encapsulated with plastic overmold.
The RF input and output ports are internally matched to 50 Ω to reduce the number of external
components for a tri-band design. Extremely low leakage current (2 µA, typical) of the dual PA module
maximizes handset standby time. The SKY77321 also contains band-select switching circuitry to
select EGSM (logic 0) and DCS/PCS (logic 1) as determined from the Band Select (BS) signal. In the
block diagram shown below, the BS pin selects the PA output (DCS/PCS OUT or EGSM OUT) while the
Analog Power Control (APC) controls the level of output power.
Skyworks offers lead
(Pb)-free "environmentally
friendly" packaging
that is RoHS compliant
(European Parliament
for the Restriction of
Hazardous Substances).
Figure 1. Functional Block Diagram
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1
DATA SHEET • SKY77321
PA MODULE FOR TRI-BAND EGSM / GPRS
Electrical Specifications
The following tables list the electrical characteristics of the
SKY77321 Power Amplifier Module. Table 1 lists the absolute
maximum ratings and Table 2 lists the recommended operating
conditions. Table 3 shows the electrical characteristics of the
SKY77321 for EGSM, DCS, and PCS bands. A typical SKY77321
application diagram appears in Figure 2.
The SKY77321 is a static-sensitive electronic device and should
not be stored or operated near strong electrostatic fields. Detailed
ESD precautions along with information on device dimensions, pin
descriptions, packaging and handling can be found in later
sections of this data sheet.
Table 1. Absolute Maximum Ratings
Parameter
Minimum
Maximum
Unit
Input Power (PIN)
—
15
dBm
Supply Voltage (VCC), Standby, VAPC ≤ 0.3 V
—
7
V
Control Voltage (VAPC)
–0.5
VCCMAX – 0.2
(See Table 3)
V
Storage Temperature
–55
+150
°C
Table 2. Recommended Operating Conditions
Parameter
Supply Voltage (VCC)
Supply Current (ICC)
Operating Case Temperature (TCASE)
1-Slot (12.5% duty cycle)
2-Slot (25% duty cycle)
3-Slot (37.5% duty cycle)
4-Slot (50% duty cycle)
(1)
Minimum
Typical
2.9
3.5
Maximum
Unit
4.8
(1)
V
(1)
A
0
—
2.5
–20
–20
–20
–20
—
—
—
—
+100
+90
+85
+80
°C
For charging conditions with VCC > 4.8 V, derate ICC linearly down to 0.5 A max at VCC = 5.5 V.
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PA MODULE FOR TRI-BAND EGSM / GPRS
DATA SHEET • SKY77321
Table 3. SKY77321 Electrical Specifications (1) (1 of 6)
General
Parameter
Symbol
Test Condition
Minimum
Typical
Maximum
Units
Supply Voltage
VCC
—
2.9
3.5
4.8
V
Power Control Current
IAPC
—
—
10
100
µA
Leakage Current
IQ
—
—
5
µA
APC Enable Threshold
VAPCTH
200
—
500
mV
APC Enable Switching Delay
tSW
1
—
3
µs
Test Condition
Minimum
Typical
Maximum
Units
VCC = 4.5 V
VAPC = 0.3 V
TCASE = +25 °C
PIN ≤ –60 dBm
—
Time from VAPC ≥ VAPCTH until
POUT ≤ (POUT_FINAL – 3 dB)
EGSM Mode (f = 880 to 915 MHz and PIN = 6 to 10 dBm)
Parameter
Symbol
Frequency range
f
—
880
—
915
MHz
Input power
PIN
—
6
—
10
dBm
Analog power control voltage
VAPC
POUT = 32 dBm
1.2
1.7
2.1
V
PAE
VCC = 3.5 V
POUT ≥ 35.0 dBm
VAPC ≈ 2.0 V
pulse width 577 µs
duty cycle 1:8
TCASE = +25 °C
49
53
—
PAELOW INPUT
VCC = 3.5 V
POUT ≥ 35.0 dBm
VAPC ≈ 2.0 V
pulse width 577 µs
duty cycle 1:8
TCASE = +25 °C
PIN = 4 dBm
48
50
—
2f0 to 13f0
BW = 3 MHz
5 dBm ≤ POUT ≤ 34.8 dBm
—
—
–10
POUT
VCC = 3.5 V
VAPC ≈ 2.1 V
TCASE = +25 °C
35.0
35.2
—
POUTMAX LOW INPUT
VCC = 3.5 V
VAPC ≈ 2.1 V
TCASE = +25 °C
PIN = 4 dBm
—
—
—
POUTMAX LOW VOLTAGE
VCC = 2.9 V
VAPC ≤ 2.6 V
TCASE = –20 °C to +100 °C
(See Table 2 for multislot)
PIN = 7 dBm
—
—
—
POUTMAX HIGH VOLTAGE
VCC = 4.8 V
VAPC ≤ 2.6 V
TCASE = –20 °C to +100 °C
(See Table 2 for multislot)
PIN = 7 dBm
—
—
—
Power Added Efficiency
2nd to 13th harmonics
Output power
%
dBm
dBm
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DATA SHEET • SKY77321
PA MODULE FOR TRI-BAND EGSM / GPRS
Table 3. SKY77321 Electrical Specifications (1) (2 of 6)
EGSM Mode (f = 880 to 915 MHz and PIN = 6 to 10 dBm) [continued]
Parameter
Symbol
Test Condition
Minimum
Typical
Maximum
Input VSWR
GIN
POUT = 5 to 35.0 dBm, controlled by
VAPC
—
—
2.5:1
Forward isolation
POUT STANDBY
PIN = 10 dBm
VAPC = 0.3 V
—
–35
–30
Time from POUT = –10 dBm to
POUT = +5 dBm
τ ≈ 90%
—
5
8
Time from POUT = –10 dBm to
POUT = +20 dBm
τ ≈ 90%
—
5
8
Time from POUT = –10 dBm to
POUT = +35.0 dBm
τ ≈ 90%
—
2
4
τRISE, τFALL
Switching time
Spurious
Load mismatch
Noise power
Spur
All combinations of the following
parameters:
VAPC = controlled (2)
PIN = min. to max.
VCC = 2.9 V to 4.8 V
Load VSWR = 8:1, all phase angles
No parasitic oscillation > –36 dBm
Load
All combinations of the following
parameters:
VAPC = controlled (2)
PIN = min. to max.
VCC = 2.9 V to 4.8 V
Load VSWR = 10:1, all phase angles
No module damage or permanent degradation
PNOISE
Coupling of 2nd and 3rd harmonic from the
EGSM band into the DCS / PCS band
2f0, 3f0
At f0 + 20 MHz
RBW = 100 kHz
VCC = 3.5 V
5 dBm ≤ POUT ≤ 35.0 dBm
—
—
–82
At f0 + 10 MHz
RBW = 100 kHz
VCC = 3.5 V
5 dBm ≤ POUT ≤ 35.0 dBm
—
—
–76
At 1805 to 1880 MHz
RBW = 100 kHz
VCC = 3.5 V
5 dBm ≤ POUT ≤ 35.0 dBm
—
—
–90
Measured at the DCS output
–15 dBm ≤ POUT ≤ 35.0 dBm
—
–30
–20
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Units
dBm
µs
dBm
dBm
PA MODULE FOR TRI-BAND EGSM / GPRS
DATA SHEET • SKY77321
Table 3. SKY77321 Electrical Specifications (1) (3 of 6)
DCS Mode (f = 1710 to 1785 MHz and PIN = 6 to 10 dBm)
Parameter
Symbol
Test Condition
Minimum
Typical
Maximum
Units
Frequency range
f
—
1710
—
1785
MHz
Input power
PIN
—
6
—
10
dBm
Analog power control voltage
VAPC
POUT = 29.5 dBm
1.35
1.7
2.1
V
PAE
VCC = 3.5 V
POUT ≥ 33.0 dBm
VAPC ≈ 2.1 V
pulse width 577 µs
duty cycle 1:8
TCASE = +25 °C
43
47
—
PAELOW INPUT
VCC = 3.5 V
POUT ≥ 33.0 dBm
VAPC ≈ 2.1 V
pulse width 577 µs
duty cycle 1:8
TCASE = +25 °C
PIN = 4 dBm
43
46
—
2f0 to 7f0
BW = 3 MHz,
5 dBm ≤ POUT ≤ 33.0 dBm
TCASE = +25 °C
VCC = 3.5 V
—
—
–10
POUT
VCC = 3.5 V
VAPC ≈ 2.1 V
TCASE = +25 °C
33.0
33.2
—
POUTMAX LOW INPUT
VCC = 3.5 V
VAPC ≈ 2.0 V
TCASE = +25 °C
PIN = 4 dBm
—
—
—
POUTMAX LOW VOLTAGE
VCC = 2.9 V
VAPC ≤ 2.6 V
TCASE = –20 °C to +100 °C
(See Table 2 for multislot)
PIN = 6 dBm
—
—
—
POUTMAX HIGH VOLTAGE
VCC = 4.8 V
VAPC ≤ 2.6 V
TCASE = –20 °C to +100 °C
(See Table 2 for multislot)
PIN = 6 dBm
—
32.0
—
Power Added Efficiency
2nd to 7th harmonic
Output power
%
dBm
dBm
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
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DATA SHEET • SKY77321
PA MODULE FOR TRI-BAND EGSM / GPRS
Table 3. SKY77321 Electrical Specifications (1) (4 of 6)
DCS Mode (f = 1710 to 1785 MHz and PIN = 6 to 10 dBm) [continued]
Parameter
Symbol
Test Condition
Minimum
Typical
Maximum
Units
Input VSWR
GIN
POUT = 0 to 33.0 dBm,
controlled by VAPC
—
—
2:1
—
Forward isolation
POUT STANDBY
PIN = 10 dBm
VAPC= 0.3 V
—
–36
–30
dBm
Time from POUT = –10 dBm to
POUT = 0 dBm
τ ≈ 90%
—
10
12
Time from POUT = –10 dBm to
POUT = +20 dBm
τ ≈ 90%
—
5
8
Time from POUT = –10 dBm to
POUT = +33.0 dBm
τ ≈ 90%
—
2
5
Switching time
Spurious
Load mismatch
Noise power
τRISE, τFALL
Spur
All combinations of the following
parameters:
VAPC = controlled (3)
PIN = min. to max.
VCC = 2.9 V to 4.8 V
Load VSWR = 8:1, all phase angles
No parasitic oscillation > –36 dBm
Load
All combinations of the following
parameters:
VAPC = controlled (3)
PIN = min. to max.
VCC = 2.9 V to 4.8 V
Load VSWR = 10:1, all phase angles
No module damage or permanent degradation
PNOISE
At f0 + 20 MHz
RBW = 100 kHz
VCC = 3.5 V
5 dBm ≤ POUT ≤ 33.0 dBm
—
At 925 to 960 MHz
RBW = 100 kHz
VCC = 3.5 V
5 dBm ≤ POUT ≤ 33.0 dBm
—
—
–80
dBm
—
–95
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6
µs
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PA MODULE FOR TRI-BAND EGSM / GPRS
DATA SHEET • SKY77321
Table 3. SKY77321 Electrical Specifications (1) (5 of 6)
PCS Mode (f = 1850 to 1910 MHz and PIN = 6 to 10 dBm)
Parameter
Frequency range
Symbol
Test Condition
Minimum
Typical
Maximum
Units
1850
—
1910
MHz
f
—
Input power
PIN
—
Analog power control voltage
VAPC
POUT = 29.5 dBm
PAE
VCC = 3.5 V
POUT ≥ 33.0 dBm
VAPC ≈ 2.1 V
pulse width 577 µs
duty cycle 1:8
TCASE = +25 °C
PAELOW INPUT
VCC = 3.5 V
POUT ≥ 33.0 dBm
VAPC ≈ 2.1 V
pulse width 577 µs
duty cycle 1:8
TCASE = +25 °C
PIN = 4 dBm
43
46
—
2f0 to 7f0
BW = 3 MHz
5 dBm ≤ POUT ≤ 33.0 dBm
—
—
–10
POUT
VCC = 3.5 V
VAPC ≈ 2.1 V
TCASE = +25 °C
33.0
33.2
—
POUTMAX LOW INPUT
VCC = 3.5 V
VAPC ≈ 2.1 V
TCASE = +25 °C
PIN = 4 dBm
—
—
—
POUTMAX LOW VOLTAGE
VCC = 2.9 V
VAPC ≤ 2.6 V
TCASE = –20 °C to +100 °C
(See Table 2 for multislot)
PIN = 6 dBm
—
—
—
POUTMAX HIGH VOLTAGE
VCC = 4.8 V
VAPC ≤ 2.6 V
TCASE = –20 °C to +100 °C
(See Table 2 for multislot)
PIN = 6 dBm
—
—
—
Input VSWR
GIN
POUT = 0 to 33.0 dBm,
controlled by VAPC
—
—
2:1
—
Forward isolation
POUT STANDBY
PIN = 10 dBm
VAPC = 0.3 V
—
–36
–30
dBm
Time from POUT = –10 dBm to
POUT = 0 dBm
τ ≈ 90%
—
10
12
Time from POUT = –10 dBm to
POUT = 20 dBm
τ ≈ 90%
—
5
8
Time from POUT = –10 dBm to
POUT = +33.0 dBm
τ ≈ 90%
—
2
5
Power Added Efficiency
2nd to 7th harmonics
Output power
Switching time
τRISE, τFALL
6
—
10
dBm
1.35
1.7
2.1
V
43
47
—
%
dBm
dBm
µs
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DATA SHEET • SKY77321
PA MODULE FOR TRI-BAND EGSM / GPRS
Table 3. SKY77321 Electrical Specifications (1) (6 of 6)
PCS Mode (f = 1850 to 1910 MHz and PIN = 6 to 10 dBm) [continued]
Parameter
Spurious
Load mismatch
Noise power
Symbol
Test Condition
Minimum
Typical
Maximum
Spur
All combinations of the following
parameters:
VAPC = controlled (3)
PIN = min. to max.
VCC = 2.9 V to 4.8 V
Load VSWR = 8:1, all phase angles
No parasitic oscillation > –36 dBm
Load
All combinations of the following
parameters:
VAPC = controlled (3)
PIN = min. to max.
VCC = 2.9 V to 4.8 V
Load VSWR = 10:1
all phase angles
No module damage or permanent degradation
PNOISE
At f0 + 20 MHz
RBW = 100 kHz
VCC = 3.5 V
5 dBm ≤ POUT ≤ 33.0 dBm
—
At 869 to 894 MHz
RBW = 100 kHz
VCC = 3.5 V
5 dBm ≤ POUT ≤ 33.0 dBm
—
(1)
Unless specified otherwise:
TCASE = –20 to max. operating temperature (see Table 2),
RL = 50 Ω,
pulsed operation with pulse width ≤ 2308 µs and duty cycle ≤ 4:8,
VCC = 2.9 V to 4.8 V.
(2)
ICC = 0A to xA, where x = current at POUT = 35.0 dBm, 50 Ω load, and VCC = 3.5 V.
(3)
ICC = 0A to xA, where x = current at POUT = 33.0 dBm, 50 Ω load, and VCC = 3.5 V.
—
–77
dBm
—
–95
Figure 2. Typical SKY77321 PAM Application (Top View)
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Units
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PA MODULE FOR TRI-BAND EGSM / GPRS
DATA SHEET • SKY77321
Package Dimensions and Pin Descriptions
Figure 3 is a mechanical diagram of the pad layout for the 18-pin
surface mount SKY77321 tri-band PA module. Figure 4 provides a
recommended phone board layout footprint for the PAM to help
the designer attain optimum thermal conductivity, good
grounding, and minimum RF discontinuity for the 50-ohm
terminals. Figure 5, illustrates the pin numbering convention,
which starts with pin 1 in the upper left and increments counterclockwise around the package. Figure 6 translates the typical
case markings of a Skyworks PA module and Table 4 provides a
list of the pin names and their signal descriptions.
Figure 3. SKY77321 PAM Package Dimensions – 18-Pin Module (All Views)
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DATA SHEET • SKY77321
PA MODULE FOR TRI-BAND EGSM / GPRS
PCB SYMBOL FOR 6.0 x 6.0 mm PACKAGE (SKY77321) SPECIFIC
0.8
0.3 PITCH
0.8
0.30 PITCH
0.5
0.5
1 TYPICAL
1 TYPICAL
0.85
0.85
2
1.7
1.43
1.15
0.7
0.7
6.4
6.4
2X 1.5 x 0.8
2X 1.5 x 0.8
STENCIL APERTURE
STENCIL APERTURE
TOP VIEW
APPROACH 2
TOP VIEW
APPROACH 1
Common Ground
0.8
Pad
Component
Outline
2X 1.5 x 0.8
2X 1.6 x 0.9
0.9
0.2
0.6
0.5
1 TYPICAL
0.25
0.05 ALL AROUND
1 TYPICAL
6.4
METALLIZATION
Thermal Via Array
Ø 0.3 mm on 0.8 Pitch
Additional vias will improve
thermal performance.
NOTE: Thermal Vias should
be tented and filled with
solder mask 30–35 mm
Cu plating recommended.
3.8
6.5
SOLDER MASK OPENING
TOP VIEW
TOP VIEW
103030_004
All dimensions in millimeters.
Figure 4. Phone Board Layout Footprint for 6 x 6 mm Package
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PA MODULE FOR TRI-BAND EGSM / GPRS
DATA SHEET • SKY77321
Table 4. SKY77321 Pin Names and Signal Descriptions
Pin
Name
Description
1
TX Enable
Transmit Enable
2
VAPC
Power Control Bias Voltage
3
DCS/PSC IN
RF input 1710–1910 MHz
4
EGSM IN
RF Input 880–915 MHz
5
BS
Band Select
6
VCC
DC Supply
7
GND
RF and DC Ground
8
GND
RF and DC Ground
9
GND
RF and DC Ground
10
EGSM OUT
RF Output 880–915 MHz
11
GND
RF and DC Ground
12
VCC
Final Stage DC supply
13
RESERVED
Reserved
14
GND
RF and DC Ground
15
DCS/PCS OUT
RF Output 1710–1910 MHz
16
GND
RF and DC Ground
17
GND
RF and DC Ground
18
Vsupply
DC Supply for CMOS Bias Controller
GND
Ground Pad, bottom
Figure 5. SKY77321 Pin Configuration – 18 Pin Leadless PAM
GND PAD
Figure 6. Typical Case Markings
Package and Handling Information
Because of its sensitivity to moisture absorption, this device
package is baked and vacuum-packed prior to shipment.
Instructions on the shipping container label must be followed
regarding exposure to moisture after the container seal is broken,
otherwise, problems related to moisture absorption may occur
when the part is subjected to high temperature during solder
assembly.
to temperatures exceeding 240 °C for more than 10 seconds. For
details on both attachment techniques, precautions, and handling
procedures recommended by Skyworks, please refer to Skyworks
Application Note: PCB Design and SMT Assembly/Rework,
Document Number 101752. Additional information on standard
SMT reflow profiles can also be found in the JEDEC Standard
J-STD–020B.
The SKY77321 is capable of withstanding an MSL3/240 °C solder
reflow. Care must be taken when attaching this product, whether
it is done manually or in a production solder reflow environment.
If the part is attached in a reflow oven, the temperature ramp rate
should not exceed 5 °C per second; maximum temperature
should not exceed 240 °C. If the part is manually attached,
precaution should be taken to insure that the part is not subjected
Production quantities of this product are shipped in the standard
tape-and-reel format. Figure 7 shows tape and reel dimensions
for the SKY77321 6 x 6 x 1.2 mm package. Figure 8 illustrates
the orientation of the carrier tape on the reel and the unreeling
direction. For additional packaging details, refer to Skyworks
Application Note: Tape and Reel Information – RF Modules,
Document Number 101568.
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11
DATA SHEET • SKY77321
PA MODULE FOR TRI-BAND EGSM / GPRS
Figure 7. Tape and Reel for 6 x 6 mm Package
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PA MODULE FOR TRI-BAND EGSM / GPRS
DATA SHEET • SKY77321
Figure 8. Typical Tape and Reel Orientation and Unreeling Direction (Front and Top Views)
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
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DATA SHEET • SKY77321
PA MODULE FOR TRI-BAND EGSM / GPRS
Electrostatic Discharge Sensitivity
Technical Information
The SKY77321 is a Class I device. Figure 9 lists the Electrostatic
Discharge (ESD) immunity level for each non-ground pin of the
SKY77321 product. The numbers in Figure 9 specify the ESD
threshold level for each pin where the I-V curve between the pin
and ground starts to show degradation. ESD testing was
performed in compliance with MIL-STD-883E Method 3015.7
using the Human Body Model. If the ESD damage threshold
magnitude is found to consistently exceed 2000 volts on a given
pin, this so is indicated. If ESD damage threshold below 2000
volts is measured for either polarity, numbers are indicated that
represent worst case values observed in product characterization.
CMOS Bias Controller Characteristics
Various failure criteria can be utilized when performing ESD
testing. Many vendors employ relaxed ESD failure standards,
which fail devices only after “the pin fails the electrical
specification limits” or “the pin becomes completely nonfunctional”. Skyworks employs most stringent criteria, fails
devices as soon as the pin begins to show any degradation on a
curve tracer.
The CMOS die within the PAM performs several functions that are
important to the overall module performance. Some of these
functions must be considered for development of the power
ramping features in a 3GPP compliant transmitter power control
loop. Power ramping considerations will be discussed later in this
section.
NOTE: Please refer to 3GPP TS 05.05, Digital Cellular
Communications System (Phase 2+), Radio Transmission
and Reception. All GSM specifications are now the
responsibility of 3GPP. The standards are available at
http://www.3GPP.org/specs/specs.htm
The four main functions that will be described in this section are
Standby Mode Control, Band Select, Voltage Clamp, and Current
Buffer. The functional block diagram is shown in Figure 10.
Band
Select
(pin 5)
To avoid ESD damage, latent or visible, it is very important the
Class-1 ESD handling precautions listed in Table 5 be used in the
product assembly and test areas.
APC input
(pin 4)
cpdcs
vodcs
Supply
(pin 2)
vogsm
cpgsm
Ccomp
Ccomp
Combinational
Logic
Voltage Clamp
Bandgap
Reference
CMOS Bias Controller
DCS1800/
PCS1900
bias out
Cbypass
ground
Cbypass
RF
Isolation
GSM900
bias out
RF
Isolation
Tri Band Power Amplifier GaAs Die
103030_010
Figure 10. Functional Block Diagram
Figure 9. ESD Sensitivity Areas (Top View)
Table 5. Precautions for Handling GaAs IC-based Products to
Avoid Induced Damage
Personnel Grounding
Wrist Straps
Conductive Smocks, Gloves and Finger
Cots
Antistatic ID Badges
Protective Workstation
Dissipative Table Tops
Protective Test Equipment (Properly
Grounded)
Grounded Tip Soldering Irons
Conductive Solder Suckers
Static Sensors
Facility
Relative Humidity Control and Air
Ionizers
Dissipative Floors (less than 109 Ω to
GND)
Protective Packaging &
Transportation
Bags and Pouches (Faraday Shield)
Protective Tote Boxes (Conductive
Static Shielding)
Protective Trays
Grounded Carts
Protective Work Order Holders
Standby Mode Control
The Combinational Logic cell includes enable circuitry that
monitors the APC ramping voltage from the power amplifier
controller (PAC) circuit in the EGSM transmitter. Typical handset
designs directly connect the PA VCC to the battery at all times, and
for some PA manufacturers this requires a control signal to set
the device in or out of standby mode. The Skyworks PAM does
not require a Transmit Enable input because it contains a standby
detection circuit that senses the VAPC to enable or disable the PA.
This feature helps minimize battery discharge when the PA is in
standby mode. When VAPC is below the enable threshold voltage,
the PA goes into a standby mode, which reduces battery current
(ICC) to 6 µA, typical, under nominal conditions.
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
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September 9, 2005 • Skyworks Proprietary and Confidential information. • Products and product information are subject to change without notice. • 103030B
PA MODULE FOR TRI-BAND EGSM / GPRS
DATA SHEET • SKY77321
For voltages less than 500 mV at the APC input (pin 4), the PA
bias is held at ground. As the APC input exceeds the enable
threshold, the bias will activate. After a 3 µs delay, the amplifier
internal bias will ramp quickly to match the ramp voltage applied
to the APC input. In order for the internal bias to precisely follow
the APC ramping voltage, it is critical that a ramp pedestal is set
to the APC input at or above the enable threshold level with a
timing at least 3 µs prior to ramp-up. This will be discussed in
more detail in the following section, “Power Ramping
Considerations for 3GPP Compliance”.
Band Select
The Combinational Logic cell also includes a simple gate
arrangement that selects the desired operational band by
activating the appropriate current buffer. The voltage threshold
level at the Band Select input (pin 5) will determine the active
path of the bias output to the GaAs die.
Voltage Clamp
The Voltage Clamp circuit will limit the maximum bias voltage
output applied to the bases of the HBT devices on the GaAs die.
This provides protection against electrical overstress (EOS) of the
active devices during high voltage and/or load mismatch
conditions. Figure 11 shows the typical transfer function of the
APC input to buffer output under resistively loaded conditions.
Notice the enable function near 500 mV, and the clamp acting at
2.15 V, corresponding to a supply voltage of 4.0 V.
Figure 12. Base Bias Clamp Voltage vs. Supply Voltage
Current Buffer
The output buffer amplifier performs a vital function in the CMOS
device by transferring the APC input voltage ramp to the base of
the GaAs power devices. This allows the APC input to be a high
impedance port, sinking only 10 µA, typical, assuring no loading
effects on the PAC circuit. The buffers are designed to source the
high GaAs base currents required, while allowing a settling time
of less than 3 µs for a 1.5 V ramp.
Power Ramping Considerations for 3GPP Compliance
The system designer must control these primary variables in the
power control loop:
• software control of the DSP / DAC
• software control of the transmitter timing signals
• ramp profile attributes – pedestal, number of steps, duration of
steps
• layout of circuit / parasitics
• RC time constants within the PAC circuit design
All of these variables will directly influence the ability of an EGSM
transmitter power control loop to comply with 3GPP
specifications.
Figure 11. Base Bias Voltage vs. APC Input—VCC = 4.0 V
Due to output impedance effects, the bias of the GaAs devices
increases as the supply voltage increases. The Voltage Clamp is
designed to gradually decrease in level as the battery voltage
increases. The performance of the clamp circuit is enhanced by
the band gap reference that provides a supply-, process-, and
temperature-independent reference voltage. The transfer function
relative to VBAT is shown in Figure 12. For battery voltages below
3.4 V, the base bias voltage is limited by the common mode range
of the buffer amplifier. For battery voltages above 3.4 V, the
clamp limits the base bias.
Although there is a specific time mask template in which the
transmitter power is allowed to ramp up, the method is very
critical. The 3GPP system specification for switching transients
causes the requirement to limit the edge rate of output power
transitions of the mobile. Switching transients are caused by the
transition from minimum output power to the desired output
power, and vice versa. The spectrum generated by this transition
is due to the ramping waveform amplitude modulation imposed
on the carrier. Sharper transitions tend to produce more spectral
“splatter” than smooth transitions. If the transmit output power is
ramped up too slowly, the radio will violate the time mask
specification. In this condition, the radio may not successfully
initiate or maintain a phone call. If the transmit output power is
ramped up too quickly, this will cause RF “splatter” at certain
frequency offsets from the carrier as dictated by the 3GPP
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
103030B • Skyworks Proprietary and Confidential information. • Products and product information are subject to change without notice. • September 9, 2005
15
DATA SHEET • SKY77321
specification. This splatter, known as Output RF Spectrum (ORFS)
due to Switching Transients, will increase the system noise level,
which may knock out other users on the system. The main
difficulty with TDMA power control is allowing the transmitter to
ramp the output power up and down gradually so switching
transients are not compromised while meeting the time mask
template at all output power levels in all operational bands. The
transmitter has 28 µs to ramp up power from an off state to the
desired power level.
The EGSM transmitter power control loop generally involves
feedback around the GaAs PA, which limits the bandwidth of
signals that can be applied to the PA bias input. Since the PA is
within the feedback loop, its own small-signal frequency
response must exhibit a bandwidth 5 to 10 times that of the
power control loop. As discussed in the previous section, the PA
bias is held at ground for inputs less than 500 mV. As the APC
input exceeds the enable threshold, the bias will activate. After a
3 µs delay, the amplifier internal bias will quickly ramp to match
the ramp voltage applied to the VAPC input. Since the bias must be
wide band relative to the power control loop, the ramp will exhibit
a fast edge rate. If the APC input increases beyond 1 V before the
3 µs switching delay is allowed to occur after the bias is enabled,
the PA will have significant RF output as the internal bias
approaches the applied bias. During this ramp, the internal power
control is running “open loop" and the edge rates are defined by
the frequency response of the PA bias rather than that of the
power control loop. This open loop condition will result in
switching transients that are directly correlated to the PA bias
bandwidth.
Application of an initial APC voltage, which enables the bias at
least 3 µs before the VAPC voltage is ramped, will ensure that the
internal bias of the PAM will directly follow the applied VAPC. As a
result, the power control loop will define all edge transitions
rather than the PA internal bandwidth defining the transition.
Figure 13 and Figure 14 show the relationship of the internal bias
relative to the applied APC in two cases. One case has ramping
starting from ground; the other case has ramping starting with an
initial enable pedestal of 500 mV. It is evident that the pedestal
level is critical to ensure a predictable and well-behaved power
control loop.
PA MODULE FOR TRI-BAND EGSM / GPRS
The device specifications for enable threshold level and switching
delay are shown in Table 3.
Figure 13. PAM Internal Bias Performance – No Pedestal Applied
Figure 14. PAM Internal Bias Performance – Pedestal Applied
To enable the CMOS driver in the PAM prior to ramp-up, a PAC
output pedestal level to the APC input of the PAM (pin 4) should
be set to about 500 mV. This pedestal level should have a
duration of at least 3 µs directly prior to the start of ramp up.
Figure 15 shows typical signals and timings measured in an
EGSM transmitter power control loop. This particular example is
at EGSM Power Level 5, Channel 62. The oscilloscope traces are
TxVCO_enable, PAC_enable, DAC Ramp, and VAPC (pin 4).
Note: When the TxVCO is enabled, the pedestal becomes set at
the APC input of the PAM, then the PAC is enabled, and
finally the DAC ramp begins.
Figure 15. EGSM Transmitter - Typical Ramp-up Signals
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
16
September 9, 2005 • Skyworks Proprietary and Confidential information. • Products and product information are subject to change without notice. • 103030B
Ordering Information
Model Number
Manufacturing Part Number
SKY77321
SKY77321
Product Revision
Package
Operating Temperature
18-pin MCM
6 x 6 x 1.2 mm
–20 °C to +80 °C
Revision History
Revision
Level
Date
Description
A
May 26, 2005
Initial Release
B
September 9, 2005
Add: Pb-free stamp (p1)
References
Application Note: PCB Design and SMT Assembly/Rework, Document Number 101752.
Application Note: Tape and Reel Information – RF Modules, Document Number 101568
Standard SMT Reflow Profiles: JEDEC Standard J–STD–020B.
© 2002–2005, Skyworks Solutions, Inc. All Rights Reserved.
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