ANPEC APW7143KI-TRG

APW7143
3A, 12V, Asynchronous Buck Converter
Features
General Description
•
Wide Input Voltage from 4.3V to 14V
The APW7143 is a 3A asynchronous Buck converter with
•
Output Current up to 3A
•
Adjustable Output Voltage from 0.8V to VIN
an integrated 70mΩ P-channel power MOSFET. The
APW7143, designed with a current-mode control scheme,
can convert wide input voltage of 4.3V to 14V to the output
voltage adjustable from 0.8V to VIN to provide excellent
- ±2% System Accuracy
•
•
70mΩ Integrated Power MOSFET
output voltage regulation.
For high efficiency over all load current range, the
High Efficiency up to 92%
Current-Mode Operation
APW7143 is equipped with an automatic Skip/PWM
mode operation. At light load, the IC operates in the Skip
- Easy Feedback Compensation
- Stable with Low ESR Output Capacitors
mode, which keeps a constant minimum inductor peak
current, to reduce switching losses. At heavy load, the IC
- Fast Load/Line Transient Response
works in PWM mode, which inductor peak current is programmed by the COMP voltage, to provide high efficiency
- Automatic Skip/PWM Mode Operation
•
•
Power-On-Reset Monitoring
•
Fixed 500kHz Switching Frequency in PWM mode
•
Built-in Digital Soft-Start
•
Current-Limit Protection with Frequency Foldback
•
Hiccup-Mode 50% Undervoltage Protection
•
shutdown mode, the supply current drops below 3µA.
This device, available in an 8-pin SOP-8 package, pro-
Over-Temperature Protection
vides a very compact system solution with minimal exter-
•
<3µA Quiescent Current in Shutdown Mode
nal components and PCB area.
•
Small SOP-8 Package
•
Lead Free and Green Devices Available
and excellent output voltage regulation.
The APW7143 is also equipped with power-on-reset,
soft-start, and whole protections (undervoltage, over
temperature, and current-limit) into a single package. In
100
90
(RoHS Compliant)
80
70
•
OLPC, UMPC
•
Notebook Computer
•
Handheld Portable Device
•
Efficiency, (%)
Applications
60
VIN=5V, VOUT=3.3V, L1=2.2µH
50
40
30
VIN=12V, VOUT=5V, L1=6.8µH
20
Step-down Converters Requiring High Efficiency
10
and 3A Output Current
VIN=12V, VOUT=3.3V, L1=4.7µH
0
0.001
0.01
0.1
1
10
Output Current, IOUT(A)
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Apr., 2008
1
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APW7143
Ordering and Marking Information
Package Code
K : SOP-8
Operating Junction Temperature Range
I : -40 to 85 ° C
Handling Code
TR : Tape & Reel
Assembly Material
L : Lead Free Device G : Halogen and Lead Free Device
APW7143
Assembly Material
Handling Code
Temperature Range
Package Code
APW7143 K :
APW7143
XXXXX
XXXXX - Date Code
Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which
are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020C for
MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen
free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by
weight).
Pin Configuration
APW7143
VIN
NC
AGND
FB
1
8
2
7
3
4
5
6
LX
LX
EN
COMP
SOP-8
Top View
Pin 7 and 8 must be externally connected together.
Absolute Maximum Ratings
Symbol
VIN
VLX
(Note 2)
Parameter
VIN Supply Voltage (VIN to AGND)
LX to AGND Voltage
Rating
Unit
-0.3 ~ 15
V
> 100ns
-1 ~ VIN+1
< 100ns
- 5 ~ VIN+5
EN to AGND Voltage
V
-0.3 ~ VIN+0.3
FB, COMP to AGND Voltage
V
-0.3 ~ 6
Maximum Junction Temperature
TSTG
Storage Temperature
TSDR
Maximum Lead Soldering Temperature, 10 Seconds
V
150
o
-65 ~ 150
o
260
o
C
C
C
Note 2 : Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device.
Thermal Characteristics
Symbol
θJA
Parameter
Value
Junction-to-Ambient Thermal Resistance in Free Air
Unit
(Note 3)
o
SOP-8
C/W
80
Note 3: θJA is measured with the component mounted on a high effective thermal conductivity test board in free air.
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Apr., 2008
2
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APW7143
Recommended Operating Conditions (Note 4)
Symbol
Parameter
VIN
Range
Unit
VIN Supply Voltage
4.3 ~ 14
V
VOUT
Converter Output Voltage
0.8 ~ VIN
V
IOUT
Converter Output Current
0~3
A
CIN
Converter Input Capacitor (MLCC)
8 ~ 50
µF
COUT
LOUT
TA
Converter Output Capacitor
20 ~ 1000
µF
Effective Series Resistance
0 ~ 60
mΩ
Converter Output Inductor
1 ~ 22
µH
Resistance of the Feedback Resistor connected from FB to AGND
1 ~ 20
kΩ
Ambient Temperature
TJ
Junction Temperature
-40 ~ 85
o
-40 ~ 125
o
C
C
Note 4: Refer to the Typical Application Circuits
Electrical Characteristics
Refer to the typical application circuits. These specifications apply over VIN=12V, VOUT=3.3V, and TA= -40 ~ 85°C, unless otherwise
specified. Typical values are at TA=25°C.
Symbol
Parameter
APW7143
Test Conditions
Unit
Min
Typ
Max
SUPPLY CURRENT
IVIN
IVIN_SD
VIN Supply Current
VFB = VREF +50mV, VEN=3V, LX=NC
-
0.5
1.5
mA
VIN Shutdown Supply Current
VEN = 0V
-
-
3
µA
3.9
4.1
4.3
V
-
0.5
-
V
V
POWER-ON-RESET (POR) VOLTAGE THRESHOLD
VIN POR Voltage Threshold
VIN rising
VIN POR Hysteresis
REFERENCE VOLTAGE
VREF
Reference Voltage
Output Voltage Accuracy
Regulated on FB pin
-
0.8
-
TJ = 25oC, IOUT=10mA, VIN=12V
-1.0
-
+1.0
IOUT=10mA~3A, VIN=4.75~14V
-2.0
-
+2.0
%
Line Regulation
VIN = 4.75V to 14V
-
+0.02
-
%/V
Load Regulation
IOUT = 0.5A ~ 3A
-
-0.04
-
%/A
450
500
550
kHz
OSCILLATOR AND DUTY CYCLE
FOSC
TON_MIN
Oscillator Frequency
TJ = -40 ~ 125oC, VIN = 4.75 ~ 14V
Foldback Frequency
VOUT = 0V
-
80
-
kHz
Maximum Converter’s Duty
-
99
-
%
Minimum Pulse Width of LX
-
150
-
ns
Error Amplifier Transconductance VFB=VREF±50mV
-
200
-
µA/V
Error Amplifier DC Gain
-
80
-
dB
CURRENT-MODE PWM CONVERTER
Gm
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Apr., 2008
COMP = NC
3
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APW7143
Electrical Characteristics (Cont.)
Refer to the typical application circuits. These specifications apply over VIN=12V, VOUT=3.3V, and TA= -40 ~ 85°C, unless otherwise
specified. Typical values are at TA=25°C.
Symbol
Parameter
Current-Sense to COMP Voltage
Transresistance
P-Channel Switch Resistance
APW7143
Test Conditions
Unit
Min
Typ
Max
-
0.06
-
VIN = 5V, TJ= 25°C
-
90
110
VIN = 12V, TJ= 25°C
-
70
90
V/A
mΩ
PROTECTIONS
ILIM
VTH_UV
TOTP
P-Channel Switch Current-limit
Peak Current
5.0
6.5
8.0
FB Under-Voltage Threshold
VFB falling
A
45
50
55
%
FB Under-Voltage Debounce
-
1
-
µs
Over-Temperature Trip Point
-
150
-
o
o
Over-Temperature Hysteresis
C
-
40
-
C
1.5
2
2.5
ms
-
10
-
Ω
0.5
-
-
V
-
-
2.1
V
SOFT-START, SOFTSTOP, ENABLE AND INPUT CURRENTS
TSS
Soft-Start
LX Pull-Low Switch Resistance
Switch is turned on for 2 ms (typ.)
interval from the falling edge of
enable signal.
EN Shutdown Voltage Threshold
VEN falling
EN Enable Voltage Threshold
P-Channel Switch Leakage Current
IFB
FB Pin Input Current
IEN
EN Pin Input Current
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Apr., 2008
VEN = 0V, VLX = 0V
VEN = 0V ~ VIN
4
-
-
2
µA
-100
-
+100
nA
-100
-
+100
nA
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APW7143
Typical Operating Characteristics
(Refer to the application circuit 1 in the section “Typical Application Circuits”, VIN=12V, VOUT=3.3V, L1=4.7µH )
Output Voltage vs. Output Current
3.4
90
3.38
Output Voltage, VOUT (V)
Efficiency, (%)
Output Current vs. Efficiency
100
80
70
60
VIN=5V, VOUT=3.3V, L1=2.2µH
50
40
VIN=12V, VOUT=5V, L1=6.8µH
30
3.36
3.34
3.32
3.3
3.28
3.26
3.24
20
VIN=12V, VOUT=3.3V, L1=4.7µH
10
3.22
3.2
0
0.001
0.01
0.1
1
0
10
1
2
3
Output Current, IOUT(A)
Output Current, IOUT(A)
Current-Limit Level (Peak Current)
Output Voltage vs. Input Voltage
vs. Junction Temperature
3.4
IOUT=500mA
3.38
Output Voltage, VOUT (V)
Current Limit Level, ILIM(A)
7
6.5
6
5.5
5
3.36
3.34
3.32
3.3
3.28
3.26
3.24
3.22
4.5
3.2
-40 -20
0
20
40
60
80
4
100 120 140
6
o
Junction Temperature, TJ ( C)
VIN Input Current vs. Supply Voltage
10
12
14
Reference Voltage vs. Junction Temperature
2.0
0.816
VFB=0.85V
0.812
Reference Voltage, VREF (V)
VIN Input Current, I VIN(mA)
8
Input Voltage, VIN (V)
1.5
1.0
0.5
0.0
0
2
4
6
8
10
12
0.804
0.800
0.796
0.792
0.788
0.784
-50
14
Supply Voltage, VIN (V)
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Apr., 2008
0.808
-25
0
25
50
75
100
125
150
Junction Temperature, TJ (oC)
5
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APW7143
Typical Operating Characteristics (Cont.)
(Refer to the application circuit 1 in the section “Typical Application Circuits”, VIN=12V, VOUT=3.3V, L1=4.7µH )
Oscillator Frequency vs.
Junction Temperature
Oscillator Frequency, FOSC(KHz)
550
540
530
520
510
500
490
480
470
460
450
-50
-25
0
25
50
75
100
125
150
o
Junction Temperature, TJ ( C)
Operating Waveforms
(Refer to the application circuit 1 in the section “Typical Application Circuits”, VIN=12V, VOUT=3.3V, L1=4.7µH )
Power On
Power Off
IOUT=3A
IOUT=3A
VIN
VIN
1
1
VOUT
2
3
VOUT
2
IL1
IL1
3
CH1 : VIN , 5V/div
CH2 : VOUT , 2V/div
CH3 : IL1 , 2A/div
Time : 5ms/div
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Apr., 2008
CH1 : VIN , 5V/div
CH2 : VOUT , 2V/div
CH3 : IL1 , 2A/div
Time : 10ms/div
6
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APW7143
Operating Waveforms (Cont.)
(Refer to the application circuit 1 in the section “Typical Application Circuits”, VIN=12V, VOUT=3.3V, L1=4.7µH )
Shutdown
Enable
IOUT=3A
IOUT=3A
VEN
VEN
1
2
1
VOUT
VOUT
2
IL1
IL1
3
3
CH1 : VEN , 5V/div
CH2 : VOUT , 2V/div
CH3 : IL1 , 2A/div
Time : 1ms/div
CH1 : VEN , 5V/div
CH2 : VOUT , 2V/div
CH3 : IL1, 2A/div
Time : 100µs/div
Over Current
Short Circuit
VOUT is shorted to ground by a short wire
IOUT =3~7A
VLx
VLX
1
1
VOUT
VOUT
2
2
IL1
IL1
3
3
CH1 : VLX , 10V/div
CH2 : VOUT , 2V/div
CH3 : IL1 , 5A/div
Time : 20µs/div
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Apr., 2008
CH1 : VLX , 5V/div
CH2 : VOUT , 200mV/div
CH3 : IL1 , 5A/div
Time : 5ms/div
7
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APW7143
Operating Waveforms (Cont.)
(Refer to the application circuit 1 in the section “Typical Application Circuits”, VIN=12V, VOUT=3.3V, L1=4.7µH )
Load Transient Response
Load Transient Response
IOUT= 50mA-> 3A ->50mA
IOUT rising/falling time=10µs
VOUT
1
1
IOUT= 0.5A-> 3A ->0.5A
IOUT rising/falling time=10µs
VOUT
IL1
IL1
2
2
CH1 : VOUT , 200mV/div
CH2 : IL1 , 2A/div
CH1 : VOUT , 100mV/div
CH2 : IL1 , 2A/div
Time : 100µs/div
Time : 100µs/div
Switching Waveform
IOUT=0.2A
Switching Waveform
VLX
VLX
IOUT=3A
1
1
IL1
IL1
2
2
CH1 : VLX , 5V/div
CH2 : IL1 , 2A/div
Time : 1µs/div
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Apr., 2008
CH1 : VLX , 5V/div
CH2 : IL1 , 2A/div
Time : 1µs/div
8
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APW7143
Operating Waveforms (Cont.)
(Refer to the application circuit 1 in the section “Typical Application Circuits”, VIN=12V, VOUT=3.3V, L1=4.7µH )
Line Transient
VIN= 5~12V
VIN rising/falling time=20µs
VIN
1
VOUT
2
IL1
3
CH1 : VIN , 5V/div
CH2 : VOUT , 50mV/div (Voffset=3.3V)
CH3 : IL1 , 2A/div
Time : 100µs/div
Pin Description
PIN No.
NAME
FUNCTION
1
VIN
Power Input. VIN supplies the power (4.3V to 14V) to the control circuitry, gate driver,
and step-down converter switch. Connecting a ceramic bypass capacitor and a suitably
large capacitor between VIN and AGND eliminates switching noise and voltage ripple on
the input to the IC.
2
NC
No Connection.
3
AGND
4
FB
Output feedback Input. The APW7143 senses the feedback voltage via FB and
regulates the voltage at 0.8V. Connecting FB with a resistor-divider from the converter’s
output sets the output voltage from 0.8V to VIN.
5
COMP
Output of the error amplifier. Connect a series RC network from COMP to AGND to
compensate the regulation control loop. In some cases, an additional capacitor from
COMP to AGND is required.
6
EN
Enable Input. EN is a digital input that turns the regulator on or off. Drive EN high to turn
on the regulator, drive it low to turn it off. Connect this pin to VIN if it is not used.
7, 8
LX
Power Switching Output. LX is the Drain of the P-Channel power MOSFET to supply
power to the output LC filter.
Ground of MOSFET Gate Driver and Control Circuitry.
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Apr., 2008
9
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APW7143
Block Diagram
VIN
Current Sense
Amplifier
Power-OnReset
Current
Limit
POR
50%VREF
UVP
Soft-Start
Soft-Start /
Soft-Stop
and
Fault Logic
UG
Gate
Driver
Inhibit
FB
Gate
Control
Gm
VREF
Error
Amplifier
LX
Current
Compartor
COMP
Slope
Compensation
EN
Over
Temperature
Protection
Enable
1.5V
FB
Oscillator
500kHz
AGND
Typical Application Circuits
1. +12V Single Power Input Step-down Converter (with an Electrolytic Output Capacitor)
C1
2.2µF
2
C5
470µF
VIN
12V
VIN
L1
4.7µH /3A
Enable
6
8
LX
EN
U1 LX 7
APW7143
Shutdown
5
D1
R1
46.9K
±1%
COMP
R3
62K
C3
680pF
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Apr., 2008
FB
AGND
3
4
R2
15K
±1%
10
VOUT
3.3V/3A
C2
470µF
(ESR=30mΩ)
C4
47pF
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APW7143
Typical Application Circuits (Cont.)
2. 4.3~14V Single Power Input Step-down Converter(with ceramic Input/Output Capacitor)
VIN
1
C1
VIN
L1
Enable
6
8
LX
LX 7
EN
Shutdown
VOUT
U1
APW7143
5
D1
COMP
R3
FB
R1
±
1%
4
R2
±
1%
AGND
3
C3
C2
C4
Optional
a. Cost-effective Feedback Compensation (C4 is not connected)
VIN(V)
VOUT(V)
12
5
L1(µH)
6.8
C2(µF)
22
C2 ESR(mΩ)
5
R1(kΩ)
63.0
R2(kΩ)
12
R3(kΩ)
10.0
C3(pF)
1500
12
5
6.8
44
3
63.0
12
20.0
1500
12
3.3
4.7
22
5
46.9
15
10.0
1500
12
3.3
4.7
44
3
46.9
15
22.0
1500
12
2
3.3
22
5
30.0
20
10.0
1500
12
2
3.3
44
3
30.0
20
20.0
1500
12
1.2
2.2
22
5
7.5
15
8.2
1800
12
1.2
2.2
44
3
7.5
15
16.0
1800
5
3.3
2.2
22
5
46.9
15
8.2
680
5
3.3
2.2
44
3
46.9
15
20.0
680
5
1.2
2.2
22
5
7.5
15
3.0
1800
5
1.2
2.2
44
3
7.5
15
7.5
1800
C4(pF)
R3(kΩ)
C3(pF)
b. Fast-Transient-Response Feedback Compensation (C4 is connected)
VIN(V)
VOUT(V)
L1(µH)
C2(µF)
C2 ESR(mΩ)
R1(kΩ)
R2(kΩ)
12
5
6.8
22
5
63.0
12
47
33.0
470
12
5
6.8
44
3
63.0
12
47
68.0
470
12
3.3
4.7
22
5
46.9
15
47
22.0
680
12
3.3
4.7
44
3
46.9
15
47
47.0
680
12
2
3.3
22
5
30.0
20
47
13.0
1200
12
2
3.3
44
3
30.0
20
47
27.0
1200
12
1.2
2.2
22
5
7.5
15
150
7.5
2200
12
1.2
2.2
44
3
7.5
15
150
15.0
2200
5
3.3
2.2
22
5
46.9
15
56
20.0
220
5
3.3
2.2
44
3
46.9
15
56
43.0
220
5
1.2
2.2
22
5
7.5
15
330
3.3
1800
5
1.2
2.2
44
3
7.5
15
330
8.2
1500
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Apr., 2008
11
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APW7143
Function Description
VIN Power-On-Reset (POR)
mal overload conditions, increasing lifetime of the
APW7143.
The APW7143 keeps monitoring the voltage on VIN pin to
prevent wrong logic operations which may occur when
VIN voltage is not high enough for the internal control
Enable/Shutdown
Driving EN to ground places the APW7143 in shutdown.
When in shutdown, the internal P-Channel power MOSFET
circuitry to operate. The VIN POR has a rising threshold of
4.1V (typical) with 0.5V of hysteresis.
turns off, all internal circuitry shuts down and the quiescent supply current reduces to less than 3µA.
During start-up, the VIN voltage must exceed the enable
voltage threshold. Then the IC starts a start-up process
and ramps up the output voltage to the voltage target.
Current-Limit Protection
Digital Soft-Start
The APW7143 monitors the output current, flows through
the P-Channel power MOSFET, and limits the current peak
The APW7143 has a built-in digital soft-start to control
the rise rate of the output voltage and limit the input cur-
at current-limit level to prevent loads and the IC from damages during overload or short-circuit conditions.
rent surge during start-up. During soft-start, an internal
voltage ramp (VRAMP), connected to one of the positive
Frequency Foldback
inputs of the error amplifier, rises up from 0V to 0.95V to
replace the reference voltage (0.8V) until the voltage ramp
The foldback frequency is controlled by the FB voltage.
When the output is shorted to ground, the frequency of
the oscillator will be reduced to about 80kHz. This lower
reaches the reference voltage.
Output Undervoltage Protection (UVP)
frequency allows the inductor current to discharge safely
and thereby prevent current runaway. The oscillator’s fre-
In the process of operation, if a short-circuit occurs, the
output voltage will drop quickly. Before the current-limit
quency will gradually increase to its designed rate when
circuit responds, the output voltage will fall out of the re-
the feedback voltage on FB again approaches 0.8V.
quired regulation range. The undervoltage continually
monitors the FB voltage after soft-start is completed. If a
load step is strong enough to pull the output voltage lower
than the undervoltage threshold, the IC shuts down
converter’s output.
The undervoltage threshold is 50% of the nominal output
voltage. The undervoltage comparator has a built-in 2µs
noise filter to prevent the chips from wrong UVP shutdown caused by noise. The undervoltage protection works
in a hiccup mode without latched shutdown. The IC will
initiate a new soft-start process at the end of the preceding delay.
Over-Temperature Protection (OTP)
The over-temperature circuit limits the junction temperature of the APW7143. When the junction temperature exceeds TJ = +150οC, a thermal sensor turns off the power
MOSFET, allowing the devices to cool. The thermal sensor allows the converters to start a start-up process and
regulate the output voltage again after the junction temperature cools by 40οC. The OTP is designed with a 40oC
hysteresis to lower the average TJ during continuous therCopyright  ANPEC Electronics Corp.
Rev. A.1 - Apr., 2008
12
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APW7143
Application Information
T=1/FOSC
Setting Output Voltage
The regulated output voltage is determined by:
VOUT = 0.8 ⋅ (1 +
VLX
R1
)
R2
DT
(V)
I
IOUT
Suggested R2 is in the range from 1K to 20kΩ. For
portable applications, a 10kΩ resistor is suggested for
R2. To prevent stray pickup, locate resistors R1 and R2
close to APW7143.
IL
IOUT
IQ1
I
Input Capacitor Selection
ICOUT
Each time, when the P-channel power MOSFET (Q1) turns
on, small ceramic capacitors for high frequency decoupling
and bulk capacitors are required to supply the surge current.
The small ceramic capacitors have to be placed physically close to the VIN and between the VIN and the anode
of the Schottky diode (D1).
VOUT
Figure 1 Converter Waveforms
Output Capacitor Selection
The important parameters for the bulk input capacitor are
the voltage rating and the RMS current rating. For reliable
operation, select the bulk capacitor with voltage and
current ratings above the maximum input voltage and
largest RMS current required by the circuit. The capacitor
voltage rating should be at least 1.25 times greater than
the maximum input voltage and a voltage rating of 1.5
times is a conservative guideline. The RMS current (IRMS)
of the bulk input capacitor is calculated as the following
equation:
IRMS = IOUT ⋅ D ⋅ (1- D)
VOUT
(A)
where D is the duty cycle of the power MOSFET.
An output capacitor is required to filter the output and
supply the load transient current. The filtering requirements
are the functions of the switching frequency and the ripple
current (∆I). The output ripple is the sum of the voltages,
having phase shift, across the ESR and the ideal output capacitor. The peak-to-peak voltage of the ESR is
calculated as the following equations:
D=
VOUT + VD
VIN + VD
........... (1)
∆I =
VOUT ·(1 - D)
FOSC ·L
........... (2)
VESR = ∆I ·ESR
For a through hole design, several electrolytic capacitors
may be needed. For surface mount designs, solid
tantalum capacitors can be used, but caution must be
exercised with regard to the capacitor surge current
where VD is the forward voltage drop of the diode.
The peak-to-peak voltage of the ideal output capacitor is
calculated as the following equation:
rating.
∆VCOUT =
VIN
VIN
IQ1
Q1
IL
VOUT
ICOUT
........... (4)
Therefore, the AC peak-to-peak output voltage (∆VOUT ) is
shown below:
IOUT
L
D1
∆I
(V)
8 ⋅ FOSC ⋅ COUT
For the applications, using bulk capacitors, the ∆VCOUT
is much smaller than the V ESR and can be ignored.
CIN
LX
........... (3)
(V)
ESR
∆VOUT = ∆ I ⋅ ESR
(V)
........... (5)
COUT
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APW7143
Application Information (Cont.)
Output Capacitor Selection (Cont.)
VOUT ·(VIN - VOUT)
≤ 1.2
500000 ·L ·VIN
For the applications, using ceramic capacitors, the VESR is
much smaller than the ∆V COUT and can be ignored.
L≥
Therefore, the AC peak-to-peak output voltage (∆VOUT ) is
close to ∆VCOUT .
VOUT ·(VIN - VOUT )
600000 ·VIN
(H)
........... (6)
where VIN = VIN(MAX)
The load transient requirements are the functions of the
Output Diode Selection
slew rate (di/dt) and the magnitude of the transient load
current. These requirements generally met with a mix of
The Schottky diode carries load current during the off-time.
The average diode current is therefore dependent on the
capacitors and careful layout. High frequency capacitors initially supply the transient and slow the current
P-channel power MOSFET duty cycle. At high input voltages
the diode conducts most of the time. As VIN approaches
load rate seen by the bulk capacitors. The bulk filter capacitor values are generally determined by the ESR
VOUT, the diode conducts only a small fraction of the time.
The most stressful condition for the diode is when the
(Effective Series Resistance) and voltage rating requirements rather than actual capacitance requirements.
output is short-circuited. Therefore, it is important to
adequately specify the diode peak current and average
High frequency decoupling capacitors should be placed
physically as close to the power pins of the load as
power dissipation so as not to exceed the diode ratings.
possible. Be careful not to add inductance in the circuit
board wiring that could cancel the usefulness of these
Under normal load conditions, the average current conducted by the diode is:
low inductance components. An aluminum electrolytic
capacitor’s ESR value is related to the case size with lower
ID =
ESR available in larger case sizes. However, the
VIN - VOUT
⋅ IOUT
VIN + VD
The APW7143 is equipped with whole protections to
Equivalent Series Inductance (ESL) of these capacitors
increases with case size and can reduce the usefulness
reduce the power dissipation during short-circuit
condition. Therefore, the maximum power dissipation of
of the capacitor to high slew-rate transient loading.
the diode is calculated from the maximum output current
as:
Inductor Value Calculation
The operating frequency and inductor selection are
PDIODE(MAX) = VD ·ID(MAX)
interrelated in that higher operating frequencies permit
the use of a smaller inductor for the same amount of
where IOUT = IOUT(MAX)
inductor ripple current. However, this is at the expense of
efficiency due to an increase in MOSFET gate charge
Remember to keep leading length short and observing
proper grounding to avoid ringing and increasing
dissipation.
losses. The equation (2) shows that the inductance value
has a direct effect on ripple current.
Accepting larger values of ripple current allows the use of
low inductances, but results in higher output voltage ripple
and greater core losses. A reasonable starting point for
setting ripple current is ∆I ≤ 0.4 ⋅ IOUT(MAX) . Remember, the
maximum ripple current occurs at the maximum input
voltage. The minimum inductance of the inductor is
calculated as the following equation:
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APW7143
Layout Consideration
In high power switching regulator, a correct layout is
important to ensure proper operation of the regulator. In
4. Place the decoupling ceramic capacitor C1 near the
VIN as close as possible. The bulk capacitors C5 are
also placed near VIN. Use a wide power ground plane
general, interconnecting impedance should be minimized
by using short, wide printed circuit traces. Signal and
to connect the C1, C2, C5, and Schottky diode to
provide a low impedance path between the com-
power grounds are to be kept separate and finally
combined using ground plane construction or single
ponents for large and high slew rate current.
point grounding. Figure 2 illustrates the layout, with bold
lines indicating high current paths. Components along
C2
D1
the bold lines should be placed close together. Below is
a checklist for your layout:
C1
VIN
1. Begin the layout by placing the power components
1
first. Orient the power circuitry to achieve a clean power
flow path. If possible, make all the connections on
Ground 4
8
SOP-8
2
3
7
6
VLX
VOUT
L1
5
APW7143
one side of the PCB with wide, copper filled areas.
Ground
2. In Figure 2, the loops with same color bold lines
conduct high slew rate current. These interconnecting
Figure 3 Recommended Layout Diagram
impedances should be minimized by using wide and
short printed circuit traces.
3. Keep the sensitive small signal nodes (FB, COMP)
away from switching nodes (LX or others) on the PCB.
Therefore, place the feedback divider and the feedback compensation network close to the IC to avoid
switching noise. Connect the ground of feedback
divider directly to the AGND pin of the IC using a
dedicated ground trace.
+
VIN
-
1
VIN
6
Compensat
ion Network
C1
L1
LX 8
LX 7
EN
+
D1
U1
APW7143
C2 Load V
OUT
-
5 COMP
C3
R1
FB 4
R3
AGND
3
R2
(Optional)
Feedback
Divider
Figure 2 Current Path Diagram
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APW7143
Package Information
SOP-8
D
E
E1
SEE VIEW A
h X 45
°
c
A
0.25
b
GAUGE PLANE
SEATING PLANE
A1
A2
e
L
VIEW A
S
Y
M
B
O
L
SOP-8
MILLIMETERS
MIN.
INCHES
MAX.
A
MIN.
MAX.
1.75
0.069
0.004
0.25
0.010
A1
0.10
A2
1.25
b
0.31
0.51
0.012
0.020
c
0.17
0.25
0.007
0.010
D
4.80
5.00
0.189
0.197
E
5.80
6.20
0.228
0.244
E1
3.80
4.00
0.150
0.157
e
0.049
1.27 BSC
0.050 BSC
h
0.25
0.50
0.010
0.020
L
0.40
1.27
0.016
0.050
0
0°
8°
0°
8°
Note: 1. Follow JEDEC MS-012 AA.
2. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion or gate burrs shall not exceed 6 mil per side.
3. Dimension “E” does not include inter-lead flash or protrusions.
Inter-lead flash and protrusions shall not exceed 10 mil per side.
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Apr., 2008
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APW7143
Carrier Tape & Reel Dimensions
P0
P2
P1
A
B0
W
F
E1
OD0
K0
A0
A
OD1 B
B
T
SECTION A-A
SECTION B-B
H
A
d
T1
Application
A
H
330.0±2.00 50 MIN.
SOP-8(P)
T1
C
d
D
12.4+2.00 13.0+0.50
1.5 MIN.
-0.00
-0.20
P0
P1
P2
D0
D1
4.0±0.10
8.0±0.10
2.0±0.05
1.5+0.10
-0.00
1.5 MIN.
W
E1
20.2 MIN. 12.0±0.30 1.75±0.10
T
A0
B0
F
5.5±0.05
K0
0.6+0.00
6.40±0.20 5.20±0.20 2.10±0.20
-0.40
(mm)
Devices Per Unit
Package Type
Unit
Quantity
SOP-8
Tape & Reel
2500
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APW7143
Reflow Condition
(IR/Convection or VPR Reflow)
tp
TP
Critical Zone
TL to TP
Temperature
Ramp-up
TL
tL
Tsmax
Tsmin
Ramp-down
ts
Preheat
t 25°C to Peak
25
Time
Reliability Test Program
Test item
SOLDERABILITY
HOLT
PCT
TST
ESD
Latch-Up
Method
MIL-STD-883D-2003
MIL-STD-883D-1005.7
JESD-22-B, A102
MIL-STD-883D-1011.9
MIL-STD-883D-3015.7
JESD 78
Description
245°C, 5 sec
1000 Hrs Bias @125°C
168 Hrs, 100%RH, 121°C
-65°C~150°C, 200 Cycles
VHBM > 2KV, VMM > 200V
10ms, 1tr > 100mA
Classification Reflow Profiles
Profile Feature
Average ramp-up rate
(TL to TP)
Preheat
- Temperature Min (Tsmin)
- Temperature Max (Tsmax)
- Time (min to max) (ts)
Time maintained above:
- Temperature (TL)
- Time (tL)
Peak/Classification Temperature (Tp)
Time within 5°C of actual
Peak Temperature (tp)
Ramp-down Rate
Sn-Pb Eutectic Assembly
Pb-Free Assembly
3°C/second max.
3°C/second max.
100°C
150°C
60-120 seconds
150°C
200°C
60-180 seconds
183°C
60-150 seconds
217°C
60-150 seconds
See table 1
See table 2
10-30 seconds
20-40 seconds
6°C/second max.
6°C/second max.
6 minutes max.
8 minutes max.
Time 25°C to Peak Temperature
Notes: All temperatures refer to topside of the package. Measured on the body surface.
Copyright  ANPEC Electronics Corp.
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APW7143
Classification Reflow Profiles (Cont.)
Table 1. SnPb Eutectic Process – Package Peak Reflow Temperatures
3
Package Thickness
Volume mm
<350
<2.5 mm
240 +0/-5°C
≥2.5 mm
225 +0/-5°C
3
Volume mm
≥350
225 +0/-5°C
225 +0/-5°C
Table 2. Pb-free Process – Package Classification Reflow Temperatures
3
3
3
Package Thickness
Volume mm
Volume mm
Volume mm
<350
350-2000
>2000
<1.6 mm
260 +0°C*
260 +0°C*
260 +0°C*
1.6 mm – 2.5 mm
260 +0°C*
250 +0°C*
245 +0°C*
≥2.5 mm
250 +0°C*
245 +0°C*
245 +0°C*
*Tolerance: The device manufacturer/supplier shall assure process compatibility up to and including the
stated classification temperature (this means Peak reflow temperature +0°C. For example 260°C+0°C)
at the rated MSL level.
Customer Service
Anpec Electronics Corp.
Head Office :
No.6, Dusing 1st Road, SBIP,
Hsin-Chu, Taiwan
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
2F, No. 11, Lane 218, Sec 2 Jhongsing Rd.,
Sindian City, Taipei County 23146, Taiwan
Tel : 886-2-2910-3838
Fax : 886-2-2917-3838
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Apr., 2008
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