AOSMD AON6405L

AON6405L
P-Channel Enhancement Mode Field Effect Transistor
General Description
Features
The AON6405L combines advanced trench MOSFET
technology with a low resistance package to provide
extremely low RDS(ON).This device is ideal for load
switch and battery protection applications.
VDS (V) = -30V
(VGS = -10V)
ID = -30A
RDS(ON) < 7mΩ (VGS = -10V)
RDS(ON) < 8mΩ (VGS = -4.5V)
ESD Protected!
100% UIS Tested!
-RoHS Compliant
-Halogen Free
D
Top View
Fits SOIC8
footprint !
S
D
S
D
S
D
G
D
Rg
G
S
DFN5X6
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
Symbol
VDS
Drain-Source Voltage
VGS
Gate-Source Voltage
Continuous Drain
G
Current
TC=25°C
Pulsed Drain Current
C
Avalanche Current
C
TC=100°C
Power Dissipation
ID
IDM
B
Power Dissipation A
±20
V
A
-23
-160
-15
TA=70°C
Repetitive avalanche energy L=0.1mH
Units
V
-30
TA=25°C
Continuous Drain
Current
Maximum
-30
C
TC=25°C
TA=25°C
Junction and Storage Temperature Range
Alpha & Omega Semiconductor, Ltd.
-54
A
EAR
146
mJ
83
2.5
W
1.6
TJ, TSTG
°C
-55 to 150
Symbol
t ≤ 10s
Steady-State
Steady-State
W
33
PDSM
TA=70°C
Thermal Characteristics
Parameter
A
Maximum Junction-to-Ambient
Maximum Junction-to-Ambient AD
Maximum Junction-to-Case
-12
PD
TC=100°C
A
IDSM
IAR
RθJA
RθJC
Typ
14.2
42
1.2
Max
17
50
1.5
Units
°C/W
°C/W
°C/W
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AON6405L
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
STATIC PARAMETERS
BVDSS
Drain-Source Breakdown Voltage
Conditions
Min
ID=-250µA, VGS=0V
-30
-1
Zero Gate Voltage Drain Current
IGSS
Gate-Body leakage current
VDS=0V, VGS= ±16V
Gate Threshold Voltage
On state drain current
VDS=VGS ID=-250µA
-0.8
VGS=-10V, VDS=-5V
-160
ID(ON)
TJ=55°C
VGS=-10V, ID=-20A
RDS(ON)
TJ=125°C
Static Drain-Source On-Resistance
VGS=-4.5V, ID=-20A
gFS
Forward Transconductance
VSD
IS=-1A,VGS=0V
Diode Forward Voltage
Maximum Body-Diode Continuous Current
IS
VDS=-5V, ID=-20A
DYNAMIC PARAMETERS
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate resistance
SWITCHING PARAMETERS
Qg(-10V) Total Gate Charge
Qg(-4.5V) Total Gate Charge
Qgs
Gate Source Charge
Qgd
Gate Drain Charge
tD(on)
Turn-On DelayTime
tr
Turn-On Rise Time
tD(off)
Turn-Off DelayTime
tf
Turn-Off Fall Time
Max
-5
VGS=0V, VDS=0V, f=1MHz
VGS=-10V, VDS=-15V, ID=-20A
VGS=-10V, VDS=-15V, RL=0.75Ω,
RGEN=3Ω
µA
±10
µA
-1.2
-1.6
V
5.5
7
7
8.5
6.1
8
mΩ
-1
V
-50
A
5500
pF
A
70
-0.65
4580
VGS=0V, VDS=-15V, f=1MHz
Units
V
VDS=-30V, VGS=0V
IDSS
VGS(th)
Typ
mΩ
S
755
pF
564
pF
160
210
Ω
87
105
nC
41
nC
12.8
nC
17
nC
180
ns
260
1.2
ns
µs
9.7
µs
trr
Body Diode Reverse Recovery Time
IF=-20A, dI/dt=300A/µs
32
Qrr
Body Diode Reverse Recovery Charge IF=-20A, dI/dt=300A/µs
77
40
ns
nC
A: The value of R θJA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =25°C. The
Power dissipation P DSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends
on the user's specific board design.
B. The power dissipation P D is based on T J(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper
dissipation limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature T J(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep
initial T J =25°C.
D. The RθJA is the sum of the thermal impedence from junction to case R θJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink,
assuming a maximum junction temperature of T J(MAX)=150°C. The SOA curve provides a single pulse rating.
G. The maximum current rating is limited by bond-wires.
H. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with T A=25°C.
Rev 0: July 2008
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Alpha & Omega Semiconductor, Ltd.
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AON6405L
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
160
100
-10V
140
-4V
-3.5V
120
80
-ID(A)
-5V
100
-ID (A)
VDS=-5V
80
-3V
60
40
60
125°C
40
20
VGS=-2.5V
20
25°C
0
0
0
1
2
3
4
0
5
-VDS (Volts)
Figure 1: On-Region Characteristics(Note E)
3
4
Normalized On-Resistance
1.8
VGS=-4.5V
7
RDS(ON) (mΩ)
2
-VGS(Volts)
Figure 2: Transfer Characteristics(Note E)
8
6
5
VGS=-10V
4
ID=-20A
1.6
VGS=-10V
1.4
1.2
VGS=-4.5V
1
0.8
3
0
5
10
15
20
25
0
30
25
50
75
100
125
150
175
Temperature (°C)
Figure 4: On-Resistance vs. Junction Temperature
(Note E)
-ID (A)
Figure 3: On-Resistance vs. Drain Current and Gate
Voltage(Note E)
1.0E+02
20
ID=-20A
1.0E+01
16
1.0E+00
12
-IS (A)
RDS(ON) (mΩ)
1
125°C
8
125°C
1.0E-01
25°C
1.0E-02
1.0E-03
4
25°C
1.0E-04
0
2
4
6
8
-VGS (Volts)
Figure 5: On-Resistance vs. Gate-Source
Voltage(Note E)
Alpha & Omega Semiconductor, Ltd.
10
1.0E-05
0.0
0.2
0.4
0.6
0.8
1.0
-VSD (Volts)
Figure 6: Body-Diode Characteristics(Note E)
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AON6405L
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
7000
10
VDS=-15V
ID=-20A
6000
Ciss
Capacitance (pF)
-VGS (Volts)
8
6
4
5000
4000
3000
2000
Coss
2
1000
Crss
0
0
0
20
40
60
80
100
0
5
Qg (nC)
Figure 7: Gate-Charge Characteristics
20
25
30
200
100.0
10.0
100µs
10s
10ms
1ms
DC
1.0
0.1
160
10µs
RDS(ON)
limited
Power (W)
-ID (Amps)
15
-VDS (Volts)
Figure 8: Capacitance Characteristics
1000.0
TJ(Max)=150°C
TC=25°C
120
80
40
TJ(Max)=150°C
TC=25°C
0.0
0
0.01
0.1
1
-VDS (Volts)
10
100
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
10
ZθJC Normalized Transient
Thermal Resistance
10
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
RθJC=1.5°C/W
0.0001
0.001
0.01
0.1
1
10
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-toCase (Note F)
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
1
0.1
PD
Ton
T
Single Pulse
0.01
0.00001
0.0001
0.001
0.01
0.1
1
10
100
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Alpha & Omega Semiconductor, Ltd.
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AON6405L
Gate Charge Test Circuit & Waveform
Vgs
Qg
-10V
-
-
VDC
+
VDC
Qgs
Vds
Qgd
+
DUT
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
t off
t on
td(on)
Vgs
-
DUT
Vgs
t d(off)
tr
tf
90%
Vdd
VDC
+
Rg
Vgs
10%
Vds
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
2
L
E AR= 1/2 LIAR
Vds
Vds
Id
-
Vgs
Vgs
VDC
+
Rg
BVDSS
Vdd
Id
I AR
DUT
Vgs
Vgs
Diode Recovery Test Circuit & Waveforms
Q rr = - Idt
Vds +
DUT
Vgs
Vds -
Isd
Vgs
Ig
Alpha & Omega Semiconductor, Ltd.
L
-Isd
+ Vdd
t rr
dI/dt
-I RM
Vdd
VDC
-
-I F
-Vds
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