CSD16406Q3 www.ti.com SLPS202A – AUGUST 2009 – REVISED SEPTEMBER 2010 N-Channel NexFET™ Power MOSFETs Check for Samples: CSD16406Q3 FEATURES 1 • • • • • • • 2 PRODUCT SUMMARY Ultra Low Qg and Qgd Low Thermal Resistance Avalanche Rated Pb Free Terminal Plating RoHS Compliant Halogen Free SON 3.3mm x 3.3mm Plastic Package VDS Drain to Source Voltage 25 V Qg Gate Charge Total (4.5V) 5.8 nC Qgd Gate Charge Gate to Drain RDS(on) Drain to Source On Resistance Vth Threshold Voltage • nC 5.9 mΩ VGS = 10V 4.2 mΩ 1.8 V ORDERING INFORMATION Device Package Media CSD16406Q3 SON 3.3 × 3.3 Plastic Package 13-inch reel APPLICATIONS • 1.5 VGS = 4.5V Point-of-Load Synchronous Buck Converter for Applications in Networking, Telecom and Computing Systems Optimized for Control or Synchronous FET Applications Qty Ship 2500 Tape and Reel ABSOLUTE MAXIMUM RATINGS VALUE UNIT VDS Drain to Source Voltage 25 V DESCRIPTION VGS Gate to Source Voltage +16 / –12 V 60 A The NexFET™ power MOSFET has been designed to minimize losses in power conversion applications. ID Continuous Drain Current, TC = 25°C Continuous Drain Current(1) 19 A IDM Pulsed Drain Current, TA = 25°C(2) 114 A Top View PD Power Dissipation(1) 2.7 W TJ, TSTG Operating Junction and Storage Temperature Range –55 to 150 °C EAS Avalanche Energy, single pulse ID = 45A, L = 0.1mH, RG = 25Ω 101 mJ S 8 D S 7 D S 6 D TA = 25°C unless otherwise stated (1) RqJA = 46°C/W on 1in2 Cu (2 oz.) on 0.060" thick FR4 PCB. (2) Pulse width ≤300ms, duty cycle ≤2% D 5 G D P0095-01 RDS(ON) vs VGS Gate Charge 12 ID = 20A VDS = 12.5V ID = 20A 18 10 16 VG − Gate Voltage − V RDS(on) − On-State Resistance − mΩ 20 14 12 TC = 125°C 10 8 6 4 8 6 4 2 TC = 25°C 2 0 0 0 2 4 6 8 VGS − Gate to Source Voltage − V 10 12 G006 0 2 4 6 8 10 12 14 Qg − Gate Charge − nC G003 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NexFET is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2009–2010, Texas Instruments Incorporated CSD16406Q3 SLPS202A – AUGUST 2009 – REVISED SEPTEMBER 2010 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise stated) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Static Characteristics BVDSS Drain to Source Voltage VGS = 0V, ID = 250mA IDSS Drain to Source Leakage Current VGS = 0V, VDS = 20V IGSS Gate to Source Leakage Current VDS = 0V, VGS = +16/-12V VGS(th) Gate to Source Threshold Voltage VDS = VGS, ID = 250mA RDS(on) Drain to Source On Resistance gfs Transconductance 25 1.4 V 1 mA 100 nA 1.8 2.2 V VGS = 4.5V, ID = 20A 5.9 7.4 mΩ VGS = 10V, ID = 20A 4.2 5.3 mΩ VDS = 15V, ID = 20A 53 S Dynamic Characteristics CISS Input Capacitance COSS Output Capacitance CRSS Reverse Transfer Capacitance Rg Series Gate Resistance Qg Gate Charge Total (4.5V) 5.8 Qgd Gate Charge Gate to Drain Qgs Gate Charge Gate to Source Qg(th) Gate Charge at Vth QOSS Output Charge td(on) Turn On Delay Time tr Rise Time td(off) Turn Off Delay Time tf Fall Time VGS = 0V, VDS = 12.5V, f = 1MHz VDS = 12.5V, ID = 20A VDS = 13.6V, VGS = 0V VDS = 12.5V, VGS = 4.5V ID = 20A RG = 2Ω 840 1100 pF 680 950 pF 57 80 pF 1.2 2.4 Ω 8.1 nC 1.5 nC 2.5 nC 1.5 nC 13.9 nC 7.3 ns 12.9 ns 8.5 ns 4.8 ns Diode Characteristics VSD Diode Forward Voltage IS = 20A, VGS = 0V 0.85 1.0 V Qrr Reverse Recovery Charge VDD = 13.6V, IF = 20A, di/dt = 300A/ms 18 nC trr Reverse Recovery Time VDD = 13.6V, IF = 20A, di/dt = 300A/ms 22 ns THERMAL CHARACTERISTICS (TA = 25°C unless otherwise stated) PARAMETER (1) R qJC Thermal Resistance Junction to Case R qJA Thermal Resistance Junction to Ambient (1) (1) (2) 2 (2) MIN TYP MAX UNIT 2.7 °C/W 58 °C/W RqJC is determined with the device mounted on a 1 inch square 2 oz. Cu pad on a 1.5 × 1.5 in 0.06 inch thick FR4 board. RqJC is specified by design while RqJA is determined by the user’s board design. Device mounted on FR4 Material with 1 inch2 of 2 oz. Cu. Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated Product Folder Link(s): CSD16406Q3 CSD16406Q3 www.ti.com SLPS202A – AUGUST 2009 – REVISED SEPTEMBER 2010 GATE GATE Source Source Max RqJA = 162°C/W when mounted on minimum pad area of 2 oz. Cu. Max RqJA = 58°C/W when mounted on 1 inch2 of 2 oz. Cu. DRAIN DRAIN M0161-02 M0161-01 TYPICAL MOSFET CHARACTERISTICS (TA = 25°C unless otherwise stated) ZqJA – NormalizedThermal Impedance 10 1 0.5 0.3 0.1 0.01 0.1 0.05 Duty Cycle = t1/t2 0.02 0.01 P t1 t2 Single Pulse 0.001 0.0001 0.0001 2 RqJA = 130°C/W (1 inCu) TJ = P x ZqJA x RqJA 0.001 0.01 0.1 1 10 100 1k tp – Pulse Duration–s G012 Figure 1. Transient Thermal Impedance Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated Product Folder Link(s): CSD16406Q3 3 CSD16406Q3 SLPS202A – AUGUST 2009 – REVISED SEPTEMBER 2010 www.ti.com TYPICAL MOSFET CHARACTERISTICS (continued) (TA = 25°C unless otherwise stated) 50 50 VDS = 5V 40 VGS = 10V 35 VGS = 4.5V 40 ID − Drain Current − A ID − Drain Current − A 45 VGS = 3V 30 VGS = 3.5V 25 20 15 VGS = 2.5V 10 TC = 125°C 30 TC = 25°C 20 TC = −55°C 10 5 0 0.0 0.5 1.0 1.5 2.0 2.5 0 1.5 3.0 VDS − Drain to Source Voltage − V 2.0 4.0 G002 2.5 ID = 20A VDS = 12.5V f = 1MHz VGS = 0V 2.0 C − Capacitance − nF 10 VG − Gate Voltage − V 3.5 Figure 3. Transfer Characteristics 12 8 6 4 COSS = CDS + CGD 1.5 CISS = CGD + CGS 1.0 0.5 2 0 CRSS = CGD 0.0 0 2 4 6 8 10 12 14 Qg − Gate Charge − nC 0 5 15 20 25 G004 Figure 5. Capacitance 2.50 20 RDS(on) − On-State Resistance − mΩ ID = 250mA 2.25 2.00 1.75 1.50 1.25 1.00 0.75 0.50 −75 10 VDS − Drain to Source Voltage − V G003 Figure 4. Gate Charge VGS(th) − Threshold Voltage − V 3.0 VGS − Gate to Source Voltage − V G001 Figure 2. Saturation Characteristics ID = 20A 18 16 14 12 TC = 125°C 10 8 6 4 TC = 25°C 2 0 −25 25 75 125 175 TC − Case Temperature − °C 0 2 4 6 8 10 VGS − Gate to Source Voltage − V G005 Figure 6. Threshold Voltage vs. Temperature 4 2.5 12 G006 Figure 7. On Resistance vs. Gate Voltage Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated Product Folder Link(s): CSD16406Q3 CSD16406Q3 www.ti.com SLPS202A – AUGUST 2009 – REVISED SEPTEMBER 2010 TYPICAL MOSFET CHARACTERISTICS (continued) (TA = 25°C unless otherwise stated) 100 1.4 ID = 20A VGS = 10V ISD − Source to Drain Current − A Normalized On-State Resistance 1.6 1.2 1.0 0.8 0.6 0.4 0.2 0.0 −75 10 1 TC = 125°C 0.1 TC = 25°C 0.01 0.001 0.0001 −25 25 75 125 175 TC − Case Temperature − °C 0.0 0.8 1.0 1.2 G008 1k I(AV) − Peak Avalanche Current − A 100 ID − Drain Current − A 0.6 Figure 9. Typical Diode Forward Voltage 1k 100ms 10 1ms 10ms Area Limited by RDS(on) 100ms 1s 0.1 0.01 0.01 0.4 VSD − Source to Drain Voltage − V G007 Figure 8. Normalized On Resistance vs. Temperature 1 0.2 Single Pulse RθJA = 130°C/W (min Cu) 0.1 DC 1 10 TC = 125°C 10 1 0.01 100 VDS − Drain To Source Voltage − V TC = 25°C 100 0.1 1 10 100 t(AV) − Time in Avalanche − ms G009 Figure 10. Maximum Safe Operating Area G010 Figure 11. Single Pulse Unclamped Inductive Switching 70 ID − Drain Current − A 60 50 40 30 20 10 0 −50 −25 0 25 50 75 100 125 TC − Case Temperature − °C 150 175 G011 Figure 12. Maximum Drain Current vs. Temperature Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated Product Folder Link(s): CSD16406Q3 5 CSD16406Q3 SLPS202A – AUGUST 2009 – REVISED SEPTEMBER 2010 www.ti.com MECHANICAL DATA Q3 Package Dimensions D2 D H L 1 2 7 3 6 4 5 5 4 3 b E2 E 6 e E 7 2 8 8 1 q L1 Top View A1 Bottom View A Side View c D Front View M0142-01 DIM MILLIMETERS MIN NOM MAX MIN NOM MAX A 0.950 1.000 1.100 0.037 0.039 0.043 A1 0.000 0.000 0.050 0.000 0.000 0.002 b 0.280 0.340 0.400 0.011 0.013 0.016 c 0.150 0.200 0.250 0.006 0.008 0.010 D 3.200 3.300 3.400 0.126 0.130 0.134 D1 – – – – – – D2 1.650 1.750 1.800 0.065 0.069 0.071 E 3.200 3.300 3.400 0.126 0.130 0.134 E1 – – – – – – E2 2.350 2.450 2.550 0.093 0.096 0.100 e 6 INCHES 0.650 TYP 0.026 H 0.35 0.450 0.550 0.014 0.018 0.022 L 0.35 0.450 0.550 0.014 0.018 0.022 L1 – – – – – – q – – – – – – Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated Product Folder Link(s): CSD16406Q3 CSD16406Q3 www.ti.com SLPS202A – AUGUST 2009 – REVISED SEPTEMBER 2010 2.31 1 8 8 1 0.65 Typ. 2.45 5 4 5 3.50 0.56 0.41 4 0.50 Typ. Recommended PCB Pattern 0.63 M0143-01 For recommended circuit layout for PCB designs, see application note SLPA005 – Reducing Ringing Through PCB Layout Techniques. 1.75 ±0.10 Q3 Tape and Reel Information 4.00 ±0.10 (See Note 1) Ø 1.50 +0.10 –0.00 3.60 1.30 3.60 5.50 ±0.05 12.00 +0.30 –0.10 8.00 ±0.10 2.00 ±0.05 M0144-01 Notes: 1. 10 sprocket hole pitch cumulative tolerance ±0.2 2. Camber not to exceed 1mm IN 100mm, noncumulative over 250mm 3. Material:black static dissipative polystyrene 4. All dimensions are in mm (unless otherwise specified) 5. Thickness: 0.30 ±0.05mm 6. MSL1 260°C (IR and Convection) PbF Reflow Compatible Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated Product Folder Link(s): CSD16406Q3 7 CSD16406Q3 SLPS202A – AUGUST 2009 – REVISED SEPTEMBER 2010 www.ti.com REVISION HISTORY Changes from Original (August 2009) to Revision A • 8 Page Deleted the Package Marking Information section ............................................................................................................... 7 Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated Product Folder Link(s): CSD16406Q3 PACKAGE MATERIALS INFORMATION www.ti.com 21-Jan-2011 TAPE AND REEL INFORMATION *All dimensions are nominal Device CSD16406Q3 Package Package Pins Type Drawing SON DQG 8 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.0 12.8 Pack Materials-Page 1 3.6 B0 (mm) K0 (mm) P1 (mm) 3.6 1.2 8.0 W Pin1 (mm) Quadrant 12.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 21-Jan-2011 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CSD16406Q3 SON DQG 8 2500 335.0 335.0 32.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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