CSD16403Q5A www.ti.com SLPS201A – AUGUST 2009 – REVISED SEPTEMBER 2010 N-Channel NexFET™ Power MOSFETs Check for Samples: CSD16403Q5A FEATURES 1 • • • • • • • 2 PRODUCT SUMMARY Ultra Low Qg and Qgd Low Thermal Resistance Avalanche Rated Pb Free Terminal Plating RoHS Compliant Halogen Free SON 5mm x 6mm Plastic Package VDS Drain to Source Voltage Qg Gate Charge Total (4.5V) Qgd Gate Charge Gate to Drain • V nC 3.5 RDS(on) Drain to Source On Resistance VGS(th) Threshold Voltage nC VGS = 4.5V 2.9 mΩ VGS = 10V 2.2 mΩ 1.6 V ORDERING INFORMATION Device Package Media CSD16403Q5A SON 5X6 Plastic Package 13-inch reel APPLICATIONS • 25 13.3 Point-of-Load Synchronous Buck Converter for Applications in Networking, Telecom and Computing Systems Optimized for Control FET Applications DESCRIPTION Qty Ship 2500 Tape and Reel ABSOLUTE MAXIMUM RATINGS TA = 25°C unless otherwise stated VALUE UNIT VDS Drain to Source Voltage 25 V VGS Gate to Source Voltage +16 / –12 V Continuous Drain Current, TC = 25°C 100 A Continuous Drain Current(1) 28 A The NexFET™ power MOSFET has been designed to minimize losses in power conversion applications. ID Top View IDM Pulsed Drain Current, TA = 25°C(2) 184 A PD Power Dissipation(1) 3.1 W S 1 8 D TJ, TSTG Operating Junction and Storage Temperature Range –55 to 150 °C S 2 7 D EAS Avalanche Energy, single pulse ID = 67A, L = 0.1mH, RG = 25Ω 224 mJ S 3 6 D (1) RqJA = 41°C/W on 1in2 Cu FR4 PCB. (2) Pulse width ≤300ms, duty cycle ≤2% G 4 D 5 D P0093-01 RDS(ON) vs VGS Gate Charge 12 ID = 20A VDS = 12.5V ID = 20A 10 8 VG − Gate Voltage − V RDS(on) − On-State Resistance − mΩ 10 6 TC = 125°C 4 2 8 6 4 2 TC = 25°C 0 0 0 2 4 6 8 VGS − Gate to Source Voltage − V 10 12 G006 0 3 6 9 12 15 18 21 24 27 30 33 Qg − Gate Charge − nC G003 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NexFET is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2009–2010, Texas Instruments Incorporated CSD16403Q5A SLPS201A – AUGUST 2009 – REVISED SEPTEMBER 2010 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise stated) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Static Characteristics BVDSS Drain to Source Voltage VGS = 0V, ID = 250mA IDSS Drain to Source Leakage Current VGS = 0V, VDS = 20V IGSS Gate to Source Leakage Current VDS = 0V, VGS = +16/-12V VGS(th) Gate to Source Threshold Voltage VDS = VGS, ID = 250mA RDS(on) Drain to Source On Resistance gfs Transconductance 25 1.2 V 1 mA 100 nA 1.6 1.9 V VGS = 4.5V, ID = 20A 2.9 3.7 mΩ VGS = 10V, ID = 20A 2.2 2.8 mΩ VDS = 15V, ID = 20A 91 S Dynamic Characteristics CISS Input Capacitance COSS Output Capacitance 2040 2660 pF 1600 2080 pF CRSS Rg Reverse Transfer Capacitance 115 160 pF Series Gate Resistance 1.2 2.4 Qg Gate Charge Total (4.5V) Ω 13.3 18 nC Qgd Gate Charge Gate to Drain Qgs Gate Charge Gate to Source Qg(th) Gate Charge at Vth QOSS Output Charge td(on) Turn On Delay Time tr Rise Time 18.3 ns td(off) Turn Off Delay Time 15.2 ns tf Fall Time 9.2 ns VGS = 0V, VDS = 12.5V , f = 1MHz VDS = 12.5V, ID = 20A VDS = 13.5V, VGS = 0V VDS = 12.5V, VGS = 4.5V, ID = 20A, RG = 2Ω 3.5 nC 5.5 nC 3.1 nC 33 nC 11.8 ns Diode Characteristics VSD Diode Forward Voltage IS = 20A, VGS = 0V 0.8 1.0 V Qrr Reverse Recovery Charge VDD = 13.5V, IF = 20A, di/dt = 300A/ms 47 nC trr Reverse Recovery Time VDD = 13.5V, IF = 20A, di/dt = 300A/ms 35 ns THERMAL CHARACTERISTICS (TA = 25°C unless otherwise stated) PARAMETER (1) R qJC Thermal Resistance Junction to Case R qJA Thermal Resistance Junction to Ambient (1) (1) (2) 2 (2) MIN TYP MAX UNIT 1.8 °C/W 51 °C/W RqJC is determined with the device mounted on a 1 inch square 2 oz. Cu pad on a 1.5 × 1.5 in 0.060 inch thick FR4 board. RqJC is specified by design while RqJA is determined by the user’s board design. Device mounted on FR4 Material with 1 inch2 of 2 oz. Cu. Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated Product Folder Link(s): CSD16403Q5A CSD16403Q5A www.ti.com SLPS201A – AUGUST 2009 – REVISED SEPTEMBER 2010 GATE GATE Source N-Chan 5x6 QFN TTA MIN Rev3 N-Chan 5x6 QFN TTA MAX Rev3 Max RqJA = 51°C/W when mounted on 1 inch2 of 2 oz. Cu. Source Max RqJA = 118°C/W when mounted on minimum pad area of 2 oz. Cu. DRAIN DRAIN M0137-02 M0137-01 TYPICAL MOSFET CHARACTERISTICS (TA = 25°C unless otherwise stated) ZqJA – Normalized Thermal Impedance 10 1 0.5 0.3 0.1 0.01 0.1 0.05 Duty Cycle = t1/t2 0.02 0.01 P t1 t2 Single Pulse 0.001 0.0001 0.001 RqJA = 94°C/W (min Cu) TJ = P ´ ZqJA ´ RqJA 0.01 0.1 1 10 100 1k tp – Pulse Duration – s G012 Figure 1. Transient Thermal Impedance Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated Product Folder Link(s): CSD16403Q5A 3 CSD16403Q5A SLPS201A – AUGUST 2009 – REVISED SEPTEMBER 2010 www.ti.com TYPICAL MOSFET CHARACTERISTICS (continued) (TA = 25°C unless otherwise stated) TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING 80 80 VGS = 3V VGS = 10V 60 VGS = 4.5V 50 40 VGS = 3.5V 30 VGS = 2.5V 20 10 0.5 1.0 1.5 2.0 2.5 40 TC = 25°C 30 20 TC = −55°C 1.5 2.0 2.5 3.0 3.5 VGS − Gate to Source Voltage − V G001 4.0 G002 Figure 2. Saturation Characteristics Figure 3. Transfer Characteristics TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING 12 6 ID = 20A VDS = 12.5V f = 1MHz VGS = 0V 5 C − Capacitance − nF 10 VG − Gate Voltage − V TC = 125°C 50 0 1.0 3.0 VDS − Drain to Source Voltage − V 8 6 4 2 4 COSS = CDS + CGD CISS = CGD + CGS 3 2 CRSS = CGD 1 0 0 0 3 6 9 12 15 18 21 24 27 30 33 Qg − Gate Charge − nC 0 10 15 20 VDS − Drain to Source Voltage − V 25 G004 Figure 4. Gate Charge Figure 5. Capacitance TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING RDS(on) − On-State Resistance − mΩ 10 ID = 250µA 1.75 1.50 1.25 1.00 0.75 0.50 −75 5 G003 2.00 VGS(th) − Threshold Voltage − V 60 10 0 0.0 ID = 20A 8 6 TC = 125°C 4 2 TC = 25°C 0 −25 25 75 125 175 TC − Case Temperature − °C 0 2 4 6 8 10 VGS − Gate to Source Voltage − V G005 Figure 6. Threshold Voltage vs Temperature 4 VDS = 5V 70 ID − Drain Current − A ID − Drain Current − A 70 12 G006 Figure 7. On Resistance vs Gate Voltage Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated Product Folder Link(s): CSD16403Q5A CSD16403Q5A www.ti.com SLPS201A – AUGUST 2009 – REVISED SEPTEMBER 2010 TYPICAL MOSFET CHARACTERISTICS (continued) (TA = 25°C unless otherwise stated) TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING 100 1.4 ID = 20A VGS = 10V ISD − Source to Drain Current − A Normalized On-State Resistance 1.6 1.2 1.0 0.8 0.6 −75 10 1 0.1 0.001 25 75 125 175 0.0 0.4 0.6 0.8 1.0 1.2 VSD − Source to Drain Voltage − V G007 Figure 9. Typical Diode Forward Voltage TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING G008 1k 100 I(AV) − Peak Avalanche Current − A ID − Drain Current − A 0.2 Figure 8. On Resistance vs Temperature 1k 1ms 10 10ms 100ms Area Limited by RDS(on) 1s 0.1 Single Pulse o RqJA = 94 C/W (min Cu) 0.01 0.01 TC = 25°C 0.01 0.0001 −25 TC − Case Temperature − °C 1 TC = 125°C 0.1 DC 1 10 TC = 25°C 100 TC = 125°C 10 1 0.01 100 VDS − Drain To Source Voltage − V 0.1 1 10 100 t(AV) − Time in Avalanche − ms G009 Figure 10. Maximum Safe Operating Area G010 Figure 11. Single Pulse Unclamped Inductive Switching TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING 120 ID − Drain Current − A 100 80 60 40 20 0 −50 0 50 100 150 TC − Case Temperature − °C 200 G011 Figure 12. Maximum Drain Current vs Temperature Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated Product Folder Link(s): CSD16403Q5A 5 CSD16403Q5A SLPS201A – AUGUST 2009 – REVISED SEPTEMBER 2010 www.ti.com MECHANICAL DATA Q5A Package Dimensions L E2 H K 7 D2 3 4 b 4 5 5 6 3 6 e D1 7 2 2 8 8 1 1 q L1 Top View Bottom View Side View c A q E1 E Front View M0135-01 DIM MILLIMETERS MIN NOM MAX A 0.90 1.00 1.10 b 0.33 0.41 0.51 c 0.20 0.25 0.30 D1 4.80 4.90 5.00 D2 3.61 3.81 3.96 E 5.90 6.00 6.10 E1 5.70 5.75 5.80 E2 3.38 3.58 3.78 e 1.27 BSC H 0.41 0.51 0.61 K 1.10 L L1 0.51 0.61 0.71 0.06 0.13 q 0° 0.20 12° For recommended circuit layout for PCB designs, see application note SLPA005 – Reducing Ringing Through PCB Layout Techniques. 6 Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated Product Folder Link(s): CSD16403Q5A CSD16403Q5A www.ti.com SLPS201A – AUGUST 2009 – REVISED SEPTEMBER 2010 DIM Recommended PCB Pattern F1 F7 F3 8 1 F2 F11 F5 F9 5 4 F6 MILLIMETERS INCHES MIN MAX MIN MAX F1 6.205 6.305 0.244 0.248 F2 4.46 4.56 0.176 0.18 F3 4.46 4.56 0.176 0.18 F4 0.65 0.7 0.026 0.028 F5 0.62 0.67 0.024 0.026 F6 0.63 0.68 0.025 0.027 F7 0.7 0.8 0.028 0.031 F8 0.65 0.7 0.026 0.028 F9 0.62 0.67 0.024 0.026 F10 4.9 5 0.193 0.197 F11 4.46 4.56 0.176 0.18 F8 F4 F10 M0139-01 K0 4.00 ±0.10 (See Note 1) 0.30 ±0.05 2.00 ±0.05 +0.10 –0.00 12.00 ±0.30 Ø 1.50 1.75 ±0.10 Q5A Tape and Reel Information 5.50 ±0.05 B0 R 0.30 MAX A0 8.00 ±0.10 Ø 1.50 MIN A0 = 6.50 ±0.10 B0 = 5.30 ±0.10 K0 = 1.40 ±0.10 R 0.30 TYP M0138-01 Notes: 1. 10 sprocket hole pitch cumulative tolerance ±0.2 2. Camber not to exceed 1mm IN 100mm, noncumulative over 250mm 3. Material:black static dissipative polystyrene 4. All dimensions are in mm (unless otherwise specified) 5. A0 and B0 measured on a plane 0.3mm above the bottom of the pocket 6. MSL1 260°C (IR and Convection) PbF Reflow Compatible REVISION HISTORY Changes from Original (August 2009) to Revision A • Page Deleted the Package Marking Information section ............................................................................................................... 7 Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated Product Folder Link(s): CSD16403Q5A 7 PACKAGE MATERIALS INFORMATION www.ti.com 7-Apr-2011 TAPE AND REEL INFORMATION *All dimensions are nominal Device CSD16403Q5A Package Package Pins Type Drawing SON DQJ 8 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.2 12.4 Pack Materials-Page 1 6.5 B0 (mm) K0 (mm) P1 (mm) 5.3 1.4 8.0 W Pin1 (mm) Quadrant 12.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 7-Apr-2011 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CSD16403Q5A SON DQJ 8 2500 347.0 342.0 55.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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