CSD16407Q5 www.ti.com SLPS203A – AUGUST 2009 – REVISED SEPTEMBER 2010 N-Channel NexFET™ Power MOSFETs Check for Samples: CSD16407Q5 FEATURES 1 • • • • 2 PRODUCT SUMMARY Ultralow Qg and Qgd Low Thermal Resistance Avalanche Rated SON 5-mm × 6-mm Plastic Package APPLICATIONS • • VDS Drain-to0source voltage Qg Gate charge, total (4.5 V) Qgd Gate charge, gate-to-drain RDS(on) Drain-to-source on-resistance VGS(th) Threshold voltage Point-of-Load Synchronous Buck Converter for Applications in Networking, Telecom and Computing Systems Optimized for Synchronous FET Applications 25 V 13.3 nC 3.5 nC VGS = 4.5 V 2.5 mΩ VGS = 10 V 1.8 mΩ 1.6 V ORDERING INFORMATION Device Package Media CSD16407Q5 SON 5 × 6 plastic package 13-inch reel Qty Ship 2500 Tape and reel DESCRIPTION The NexFET™ power MOSFET has been designed to minimize losses in power conversion applications. Top View S 8 1 2 7 D S 3 6 D D G 5 4 VALUE UNIT VDS Drain-to-source voltage 25 V VGS Gate-to-source voltage +16 / –12 V Continuous drain current, TC = 25°C 100 A Continuous drain current (1) 31 A IDM Pulsed drain current, TA = 25°C (2) 200 A PD Power dissipation (1) 3.1 W TJ, TSTG Operating junction and storage temperature range –55 to 150 °C EAS Avalanche energy, single pulse ID = 66A, L = 0.1 mH, RG = 25 Ω 218 mJ ID D S ABSOLUTE MAXIMUM RATINGS TA = 25°C unless otherwise stated D (1) P0094-01 (2) RqJA = 40°C/W on 1 in2 (6.45 cm2) Cu [2 oz. (0.071 mm thick)] on 0.060-inch (1.52-mm) thick FR4 PCB. Pulse duration ≤300 ms, duty cycle ≤2% rDS(ON) vs VGS Gate Charge 12 ID = 25A VDS = 12.5V ID = 25A 5 10 4 VG − Gate Voltage − V RDS(on) − On-State Resistance − mΩ 6 TC = 125°C 3 2 TC = 25°C 1 8 6 4 2 0 0 0 2 4 6 8 VGS − Gate to Source Voltage − V 10 12 G006 0 5 10 15 20 25 Qg − Gate Charge − nC 30 35 G003 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NexFET is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2009–2010, Texas Instruments Incorporated CSD16407Q5 SLPS203A – AUGUST 2009 – REVISED SEPTEMBER 2010 www.ti.com ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise stated) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Static Characteristics BVDSS Drain-to-source voltage VGS = 0 V, ID = 250 mA IDSS Drain-to-source leakage current VGS = 0 V, VDS = 20 V IGSS Gate-to-source leakage current VDS = 0 V, VGS = 16 V to –12 V VGS(th) Gate-to-source threshold voltage VDS = VGS, ID = 250 mA rDS(on) Drain-to-source on-resistance gfs Transconductance 25 V 1 mA 100 nA 1.6 1.9 V VGS = 4.5 V, ID = 25 A 2.5 3.3 mΩ VGS = 10 V, ID = 25 A 1.8 2.4 mΩ VDS = 15 V, ID = 25 A 111 1.3 S Dynamic Characteristics CISS Input capacitance COSS Output capacitance 2040 2660 pF 1600 2080 pF CRSS Rg Reverse transfer capacitance 115 160 pF Series gate resistance 1.2 2.4 Qg Gate charge total (4.5 V) Ω 13.3 18 nC Qgd Gate charge, gate-to-drain Qgs Gate charge, gate-to-source Qg(th) Gate charge at Vth QOSS Output charge td(on) Turnon delay time tr Rise time td(off) Turnoff delay time tf Fall time VGS = 0 V, VDS = 12.5 V, f = 1 MHz VDS = 12.5 V, ID = 25 A VDS = 13.5 V, VGS = 0 V VDS = 12.5 V, VGS = 4.5 V, ID = 25 A RG = 2 Ω 3.5 nC 5.3 nC 3.1 nC 33 nC 11.9 ns 18.4 ns 16 ns 9 ns Diode Characteristics VSD Diode forward voltage IS = 25 A, VGS = 0 V 0.8 Qrr Reverse recovery charge VDD = 13.5 V, IF = 25 A, di/dt = 300 A/ms 41 1 nC V trr Reverse recovery time VDD = 13.5 V, IF = 25 A, di/dt = 300 A/ms 34 ns THERMAL CHARACTERISTICS (TA = 25°C unless otherwise stated) PARAMETER R qJC R qJA (1) (2) 2 Thermal resistance, junction-to-case (1) Thermal resistance, junction-to-ambient (1) (2) MIN TYP MAX UNIT 1.1 °C/W 51 °C/W RqJC is determined with the device mounted on a 1-inch (2.54-cm) square 2-oz (0.071-mm thick). Cu pad on a 1.5-inch (3.81-cn) × 1.5-inch (3.81-cm) × 0.060-inch (1.52-mm) thick FR4 board. RqJC is specified by design, whereas RqJA is determined by the user’s board design. Device mounted on FR4 material with 1 inch2 (6.45 cm2) of 2-oz. (0.071-mm thick) Cu. Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated Product Folder Link(s): CSD16407Q5 CSD16407Q5 www.ti.com SLPS203A – AUGUST 2009 – REVISED SEPTEMBER 2010 GATE GATE Source N-Chan 5x6 QFN TTA MIN Rev3 N-Chan 5x6 QFN TTA MAX Rev3 Max RqJA = 50°C/W when mounted on 1 inch2 (6.45 cm2) of 2-oz. (0.071-mm thick) Cu. Source Max RqJA = 121°C/W when mounted on minimum pad area of 2-oz. (0.071-mm thick) Cu. DRAIN DRAIN M0137-02 M0137-01 Text and Text and Text and Text and Text and br Added for Spacing br br br br Added Added Added Added for for for for Spacing Spacing Spacing Spacing TYPICAL MOSFET CHARACTERISTICS (TA = 25°C unless otherwise stated) ZqJA – Normalized Thermal Impedance 10 1 0.5 0.3 Duty Cycle = t1/t2 0.1 0.1 0.05 0.01 P t1 0.02 0.01 t2 RqJA = 94°C/W (min Cu) TJ = P ´ ZqJA ´ RqJA Single Pulse 0.001 0.001 0.01 0.1 1 10 100 1k tp – Pulse Duration – s G012 Figure 1. Transient Thermal Impedance Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated Product Folder Link(s): CSD16407Q5 3 CSD16407Q5 SLPS203A – AUGUST 2009 – REVISED SEPTEMBER 2010 www.ti.com TYPICAL MOSFET CHARACTERISTICS (continued) (TA = 25°C unless otherwise stated) 80 80 VGS = 3V 60 VGS = 4.5V 50 40 VGS = 3.5V 30 VGS = 2.5V 20 10 0.5 1.0 1.5 2.0 2.5 40 TC = 25°C 30 20 TC = −55°C 1.5 2.0 2.5 3.0 3.5 VGS − Gate to Source Voltage − V G001 4.0 G002 Figure 2. Saturation Characteristics Figure 3. Transfer Characteristics TEXT ADDED FOR SPACING vs TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING vs TEXT ADDED FOR SPACING 12 6 ID = 25A VDS = 12.5V f = 1MHz VGS = 0V 5 C − Capacitance − nF 10 VG − Gate Voltage − V TC = 125°C 50 0 1.0 3.0 VDS − Drain to Source Voltage − V 8 6 4 2 4 COSS = CDS + CGD CISS = CGD + CGS 3 2 CRSS = CGD 1 0 0 0 5 10 15 20 25 30 35 Qg − Gate Charge − nC 0 10 15 20 VDS − Drain to Source Voltage − V 25 G004 Figure 4. Gate Charge Figure 5. Capacitance TEXT ADDED FOR SPACING vs TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING vs TEXT ADDED FOR SPACING RDS(on) − On-State Resistance − mΩ 6 ID = 250µA 1.75 1.50 1.25 1.00 0.75 0.50 0.25 0.00 −75 5 G003 2.00 VGS(th) − Threshold Voltage − V 60 10 0 0.0 ID = 25A 5 4 TC = 125°C 3 2 TC = 25°C 1 0 −25 25 75 125 175 TC − Case Temperature − °C 0 2 4 6 8 10 VGS − Gate to Source Voltage − V G005 Figure 6. Threshold Voltage vs. Temperature 4 VDS = 5V 70 VGS = 10V ID − Drain Current − A ID − Drain Current − A 70 12 G006 Figure 7. On Resistance vs. Gate Voltage Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated Product Folder Link(s): CSD16407Q5 CSD16407Q5 www.ti.com SLPS203A – AUGUST 2009 – REVISED SEPTEMBER 2010 TYPICAL MOSFET CHARACTERISTICS (continued) (TA = 25°C unless otherwise stated) 100 1.6 ID = 25A VGS = 10V ISD − Source to Drain Current − A Normalized On-State Resistance 1.8 1.4 1.2 1.0 0.8 0.6 0.4 −75 10 1 0.1 0.001 25 75 125 175 0.0 0.4 0.6 0.8 1.0 1.2 VSD − Source to Drain Voltage − V Figure 8. On Resistance vs. Temperature Figure 9. Typical Diode Forward Voltage TEXT ADDED FOR SPACING vs TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING vs TEXT ADDED FOR SPACING G008 1k I(AV) − Peak Avalanche Current − A ID − Drain Current − A 0.2 G007 1k 100 1ms 10 10ms 100ms Area Limited by RDS(on) 1s 0.1 Single Pulse o RqJA = 94 C/W (min Cu) 0.01 0.01 TC = 25°C 0.01 0.0001 −25 TC − Case Temperature − °C 1 TC = 125°C 0.1 DC 1 10 100 TC = 125°C 10 1 0.01 100 VDS − Drain To Source Voltage − V TC = 25°C 0.1 1 10 100 t(AV) − Time in Avalanche − ms G009 Figure 10. Maximum Safe Operating Area G010 Figure 11. Single Pulse Unclamped Inductive Switching TEXT ADDED FOR SPACING vs TEXT ADDED FOR SPACING 120 ID − Drain Current − A 100 80 60 40 20 0 −50 −25 0 25 50 75 100 125 TC − Case Temperature − °C 150 175 G011 Figure 12. Maximum Drain Current vs. Temperature Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated Product Folder Link(s): CSD16407Q5 5 CSD16407Q5 SLPS203A – AUGUST 2009 – REVISED SEPTEMBER 2010 www.ti.com MECHANICAL DATA Q5 Package Dimensions K L L c1 D2 4 4 5 5 e 3 6 3 6 E D1 7 7 2 2 8 8 1 b q E2 1 E1 Top View Bottom View Side View c E1 A q Front View M0140-01 DIM MILLIMETERS MAX MIN MAX A 0.950 1.050 0.037 0.039 b 0.360 0.460 0.014 0.018 c 0.150 0.250 0.006 0.010 c1 0.150 0.250 0.006 0.010 D1 4.900 5.100 0.193 0.201 D2 4.320 4.520 0.170 0.178 E 4.900 5.100 0.193 0.201 E1 5.900 6.100 0.232 0.240 E2 3.920 4.12 0.154 e 6 INCHES MIN 1.27 TYP 0.162 0.050 L 0.510 0.710 0.020 0.028 q 0.00 – – – K 0.760 – 0.030 – Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated Product Folder Link(s): CSD16407Q5 CSD16407Q5 www.ti.com SLPS203A – AUGUST 2009 – REVISED SEPTEMBER 2010 Recommended PCB Pattern DIM F1 F7 F3 8 1 F2 F11 F5 F9 5 4 F6 INCHES MAX MIN MAX F1 6.205 6.305 0.2440 0.248 F2 4.460 4.560 0.1760 0.180 F3 4.460 4.560 0.1760 0.180 F4 0.650 0.700 0.0260 0.028 F5 0.620 0.670 0.0240 0.026 F6 0.630 0.680 0.0250 0.027 F7 0.70 0.800 0.0380 0.031 F8 0.650 0.700 0.0260 0.028 F9 0.620 0.670 0.0240 0.026 F10 4.900 5.000 0.1930 0.197 F11 4.460 4.560 0.1760 0.180 F4 F8 F10 MILLIMETERS MIN M0139-01 For recommended circuit layout for PCB designs, see application note SLPA005 – Reducing Ringing Through PCB Layout Techniques. K0 4.00 ±0.10 (See Note 1) 0.30 ±0.05 2.00 ±0.05 +0.10 –0.00 12.00 ±0.30 Ø 1.50 1.75 ±0.10 Q5 Tape and Reel Information 5.50 ±0.05 B0 R 0.30 MAX A0 8.00 ±0.10 Ø 1.50 MIN A0 = 6.50 ±0.10 B0 = 5.30 ±0.10 K0 = 1.40 ±0.10 R 0.30 TYP M0138-01 Notes: 1. 10 sprocket hole pitch cumulative tolerance ±0.2 2. Camber not to exceed 1 mm IN 100 mm, noncumulative over 250 mm 3. Material:black static dissipative polystyrene 4. All dimensions are in mm (unless otherwise specified) 5. Thickness: 0.30 ±0.05 mm 6. MSL1 260°C (IR and Convection) PbF Reflow Compatible Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated Product Folder Link(s): CSD16407Q5 7 CSD16407Q5 SLPS203A – AUGUST 2009 – REVISED SEPTEMBER 2010 www.ti.com REVISION HISTORY Changes from Revision Original (August 2009) to Revision A Page • Deleted environmental bullets from features list ................................................................................................................... 1 • Deleted package marking at end of data sheet .................................................................................................................... 7 8 Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated Product Folder Link(s): CSD16407Q5 PACKAGE MATERIALS INFORMATION www.ti.com 10-Mar-2011 TAPE AND REEL INFORMATION *All dimensions are nominal Device CSD16407Q5 Package Package Pins Type Drawing SON DQH 8 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.0 12.8 Pack Materials-Page 1 6.5 B0 (mm) K0 (mm) P1 (mm) 5.3 1.4 8.0 W Pin1 (mm) Quadrant 12.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 10-Mar-2011 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CSD16407Q5 SON DQH 8 2500 335.0 335.0 32.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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