TI CSD16410Q5A

CSD16410Q5A
www.ti.com
SLPS205A – AUGUST 2009 – REVISED MAY 2010
N-Channel NexFET™ Power MOSFETs
Check for Samples: CSD16410Q5A
FEATURES
1
•
•
•
•
•
•
•
2
Ultra Low Qg and Qgd
Low Thermal Resistance
Avalanche Rated
Pb Free Terminal Plating
RoHS Compliant
Halogen Free
SON 5mm x 6mm Plastic Package
PRODUCT SUMMARY
VDS
Drain to Source Voltage
25
V
Qg
Gate Charge Total (4.5V)
3.9
nC
Qgd
Gate Charge Gate to Drain
RDS(on)
Drain to Source On Resistance
VGS(th)
Threshold Voltage
APPLICATIONS
•
•
mΩ
Package
Media
CSD16410Q5A
13-inch
reel
TA = 25°C unless otherwise stated
V
Qty
Ship
2500
Tape and
Reel
VALUE
UNIT
VDS
Drain to Source Voltage
25
V
VGS
Gate to Source Voltage
+16 / –12
V
Continuous Drain Current, TC = 25°C
59
A
Continuous Drain Current(1)
16
A
IDM
Pulsed Drain Current, TA = 25°C(2)
158
A
PD
Power Dissipation(1)
3
W
TJ,
TSTG
Operating Junction and Storage
Temperature Range
–55 to 150
°C
EAS
Avalanche Energy, single pulse
ID = 32A, L = 0.1mH, RG = 25Ω
51
mJ
ID
8
1
D
7
2
D
D
6
3
D
5
4
D
(1) RqJA = 42°C/W on 1in2 Cu (2 oz.) on 0.060" thick FR4 PCB.
(2) Pulse width ≤300ms, duty cycle ≤2%
P0093-01
RDS(ON) vs VGS
Gate Charge
15
12
ID = 17A
VDS = 12.5V
ID = 17A
14
10
13
VG − Gate Voltage − V
RDS(on) − On-State Resistance − mΩ
6.8
1.9
SON 5X6 Plastic
Package
Top View
G
VGS = 10V
ABSOLUTE MAXIMUM RATINGS
The NexFET™ power MOSFET has been designed
to minimize losses in power conversion applications.
S
mΩ
Device
DESCRIPTION
S
nC
9.6
ORDERING INFORMATION
Point-of-Load Synchronous Buck Converter
for Applications in Networking, Telecom and
Computing Systems
Optimized for Control FET Applications
S
1.1
VGS = 4.5V
TC = 125°C
12
11
10
9
8
7
8
6
4
2
6
TC = 25°C
5
0
0
2
4
6
8
VGS − Gate to Source Voltage − V
10
12
G006
0
2
4
6
8
10
Qg − Gate Charge − nC
G003
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NexFET is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2009–2010, Texas Instruments Incorporated
CSD16410Q5A
SLPS205A – AUGUST 2009 – REVISED MAY 2010
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ELECTRICAL CHARACTERISTICS
(TA = 25°C unless otherwise stated)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Static Characteristics
BVDSS
Drain to Source Voltage
VGS = 0V, ID = 250mA
IDSS
Drain to Source Leakage Current
VGS = 0V, VDS = 20V
IGSS
Gate to Source Leakage Current
VDS = 0V, VGS = +16/-12V
VGS(th)
Gate to Source Threshold Voltage
VDS = VGS, ID = 250mA
RDS(on)
Drain to Source On Resistance
gfs
Transconductance
25
1.6
V
1
mA
100
nA
1.9
2.3
V
VGS = 4.5V, ID = 17A
9.6
12
mΩ
VGS = 10V, ID = 17A
6.8
8.5
mΩ
VDS = 15V, ID = 17A
38
S
Dynamic Characteristics
CISS
Input Capacitance
570
740
pF
COSS
Output Capacitance
CRSS
Reverse Transfer Capacitance
460
600
pF
40
52
Rg
pF
Series Gate Resistance
0.7
1.4
Ω
Qg
Gate Charge Total (4.5V)
3.9
5
nC
Qgd
Gate Charge Gate to Drain
Qgs
Gate Charge Gate to Source
Qg(th)
Gate Charge at Vth
QOSS
Output Charge
td(on)
Turn On Delay Time
tr
Rise Time
td(off)
Turn Off Delay Time
tf
Fall Time
VGS = 0V, VDS = 12.5V, f = 1MHz
VDS = 12.5V, ID = 17A
VDS = 13V, VGS = 0V
VDS = 12.5V, VGS = 4.5V, ID = 17A
RG = 2Ω
1.1
nC
1.8
nC
1.1
nC
10
nC
6.2
ns
10.7
ns
6.5
ns
3.6
ns
Diode Characteristics
VSD
Diode Forward Voltage
IS = 17A, VGS = 0V
0.85
1
V
Qrr
Reverse Recovery Charge
VDD = 13V, IF = 17A, di/dt = 300A/ms
14
nC
trr
Reverse Recovery Time
VDD = 13V, IF = 17A, di/dt = 300A/ms
18.2
ns
THERMAL CHARACTERISTICS
(TA = 25°C unless otherwise stated)
PARAMETER
R qJC
Thermal Resistance Junction to Case (1)
R qJA
Thermal Resistance Junction to Ambient (1)
(1)
(2)
2
(2)
MIN
TYP
MAX
UNIT
3.8
°C/W
52
°C/W
RqJC is determined with the device mounted on a 1 inch square 2 oz. Cu pad on a 1.5 × 1.5 in 0.060 inch thick FR4 board. RqJC is
specified by design while RqJA is determined by the user’s board design.
Device mounted on FR4 Material with 1 inch2 of 2 oz. Cu.
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Product Folder Link(s): CSD16410Q5A
CSD16410Q5A
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SLPS205A – AUGUST 2009 – REVISED MAY 2010
GATE
GATE
Source
Source
N-Chan 5x6 QFN TTA MIN Rev3
N-Chan 5x6 QFN TTA MAX Rev3
Max RqJA = 52°C/W
when mounted on 1
inch2 of 2 oz. Cu.
Max RqJA = 121°C/W
when mounted on
minimum pad area of 2
oz. Cu.
DRAIN
DRAIN
M0137-02
M0137-01
TYPICAL MOSFET CHARACTERISTICS
(TA = 25°C unless otherwise stated)
ZqJA – Normalized Thermal Impedance
10
1
0.5
0.3
Duty Cycle = t1/t2
0.1
0.1
0.05
0.01
P
t1
0.02
0.01
t2
RqJA = 96°C/W (min Cu)
TJ = P ´ ZqJA ´ RqJA
Single Pulse
0.001
0.0001
0.001
0.01
0.1
1
10
100
1k
tp – Pulse Duration – s
G012
Figure 1. Transient Thermal Impedance
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CSD16410Q5A
SLPS205A – AUGUST 2009 – REVISED MAY 2010
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TYPICAL MOSFET CHARACTERISTICS (continued)
50
50
45
45
40
40
VGS = 10V
35
VGS = 3.5V
VGS = 4.5V
30
ID − Drain Current − A
ID − Drain Current − A
(TA = 25°C unless otherwise stated)
VGS = 4V
25
20
15
VGS = 3V
35
30
15
5
5
1.0
1.5
2.0
2.5
TC = −55°C
0
1.5
3.0
VDS − Drain to Source Voltage − V
TC = 25°C
20
10
0.5
TC = 125°C
25
10
0
0.0
VDS = 5V
2.0
4.0
4.5
G002
1.6
ID = 17A
VDS = 12.5V
f = 1MHz
VGS = 0V
1.4
C − Capacitance − nF
10
VG − Gate Voltage − V
3.5
Figure 3. Transfer Characteristics
12
8
6
4
2
1.2
COSS = CDS + CGD
1.0
CISS = CGD + CGS
0.8
0.6
0.4
CRSS = CGD
0.2
0
0.0
0
2
4
6
8
10
Qg − Gate Charge − nC
0
5
15
20
25
G004
Figure 5. Capacitance
2.5
RDS(on) − On-State Resistance − mΩ
15
ID = 250µA
2.0
1.5
1.0
0.5
0.0
−75
10
VDS − Drain to Source Voltage − V
G003
Figure 4. Gate Charge
VGS(th) − Threshold Voltage − V
3.0
VGS − Gate to Source Voltage − V
G001
Figure 2. Saturation Characteristics
ID = 17A
14
13
TC = 125°C
12
11
10
9
8
7
6
TC = 25°C
5
−25
25
75
125
175
TC − Case Temperature − °C
0
2
4
6
8
10
VGS − Gate to Source Voltage − V
G005
Figure 6. Threshold Voltage vs. Temperature
4
2.5
12
G006
Figure 7. On Resistance vs. Gate Voltage
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CSD16410Q5A
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SLPS205A – AUGUST 2009 – REVISED MAY 2010
TYPICAL MOSFET CHARACTERISTICS (continued)
(TA = 25°C unless otherwise stated)
1.4
100
ID = 17A
VGS = 10V
ISD − Source to Drain Current − A
Normalized On-State Resistance
1.6
1.2
1.0
0.8
0.6
0.4
0.2
0.0
−75
10
TC = 125°C
1
TC = 25°C
0.1
0.01
0.001
−25
25
75
125
175
TC − Case Temperature − °C
0.2
1.0
1.2
G008
100
I(AV) − Peak Avalanche Current − A
100
ID − Drain Current − A
0.8
Figure 9. Typical Diode Forward Voltage
1k
100ms
10
1ms
10ms
100ms
Area Limited
by RDS(on)
1s
0.1
0.01
0.01
0.6
VSD − Source to Drain Voltage − V
G007
Figure 8. On Resistance vs. Temperature
1
0.4
DC
Single Pulse
RqJA = 96°C/W (min Cu)
0.1
1
10
10
TC = 125°C
1
0.01
100
VDS − Drain To Source Voltage − V
TC = 25°C
0.1
1
10
t(AV) − Time in Avalanche − ms
G009
Figure 10. Maximum Safe Operating Area
100
G010
Figure 11. Single Pulse Unclamped Inductive Switching
80
ID − Drain Current − A
70
60
50
40
30
20
10
0
−50
−25
0
25
50
75
100
125
TC − Case Temperature − °C
150
175
G011
Figure 12. Maximum Drain Current vs. Temperature
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5
CSD16410Q5A
SLPS205A – AUGUST 2009 – REVISED MAY 2010
www.ti.com
MECHANICAL DATA
Q5A Package Dimensions
L
E2
H
K
7
D2
3
4
b
4
5
5
6
3
6
e
D1
7
2
2
8
8
1
1
q
L1
Top View
Bottom View
Side View
c
A
q
E1
E
Front View
M0135-01
DIM
MILLIMETERS
MIN
NOM
MAX
A
0.90
1.00
1.10
b
0.33
0.41
0.51
c
0.20
0.25
0.30
D1
4.80
4.90
5.00
D2
3.61
3.81
3.96
E
5.90
6.00
6.10
E1
5.70
5.75
5.80
E2
3.38
3.58
3.78
e
6
1.27 BSC
H
0.41
K
1.10
0.51
0.61
L
0.51
0.61
0.71
L1
0.06
0.13
0.20
q
0°
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12°
Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): CSD16410Q5A
CSD16410Q5A
www.ti.com
SLPS205A – AUGUST 2009 – REVISED MAY 2010
MILLIMETERS
INCHES
Recommended PCB Pattern
DIM
MIN
MAX
MIN
MAX
F1
F1
6.205
6.305
0.244
0.248
F2
4.46
4.56
0.176
0.18
F3
4.46
4.56
0.176
0.18
F4
0.65
0.7
0.026
0.028
F5
0.62
0.67
0.024
0.026
F6
0.63
0.68
0.025
0.027
F7
0.7
0.8
0.028
0.031
F8
0.65
0.7
0.026
0.028
F9
0.62
0.67
0.024
0.026
F7
F3
8
1
F2
F11
F5
F9
5
4
F6
F10
4.9
5
0.193
0.197
F11
4.46
4.56
0.176
0.18
F8
F4
F10
M0139-01
For recommended circuit layout for PCB designs, see application note SLPA005 – Reducing Ringing Through
PCB Layout Techniques.
K0
4.00 ±0.10 (See Note 1)
0.30 ±0.05
2.00 ±0.05
+0.10
–0.00
12.00 ±0.30
Ø 1.50
1.75 ±0.10
Q5A Tape and Reel Information
5.50 ±0.05
B0
R 0.30 MAX
A0
8.00 ±0.10
Ø 1.50 MIN
A0 = 6.50 ±0.10
B0 = 5.30 ±0.10
K0 = 1.40 ±0.10
R 0.30 TYP
M0138-01
Notes:
1. 10 sprocket hole pitch cumulative tolerance ±0.2
2. Camber not to exceed 1mm IN 100mm, noncumulative over 250mm
3. Material:black static dissipative polystyrene
4. All dimensions are in mm (unless otherwise specified)
5. A0 and B0 measured on a plane 0.3mm above the bottom of the pocket
6. MSL1 260°C (IR and Convection) PbF Reflow Compatible
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CSD16410Q5A
SLPS205A – AUGUST 2009 – REVISED MAY 2010
www.ti.com
REVISION HISTORY
Changes from Original (August 2009) to Revision A
•
8
Page
Deleted the Package Marking Information section ............................................................................................................... 7
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PACKAGE MATERIALS INFORMATION
www.ti.com
12-Aug-2010
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
CSD16410Q5A
Package Package Pins
Type Drawing
SON
DQJ
8
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
2500
330.2
12.4
Pack Materials-Page 1
6.5
B0
(mm)
K0
(mm)
P1
(mm)
5.3
1.4
8.0
W
Pin1
(mm) Quadrant
12.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
12-Aug-2010
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
CSD16410Q5A
SON
DQJ
8
2500
347.0
342.0
55.0
Pack Materials-Page 2
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