CSD17302Q5A www.ti.com SLPS216A – FEBRUARY 2010 – REVISED JULY 2010 30V, N-Channel NexFET™ Power MOSFETs Check for Samples: CSD17302Q5A FEATURES 1 • • • • • • • • 2 PRODUCT SUMMARY Optimized for 5V Gate Drive Ultralow Qg and Qgd Low Thermal Resistance Avalanche Rated Pb Free Terminal Plating RoHS Compliant Halogen Free SON 5-mm × 6-mm Plastic Package VDS Drain to Source Voltage 30 V Qg Gate Charge Total (4.5V) 5.4 nC Qgd Gate Charge Gate to Drain RDS(on) VGS(th) mΩ VGS = 4.5V 7.3 mΩ VGS = 8V 6.4 mΩ Threshold Voltage 1.2 Package Media CSD17302Q5A SON 5-mm × 6-mm Plastic Package 13-Inch Reel DESCRIPTION The NexFET™ power MOSFET has been designed to minimize losses in power conversion applications, and optimized for 5V gate drive applications. Top View 8 D S 2 7 D S 3 6 D G 4 5 D Qty Ship 2500 Tape and Reel ABSOLUTE MAXIMUM RATINGS TA = 25°C unless otherwise stated 1 V ORDERING INFORMATION Notebook Point of Load Point-of-Load Synchronous Buck in Networking, Telecom and Computing Systems S nC 9.5 Device APPLICATIONS • • Drain to Source On Resistance 1.2 VGS = 3V VALUE UNIT VDS Drain to Source Voltage 30 V VGS Gate to Source Voltage +10 / –8 V Continuous Drain Current, TC = 25°C 87 A Continuous Drain Current(1) 16 A IDM Pulsed Drain Current, TA = 25°C(2) 104 A PD Power Dissipation(1) 3 W TJ, TSTG Operating Junction and Storage Temperature Range –55 to 150 °C EAS Avalanche Energy, single pulse ID = 35A, L = 0.1mH, RG = 25Ω 61 mJ ID (1) Typical RqJA = 41°C/W on a 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu pad on a 0.06-inch (1.52-mm) thick FR4 PCB. (2) Pulse duration ≤300ms, duty cycle ≤2% D P0093-01 RDS(on) vs VGS GATE CHARGE 8 ID = 14A 18 VGS - Gate-to-Source Voltage - V RDS(on) - On-State Resistance - mΩ 20 16 T C = 125°C 14 12 10 8 6 T C = 25°C 4 6 5 4 3 2 2 1 0 0 0 1 2 3 4 5 6 7 8 VGS - Gate-to-Source Voltage - V 9 10 G006 ID = 14A VDS = 15V 7 0 1 2 3 4 5 6 7 Qg - Gate Charge - nC 8 9 10 G003 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NexFET is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2010, Texas Instruments Incorporated CSD17302Q5A SLPS216A – FEBRUARY 2010 – REVISED JULY 2010 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise stated) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Static Characteristics BVDSS Drain to Source Voltage VGS = 0V, ID = 250mA IDSS Drain to Source Leakage Current VGS = 0V, VDS = 24V IGSS Gate to Source Leakage Current VDS = 0V, VGS = +10 / –8V VGS(th) Gate to Source Threshold Voltage VDS = VGS, ID = 250mA RDS(on) gfs Drain to Source On Resistance Transconductance 30 0.9 V 1 mA 100 nA 1.2 1.7 VGS = 3V, ID = 14A 9.5 12..8 mΩ V VGS = 4.5V, ID = 14A 7.3 9 mΩ VGS = 8V, ID = 14A 6.4 7.9 mΩ VDS = 15V, ID = 14A 68 S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance 730 950 pF 390 510 Crss pF Reverse Transfer Capacitance 35 45 pF RG Series Gate Resistance 0.8 1.6 Ω Qg Gate Charge Total (4.5V) 5.4 7 nC Qgd Gate Charge Gate to Drain Qgs Gate Charge Gate to Source Qg(th) Gate Charge at Vth Qoss Output Charge td(on) Turn On Delay Time tr Rise Time td(off) Turn Off Delay Time tf Fall Time VGS = 0V, VDS = 15V, f = 1MHz VDS = 15V, ID = 14A VDS = 13V, VGS = 0V VDS = 15V, VGS = 4.5V, IDS = 14A, RG = 2Ω 1.2 nC 1.7 nC 0.9 nC 9.5 nC 5.2 ns 8.4 ns 10.6 ns 3.1 ns Diode Characteristics VSD Diode Forward Voltage Qrr Reverse Recovery Charge trr Reverse Recovery Time ISD = 14A, VGS = 0V 0.85 VDD= 13V, IF = 14A, di/dt = 300A/ms 15.4 1 nC V 17.5 ns THERMAL CHARACTERISTICS (TA = 25°C unless otherwise stated) PARAMETER RqJC Thermal Resistance Junction to Case (1) RqJA Thermal Resistance Junction to Ambient (1) (2) (1) (2) 2 MIN 2 TYP MAX UNIT 1.8 °C/W 51 °C/W 2 RqJC is determined with the device mounted on a 1-inch (6.45-cm ), 2-oz. (0.071-mm thick) Cu pad on a 1.5-inch × 1.5-inch (3.81-cm × 3.81-cm), 0.06-inch (1.52-mm) thick FR4 PCB. RqJC is specified by design, whereas RqJA is determined by the user’s board design. Device mounted on FR4 material with 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu. Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): CSD17302Q5A CSD17302Q5A www.ti.com SLPS216A – FEBRUARY 2010 – REVISED JULY 2010 GATE GATE Source N-Chan 5x6 QFN TTA MIN Rev3 N-Chan 5x6 QFN TTA MAX Rev3 Max RqJA = 51°C/W when mounted on 1 inch2 (6.45 cm2) of 2-oz. (0.071-mm thick) Cu. Source Max RqJA = 125°C/W when mounted on a minimum pad area of 2-oz. (0.071-mm thick) Cu. DRAIN DRAIN M0137-02 M0137-01 TYPICAL MOSFET CHARACTERISTICS (TA = 25°C unless otherwise stated) ZqJA - Normalized Thermal Impedance 10 1 0.5 0.3 0.1 Duty Cycle = t1/t2 0.1 0.05 P 0.02 0.01 0.01 t1 t2 Single Pulse Typical RqJA = 100°C/W (min Cu) TJ = P ´ ZqJA ´ RqJA 0.001 0.001 0.01 0.1 1 tp - Pulse Duration - s 10 100 1k G012 Figure 1. Transient Thermal Impedance Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): CSD17302Q5A 3 CSD17302Q5A SLPS216A – FEBRUARY 2010 – REVISED JULY 2010 www.ti.com TYPICAL MOSFET CHARACTERISTICS (continued) (TA = 25°C unless otherwise stated) TEXT ADDED FOR SPACING 50 45 45 40 IDS - Drain-to-Source Current - A IDS - Drain-to-Source Current - A TEXT ADDED FOR SPACING 50 VGS = 8V 35 30 VGS = 4.5V 25 20 VGS = 3.5V 15 VGS = 3V 10 VGS = 2.5V 5 VDS = 5V 40 35 30 T C = 125°C 25 T C = 25°C 20 15 T C = -55°C 10 5 0 0 0 0.2 0.4 0.6 0.8 1 1.2 VDS - Drain-to-Source Voltage - V 1.4 1 1.6 1.5 2 2.5 VGS - Gate-to-Source Voltage - V G001 Figure 2. Saturation Characteristics TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING ID = 14A VDS = 15V 7 f = 1MHz VGS = 0V 1.6 1.4 6 C - Capacitance - nF VGS - Gate-to-Source Voltage - V 1.8 5 4 3 2 1.2 Coss = Cds + Cgd 1 Ciss = Cgd + Cgs 0.8 0.6 0.4 1 Crss = Cgd 0.2 0 0 0 1 2 3 4 5 6 7 Qg - Gate Charge - nC 8 9 10 0 5 10 15 20 VDS - Drain-to-Source Voltage - V G003 Figure 4. Gate Charge TEXT ADDED FOR SPACING 30 G004 TEXT ADDED FOR SPACING 20 RDS(on) - On-State Resistance - mΩ ID = 250µA 1.4 1.2 1 0.8 0.6 0.4 0.2 0 -75 25 Figure 5. Capacitance 1.6 VGS(th) - Threshold Voltage - V G002 Figure 3. Transfer Characteristics 8 ID = 14A 18 16 T C = 125°C 14 12 10 8 6 T C = 25°C 4 2 0 -25 25 75 T C - Case Temperature - °C 125 175 0 1 G005 Figure 6. Threshold Voltage vs. Temperature 4 3 2 3 4 5 6 7 8 VGS - Gate-to-Source Voltage - V 9 10 G006 Figure 7. On-State Resistance vs. Gate-to-Source Voltage Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): CSD17302Q5A CSD17302Q5A www.ti.com SLPS216A – FEBRUARY 2010 – REVISED JULY 2010 TYPICAL MOSFET CHARACTERISTICS (continued) (TA = 25°C unless otherwise stated) TEXT ADDED FOR SPACING TEXT ADDED FOR SPACING 1.4 100 ID = 14A VGS = 4.5V ISD - Source-to-Drain Current - A Normalized On-State Resistance 1.6 1.2 1 0.8 0.6 0.4 0.2 -75 10 1 T C = 125°C 0.1 T C = 25°C 0.01 0.001 0.0001 -25 25 75 T C - Case Temperature - °C 125 175 0 0.2 G007 Figure 8. Normalized On-State Resistance vs. Temperature TEXT ADDED FOR SPACING G008 TEXT ADDED FOR SPACING I(AV) - Peak Avalanche Current - A IDS - Drain-to-Source Current - A 1.2 1k 100 10 1ms 10ms 100ms 11110 1 Area Limited by RDS(on) 0.01 0.01 1 Figure 9. Typical Diode Forward Voltage 1k 0.1 0.4 0.6 0.8 VSD - Source-to-Drain Voltage - V 1s Single Pulse Typical R θJA = 100°C/W (min Cu) DC 0.1 1 10 VDS - Drain-to-Source Voltage - V 100 100 T C = 25°C 10 T C = 125°C 1 0.01 G009 Figure 10. Maximum Safe Operating Area 0.1 1 10 t(AV) - Time in Avalanche - ms 100 G010 Figure 11. Single Pulse Unclamped Inductive Switching TEXT ADDED FOR SPACING IDS - Drain-to-Source Current - A 120 100 80 60 40 20 0 -50 -25 0 25 50 75 100 125 T C - Case Temperature - °C 150 175 G011 Figure 12. Maximum Drain Current vs. Temperature Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): CSD17302Q5A 5 CSD17302Q5A SLPS216A – FEBRUARY 2010 – REVISED JULY 2010 www.ti.com MECHANICAL DATA Q5A Package Dimensions L E2 H K 7 D2 3 4 b 4 5 5 6 3 6 e D1 7 2 2 8 8 1 1 q L1 Top View Bottom View Side View c A q E1 E Front View M0135-01 DIM 6 MILLIMETERS MIN NOM MAX A 0.90 1.00 1.10 b 0.33 0.41 0.51 c 0.20 0.25 0.34 D1 4.80 4.90 5.00 D2 3.61 3.81 4.02 E 5.90 6.00 6.10 E1 5.70 5.75 5.80 E2 3.38 3.58 3.78 e 1.17 1.27 1.37 H 0.41 0.56 0.71 K 1.10 L 0.51 0.61 0.71 L1 0.06 0.13 0.20 q 0° Submit Documentation Feedback 12° Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): CSD17302Q5A CSD17302Q5A www.ti.com SLPS216A – FEBRUARY 2010 – REVISED JULY 2010 DIM Recommended PCB Pattern F1 F7 F3 8 1 F2 F11 F5 F9 5 4 F6 MILLIMETERS INCHES MIN MAX MIN MAX F1 6.205 6.305 0.244 0.248 F2 4.46 4.56 0.176 0.18 F3 4.46 4.56 0.176 0.18 F4 0.65 0.7 0.026 0.028 F5 0.62 0.67 0.024 0.026 F6 0.63 0.68 0.025 0.027 F7 0.7 0.8 0.028 0.031 F8 0.65 0.7 0.026 0.028 F9 0.62 0.67 0.024 0.026 F10 4.9 5 0.193 0.197 F11 4.46 4.56 0.176 0.18 F8 F4 F10 M0139-01 For recommended circuit layout for PCB designs, see application note SLPA005 – Reducing Ringing Through PCB Layout Techniques. K0 4.00 ±0.10 (See Note 1) 0.30 ±0.05 2.00 ±0.05 +0.10 –0.00 12.00 ±0.30 Ø 1.50 1.75 ±0.10 Q5A Tape and Reel Information 5.50 ±0.05 B0 R 0.30 MAX A0 8.00 ±0.10 Ø 1.50 MIN A0 = 6.50 ±0.10 B0 = 5.30 ±0.10 K0 = 1.40 ±0.10 R 0.30 TYP M0138-01 Notes: 1. 10-sprocket hole-pitch cumulative tolerance ±0.2 2. Camber not to exceed 1mm in 100mm, noncumulative over 250mm 3. Material: black static-dissipative polystyrene 4. All dimensions are in mm (unless otherwise specified) 5. A0 and B0 measured on a plane 0.3mm above the bottom of the pocket Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): CSD17302Q5A 7 CSD17302Q5A SLPS216A – FEBRUARY 2010 – REVISED JULY 2010 www.ti.com REVISION HISTORY Changes from Original (February 2010) to Revision A Page • Updated the Q5A Package Dimensions table. DIM c MAX was 0.30, DIM D2 MAX was 3.96, DIM e MIN was blank MAX was blank, DIM H NOM was 0.51 MAX was 0.61 ....................................................................................................... 6 • Deleted Note 6 from the Q5A Tape and Reel Information - "MSL1 260°C (IR and convection) PbF reflow compatible" ........................................................................................................................................................................... 7 • Deleted the Package Marking Information section ............................................................................................................... 7 8 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): CSD17302Q5A PACKAGE MATERIALS INFORMATION www.ti.com 8-Sep-2011 TAPE AND REEL INFORMATION *All dimensions are nominal Device CSD17302Q5A Package Package Pins Type Drawing SON DQJ 8 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.0 12.4 Pack Materials-Page 1 6.3 B0 (mm) K0 (mm) P1 (mm) 5.3 1.2 8.0 W Pin1 (mm) Quadrant 12.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 8-Sep-2011 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CSD17302Q5A SON DQJ 8 2500 340.0 340.0 38.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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