OPA365-EP SLOS735 – AUGUST 2011 www.ti.com 50-MHz Low-Distortion High-CMRR Rail-to-Rail I/O, Single-Supply Operational Amplifier Check for Samples: OPA365-EP SUPPORTS DEFENSE, AEROSPACE, AND MEDICAL APPLICATIONS FEATURES 1 • • • • • • • Gain Bandwidth: 50 MHz Zero-Crossover Distortion Topology – Excellent THD+N: 0.0004% – CMRR: 96.5 dB (Min) – Rail-to-Rail Input and Output – Input 100 mV Beyond Supply Rail Low Noise: 4.5 nV/√Hz at 100 kHz Slew Rate: 25 V/µs Fast Settling: 0.3 µs to 0.01% Precision – Low Offset: 100 µV (Typical at 25°C) – Low Input Bias Current: 0.2 pA (Typical at 25°C) 2.2-V to 5.5-V Operation • • • • • • • Controlled Baseline One Assembly/Test Site One Fabrication Site Available in Military (–55°C/125°C), Temperature Range (1) Extended Product Life Cycle Extended Product-Change Notification Product Traceability DBV PACKAGE (TOP VIEW) (1) VOUT 1 V– 2 +IN 3 5 V+ 4 –IN Additional temperature ranges available - contact factory DESCRIPTION The OPA365 zero-crossover series, rail-to-rail, high-performance, CMOS operational amplifier is optimized for very low voltage, single-supply applications. Rail-to-rail input/output, low-noise (4.5 nV/√Hz) and high-speed operation (50-MHz gain bandwidth) make this device ideal for driving sampling analog-to-digital converters (ADCs). The OPA365 supports audio, signal conditioning, sensor amplification, defense, aerospace and medical applications. The OPA365 is also well-suited for cell phone power amplifier control loops. Special features include an excellent common-mode rejection ratio (CMRR), no input stage crossover distortion, high input impedance, and rail-to-rail input and output swing. The input common-mode range includes both the negative and positive supplies. The output voltage swing is within 10mV of the rails. The OPA365 is available in the SOT23-5 package and is specified for operation from −55°C to 125°C. R2 2kΩ C2 2.2pF V− V− U1 U2 SD1 BAT17 OPA365 VOUT OPA365 R1 7.5Ω VIN V+ V+ C1 10nF Figure 1. Fast Settling Peak Detector 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2011, Texas Instruments Incorporated OPA365-EP SLOS735 – AUGUST 2011 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION (1) TA PACKAGE ORDERABLE PART NUMBER TOP-SIDE MARKING –55°C to 125°C SOT23 – DBV OPA365AMDBVTEP OUNM (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. ABSOLUTE MAXIMUM RATINGS (1) VCC Supply voltage VI Signal input terminals, voltage (2) II Signal input terminals, current (2) ±10 mA tOSC Output short-circuit duration (3) (4) Continuous TOP Operating temperature −55°C to 125°C Tstg Storage temperature −65°C to 150°C TJ Junction temperature 150°C ESD Electrostatic discharge rating (1) (2) (3) (4) 2 5.5 V (V−) − 0.5V to (V+) + 0.5 V Human Body Model 4000V Charged Device Model 1000V Machine Model 200V Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5V beyond the supply rails should be current limited to 10mA or less. Short-circuit to ground, one amplifier per package Continuous output current greater than 20 mA for extended periods may affect product reliability. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): OPA365-EP OPA365-EP SLOS735 – AUGUST 2011 www.ti.com ELECTRICAL CHARACTERISTICS VS = 2.2 V to 5.5 V, RL = 10 kΩ connected to VS/2, VCM = VS/2, and VOUT = VS/2 (unless otherwise noted) PARAMETER TA (1) TEST CONDITIONS MIN TYP MAX 100 200 UNIT OFFSET VOLTAGE VOS Input offset voltage dVOS/ dT Input offset voltage drift PSRR Input offset voltage vs power supply 25°C Full range VS = +2.2V to +5.5V µV 450 µV/°C Full range 3 Full range 10 100 µV/V ±0.2 ±10 pA INPUT BIAS CURRENT IB Input bias current IOS Input offset current 25°C Full range See Typical Characteristics ±0.2 25°C ±10 pA NOISE µVPP en Input voltage noise f = 0.1Hz to 10Hz 25°C 5 en Input voltage noise density f = 100kHz 25°C 4.5 nV/√Hz in Input current noise density f = 10kHz 25°C 4 fA/√Hz INPUT VOLTAGE RANGE VCM Common-mode voltage range CMRR Common-mode rejection ratio (V-) – 0.1V ≤ VCM ≤ (V+) + 0.1V Full range (V-) – 0.1 Full range 96.5 (V+) + 0.1 V 120 dB INPUT CAPACITANCE Differential 25°C 6 pF Common-mode 25°C 2 pF OPEN-LOOP GAIN AOL Open-loop voltage gain RL = 10kΩ, 100mV < VO < (V+) – 100mV Full range 96.5 120 RL = 600Ω, 200mV < VO < (V+) – 200mV 25°C 100 120 dB RL = 600Ω, 200mV < VO < (V+) – 200mV Full range 91 FREQUENCY RESPONSE GBW Gain-bandwidth product SR Slew rate tS 25°C 50 MHz VS = 5V, G = +1 25°C 25 V/µs 0.1%, VS = 5V, 4V Step, G = +1 25°C 200 0.01%, VS = 5V, 4V Step, G = +1 25°C 300 Overload recovery time VS = 5V, VIN x Gain > VS 25°C < 0.1 µs Total harmonic distortion + noise (2) VS = 5V, RL = 600Ω, VO = 4VPP, G = +1, f = 1kHz 25°C 0.0004 % Voltage output swing from rail RL = 10kΩ, VS = 5.5V Settling time THD+N ns OUTPUT Full range ISC Short-circuit current (3) 25°C CL Capacitive load drive 25°C Open-loop output impedance f = 1MHz, IO = 0 10 20 ±65 mV mA See Typical Characteristics 25°C Ω 30 POWER SUPPLY VS IQ (1) (2) (3) Specified voltage range Quiescent current per amplifier Full range IO = 0 2.2 25°C 5.5 4.6 Full range 5 5.5 V mA Full range TA = −55°C to +125°C Third-order filter, bandwidth 80kHz at −3dB. Continuous output current greater than 20 mA for extended periods may affect product reliability. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): OPA365-EP 3 OPA365-EP SLOS735 – AUGUST 2011 www.ti.com ELECTRICAL CHARACTERISTICS (continued) VS = 2.2 V to 5.5 V, RL = 10 kΩ connected to VS/2, VCM = VS/2, and VOUT = VS/2 (unless otherwise noted) PARAMETER TEST CONDITIONS TA (1) MIN TYP MAX UNIT TEMPERATURE RANGE –55 Specified range θJA 4 Thermal resistance 125 200 Submit Documentation Feedback °C °C/W Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): OPA365-EP OPA365-EP SLOS735 – AUGUST 2011 www.ti.com TYPICAL CHARACTERISTICS TA = 25°C, VS = 5 V, CL = 0 pF (unless otherwise noted) POWER SUPPLY AND COMMON−MODE REJECTION RATIO vs FREQUENCY OPEN−LOOP GAIN/PHASE vs FREQUENCY 140 0 140 CMRR 120 Phase 80 −90 60 40 Gain 20 −135 PSRR, CMRR (dB) −45 100 Phase (°) Voltage Gain (dB) 120 0 100 80 PSRR 60 40 20 −20 10 100 1k 10k 100k 1M 10M −180 100M 0 10 Frequency (Hz) 100 1k 10k 100k 1M 10M 100M Frequency (Hz) OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION OFFSET VOLTAGE PRODUCTION DISTRIBUTION −200 −180 −160 −140 −120 −100 −80 −60 −40 −20 0 20 40 60 80 100 120 140 160 180 200 Population Population VS = 5.5V -1 -0.5 0 0.5 1 1.5 2 Offset Voltage Drift (µV/°C) Offset Voltage (µV) INPUT BIAS CURRENT vs COMMON−MODE VOLTAGE INPUT BIAS CURRENT vs TEMPERATURE 500 1000 90 400 70 300 60 IB (pA) Input Bias (pA) 80 50 40 200 VCM Specified Range 30 100 20 10 0 –50 –25 0 25 50 75 100 125 0 −25 −0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 VCM (V) Temperature (°C) Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): OPA365-EP 5 OPA365-EP SLOS735 – AUGUST 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) TA = 25°C, VS = 5 V, CL = 0 pF (unless otherwise noted) S SHORT−CIRCUIT CURRENT vs TEMPERATURE OPA365 OUTPUT VOLTAGE vs OUTPUT CURRENT 3 Output Voltage (V) 2 1 0 +125°C Short−Circuit Current (mA) VS = ±1.1V VS = ±2.75V −55°C −40°C +25°C +25°C −40°C −55°C +125°C –1 –2 –3 0 10 20 30 40 50 60 70 80 90 70 60 50 40 30 20 10 0 −10 −20 −30 −40 −50 −60 −70 −80 VS = ±2.75V −50 100 −25 0 25 75 125 100 QUIESCENT CURRENT vs TEMPERATURE QUIESCENT CURRENT vs SUPPLY VOLTAGE 4.75 4.80 Quiescent Current (mA) Quiescent Current (mA) 50 Temperature (°C) Output Current (mA) 4.50 4.25 4.00 4.74 4.68 4.62 4.56 4.50 3.75 2.2 2.5 3.0 3.5 4.0 4.5 5.0 –50 5.5 –25 0 Supply Voltage (V) 25 50 75 100 125 Temperature (°C) 0.1Hz to 10Hz INPUT VOLTAGE NOISE TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 0.01 2µV/div THD+N (%) G = 10, RL = 600Ω VO = 1VRMS 0.001 VO = 1.448VRMS VO = 1VRMS G = +1, RL = 600Ω 0.0001 1s/div 10 100 1k 10k 20k Frequency (Hz) 6 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): OPA365-EP OPA365-EP SLOS735 – AUGUST 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) TA = 25°C, VS = 5 V, CL = 0 pF (unless otherwise noted) INPUT VOLTAGE NOISE SPECTRAL DENSITY OVERSHOOT vs CAPACITIVE LOAD 60 50 100 Overshoot (%) Voltage Noise (nV/√Hz) 1k 10 G = +1 40 G = −1 30 G = +10 20 10 G = −10 1 0 10 100 1k 10k 100k 0 100 Frequency (Hz) Output Voltage (1V/div) LARGE−SIGNAL STEP RESPONSE G=1 RL = 10kΩ VS = ±2.5 Time (50ns/div) Time (250ns/div) SMALL−SIGNAL STEP RESPONSE LARGE−SIGNAL STEP RESPONSE G=1 RL = 600Ω VS = ±2.5 Output Voltage (1V/div) Output Voltage (50mV/div) Output Voltage (50mV/div) SMALL−SIGNAL STEP RESPONSE G=1 RL = 10kΩ VS = ±2.5 1k Capacitive Load (pF) G=1 RL = 600Ω VS = ±2.5 Time (50ns/div) Time (250ns/div) Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): OPA365-EP 7 OPA365-EP SLOS735 – AUGUST 2011 www.ti.com APPLICATION INFORMATION Operating Characteristics The OPA365 amplifier parameters are fully specified from 2.2 V to 5.5 V. Many of the specifications apply from −55°C to 125°C. Parameters that can exhibit significant variance with regard to operating voltage or temperature are presented in Typical Characteristics. General Layout Guidelines The OPA365 is a wideband amplifier. To realize the full operational performance of the device, good high-frequency printed circuit board (PCB) layout practices are required. Low-loss 0.1-µF bypass capacitors must be connected between each supply pin and ground as close to the device as possible. The bypass capacitor traces should be designed for minimum inductance. Basic Amplifier Configurations As with other single-supply op amps, the OPA365 may be operated with either a single supply or dual supplies (see Figure 2). A typical dual-supply connection is shown in Figure 2, which is accompanied by a single-supply connection. The OPA365 is configured as a basic inverting amplifier with a gain of −10 V/V. The dual-supply connection has an output voltage centered on zero, while the single−supply connection has an output centered on the common-mode voltage VCM. For the circuit shown, this voltage is 1.5 V, but may be any value within the common-mode input voltage range. The OPA365 VCM range extends 100 mV beyond the power-supply rails. R2 10kΩ R2 10kΩ +3V +1.5V R1 1kΩ C1 100nF R1 1kΩ V+ OPA365 VIN V+ OPA365 VOUT VIN V− C1 100nF C2 100nF VOUT V− VCM =1.5V −1.5V a) Dual Supply Connection b) Single Supply Connection Figure 2. Basic Circuit Connections 8 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): OPA365-EP OPA365-EP SLOS735 – AUGUST 2011 www.ti.com Figure 3 shows a single-supply, electret microphone application where VCM is provided by a resistive divider. The divider also provides the bias voltage for the electret element. 49kΩ Clean 3.3V Supply 3.3V 4kΩ VOUT OPA365 Electret Microphone 6kΩ 5kΩ 1µF Figure 3. Microphone Preamplifier Input and ESD Protection The OPA365 incorporates internal electrostatic discharge (ESD) protection circuits on all pins. In the case of input and output pins, this protection primarily consists of current steering diodes connected between the input and power-supply pins. These ESD protection diodes also provide in-circuit, input overdrive protection, provided that the current is limited to 10 mA as stated in the Absolute Maximum Ratings. Figure 4 shows how a series input resistor may be added to the driven input to limit the input current. The added resistor contributes thermal noise at the amplifier input and its value should be kept to the minimum in noise-sensitive applications. V+ I OVERLOAD 10mA max OPA365 VOUT VIN 5kΩ Figure 4. Input Current Protection Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): OPA365-EP 9 OPA365-EP SLOS735 – AUGUST 2011 www.ti.com Rail-to-Rail Input The OPA365 features true rail-to-rail input operation, with supply voltages as low as ±1.1 V (2.2 V). A unique zero-crossover input topology eliminates the input offset transition region typical of many rail-to-rail, complementary stage operational amplifiers. This topology also allows the OPA365 to provide superior common-mode performance over the entire input range, which extends 100 mV beyond both power-supply rails, as shown in Figure 5. When driving ADCs, the highly linear VCM range of the OPA365 assures that the op amp/ADC system linearity performance is not compromised. OFFSET VOLTAGE vs COMMON MODE VOLTAGE 200 VS = ±2.75V 150 100 VOS (µV) OPA365 50 0 −50 −100 Competitors −150 −200 −3 −1 −2 0 1 2 3 Common Mode Voltage (V) Figure 5. OPA365 has Linear Offset Over the Entire Common-Mode Range A simplified schematic illustrating the rail-to-rail input circuitry is shown in Figure 6. VS Regulated Charge Pump VO U T = VC C +1.8V VC C + 1. 8 V IB IA S Patent Pending Very Low Ripple Topology IB IA S IBI AS VIN − VO U T VI N + IB IA S Figure 6. Simplified Schematic 10 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): OPA365-EP OPA365-EP SLOS735 – AUGUST 2011 www.ti.com Capacitive Loads The OPA365 may be used in applications where driving a capacitive load is required. As with all op amps, there may be specific instances where the OPA365 can become unstable, leading to oscillation. The particular op amp circuit configuration, layout, gain and output loading are some of the factors to consider when establishing whether an amplifier will be stable in operation. An op amp in the unity-gain (1 V/V) buffer configuration and driving a capacitive load exhibits a greater tendency to be unstable than an amplifier operated at a higher noise gain. The capacitive load, in conjunction with the op amp output resistance, creates a pole within the feedback loop that degrades the phase margin. The degradation of the phase margin increases as the capacitive loading increases. When operating in the unity-gain configuration, the OPA365 remains stable with a pure capacitive load up to approximately 1 nF. The equivalent series resistance (ESR) of some very large capacitors (CL > 1 µF) is sufficient to alter the phase characteristics in the feedback loop such that the amplifier remains stable. Increasing the amplifier closed-loop gain allows the amplifier to drive increasingly larger capacitance. This increased capability is evident when observing the overshoot response of the amplifier at higher voltage gains. See the typical characteristic graph, Small-Signal Overshoot vs. Capacitive Load. One technique for increasing the capacitive load drive capability of the amplifier operating in unity gain is to insert a small resistor, typically 10 Ω to 20 Ω, in series with the output; see Figure 7. This resistor significantly reduces the overshoot and ringing associated with large capacitive loads. A possible problem with this technique is that a voltage divider is created with the added series resistor and any resistor connected in parallel with the capacitive load. The voltage divider introduces a gain error at the output that reduces the output swing. The error contributed by the voltage divider may be insignificant. For instance, with a load resistance, RL = 10 kΩ, and RS = 20 Ω, the gain error is only about 0.2%. However, when RL is decreased to 600 Ω, which the OPA365 is able to drive, the error increases to 7.5%. V+ RS VOUT OPA365 VIN 10Ω to 20Ω RL CL Figure 7. Improving Capacitive Load Drive Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): OPA365-EP 11 OPA365-EP SLOS735 – AUGUST 2011 www.ti.com Achieving an Output Level of Zero Volts (0V) Certain single-supply applications require the op amp output to swing from 0 V to a positive full-scale voltage and have high accuracy. An example is an op amp employed to drive a single-supply ADC having an input range from 0 V to 5 V. Rail-to-rail output amplifiers with very light output loading may achieve an output level within millivolts of 0 V (or +VS at the high end), but not 0 V. Furthermore, the deviation from 0V only becomes greater as the load current required increases. This increased deviation is a result of limitations of the CMOS output stage. When a pulldown resistor is connected from the amplifier output to a negative voltage source, the OPA365 can achieve an output level of 0 V, and even a few millivolts below 0 V. Below this limit, nonlinearity and limiting conditions become evident. Figure 8 illustrates a circuit using this technique. V+=+5V OPA365 VOUT VIN 500µA Op Amp Negative Supply Grounded RP = 10 kΩ −V = −5V (Additional Negative Supply) Figure 8. Swing-to-Ground A pulldown current of approximately 500 µA is required when OPA365 is connected as a unity-gain buffer. A practical termination voltage (VNEG) is −5 V, but other convenient negative voltages also may be used. The pulldown resistor RL is calculated from RL = [(VO −VNEG)/(500 µA)]. Using a minimum output voltage (VO) of 0 V, RL = [0 V−(−5 V)]/(500 µA)] = 10 kΩ. Keep in mind that lower termination voltages result in smaller pulldown resistors that load the output during positive output voltage excursions. Note that this technique does not work with all op amps and should only be applied to op amps such as the OPA365 that have been specifically designed to operate in this manner. Also, operating the OPA365 output at 0 V changes the output stage operating conditions, resulting in somewhat lower open-loop gain and bandwidth. Keep these precautions in mind when driving a capacitive load because these conditions can affect circuit transient response and stability. 12 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): OPA365-EP OPA365-EP SLOS735 – AUGUST 2011 www.ti.com Active Filtering The OPA365 is well-suited for active filter applications requiring a wide bandwidth, fast slew rate, low-noise, single-supply operational amplifier. Figure 9 shows a 500-kHz, 2nd-order, low-pass filter utilizing the multiple-feedback (MFB) topology. The components have been selected to provide a maximally-flat Butterworth response. Beyond the cutoff frequency, roll-off is −40 dB/dec. The Butterworth response is ideal for applications requiring predictable gain characteristics such as the anti-aliasing filter used ahead of an ADC. R3 549Ω C2 150pF V+ R1 549Ω R2 1.24kΩ VIN OPA365 VOUT C1 1nF V− Figure 9. Second-Order Butterworth 500kHz Low-Pass Filter One point to observe when considering the MFB filter is that the output is inverted, relative to the input. If this inversion is not required, or not desired, a noninverting output can be achieved through one of these options: 1) adding an inverting amplifier; 2) adding an additional 2nd-order MFB stage; or 3) using a noninverting filter topology such as the Sallen-Key (shown in Figure 10). MFB and Sallen-Key, low-pass and high-pass filter synthesis is quickly accomplished using TI's FilterPro program. This software is available as a free download at www.ti.com. C3 220pF R2 19.5kΩ R1 1.8kΩ R3 150kΩ VIN = 1VRMS C1 3.3nF C2 47pF OPA365 VOUT Figure 10. Configured as a 3-Pole, 20kHz, Sallen-Key Filter Driving an Analog-to-Digital Converter Very wide common-mode input range, rail-to-rail input and output voltage capability and high speed make the OPA365 an ideal driver for modern ADCs. Also, because it is free of the input offset transition characteristics inherent to some rail-to-rail CMOS op amps, the OPA365 provides low THD and excellent linearity throughout the input voltage swing range. Figure 11 shows the OPA365 driving an ADS8326, 16-bit, 250kSPS converter. The amplifier is connected as a unity-gain, noninverting buffer and has an output swing to 0 V, making it directly compatible with the ADC minus full-scale input level. The 0-V level is achieved by powering the OPA365 V−pin with a small negative voltage established by the diode forward voltage drop. A small, signal-switching diode or Schottky diode provides a suitable negative supply voltage of −0.3 V to −0.7 V. The supply rail-to-rail is equal to V+, plus the small negative voltage. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): OPA365-EP 13 OPA365-EP SLOS735 – AUGUST 2011 www.ti.com +5V C1 100nF +5V R1(1) 100Ω V+ +IN OPA365 C3(1) 1nF V− VIN 0 to 4.096V −IN ADS8326 16Bit 250kSPS REF N I +5V Optional(2) R2 500Ω SD1 BAS40 −5V C2 100nF REF3240 4.096V C4 100nF Figure 11. Driving the ADS8326 One method for driving an ADC that negates the need for an output swing down to 0 V uses a slightly compressed ADC full-scale input range (FSR). For example, the 16-bit ADS8361 (shown in Figure 12) has a maximum FSR of 0 V to 5 V, when powered by a 5-V supply and VREF of 2.5 V. The idea is to match the ADC input range with the op amp full linear output swing range; for example, an output range of 0.1 V to 4.9 V. The reference output from the ADS8361 ADC is divided down from 2.5 V to 2.4 V using a resistive divider. The ADC FSR then becomes 4.8VPP centered on a common-mode voltage of 2.5 V. Current from the ADS8361 reference pin is limited to about ±10 µA. Here, 5 µA was used to bias the divider. The resistors must be precise to maintain the ADC gain accuracy. An additional benefit of this method is the elimination of the negative supply voltage; it requires no additional power-supply current. R2 10kΩ +5V R1 10kΩ C1 100nF V+ +5V R3(A) 100Ω −IN OPA365 VIN 0.1V to 4.9V V− C2(A) 1nF +IN ADS8361 16Bit 100kSPS REF OUT REF IN +2.5V R4 20kΩ +2.4V R5 480kΩ C3 1µF Figure 12. Driving the ADS8361 14 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): OPA365-EP OPA365-EP SLOS735 – AUGUST 2011 www.ti.com An RC network, consisting of R1 and C1, is included between the op amp and the ADS8361. It not only provides a high-frequency filter function, but more importantly serves as a charge reservoir used for charging the converter internal hold capacitance. This capability assures that the op amp output linearity is maintained as the ADC input characteristics change throughout the conversion cycle. Depending on the particular application and ADC, some optimization of the R1 and C1 values may be required for best transient performance. Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Link(s): OPA365-EP 15 PACKAGE OPTION ADDENDUM www.ti.com 26-Sep-2011 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp OPA365AMDBVTEP ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM V62/11610-01XE ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM (3) Samples (Requires Login) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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