bq27530-G1 www.ti.com SLUSAL5 – DECEMBER 2012 Battery Management Unit Impedance Track™ Fuel Gauge for Use With the bq2416x Charger Controller Check for Samples: bq27530-G1 FEATURES 1 • 23 • • • • Battery Fuel Gauge and Charger Controller for 1-Series Li-Ion Applications Resides on System Main Board Battery Fuel Gauge Based on Patented Impedance Track™ Technology – Models the Battery Discharge Curve for Accurate Time-to-Empty Predictions – Automatically Adjusts for Battery Aging, Battery Self-Discharge, and Temperature/Rate Inefficiencies – Low-Value Sense Resistor (5 mΩ to 20 mΩ) Battery Charger Controller with customizable charge profiles – Configurable Charge Voltage and Current based on Temperature – Optional State of Health (SoH) and Multilevel based charge profiles Host Free Autonomous Battery Management System – Reduced software overhead allows for easy portability across platforms and shorter OEM design cycles – Higher safety and security • • • • • Run Time Improvements – Longer battery runtime leveraging Impedance Track technoloogy – Tighter accuracy controls for charger termination – Improved recharged thresholds Intelligent Charging - Customized and adaptive charging profiles – Charger Control based on SoH – Temperature Level Charging (TLC) Battery Charger Controller for bq2416x Single Cell Switchmode Battery Charger – Stand-Alone Charging Solution 400-kHz I2C™ Interface for Connection to System Microcontroller Port In a 15-Pin NanoFree™ (CSP) Packaging APPLICATIONS • • • • Smartphones, Feature phones and Tablets Digital Still and Video Cameras Handheld Terminals MP3 or Multimedia Players DESCRIPTION The Texas Instruments bq27530-G1 system-side Li-Ion Battery Management Unit is a microcontroller peripheral that provides Impedance Track™ fuel gauging and charging control for single-cell Li-Ion battery packs. The device requires little system microcontroller firmware development. Together with bq2416x Single Cell Switchmode Charger, the bq27530-G1 manages an embedded battery (non-removable) or a removable battery pack. The bq27530-G1 uses the patented Impedance Track™ algorithm for fuel gauging, and provides information such as remaining battery capacity (mAh), state-of-charge (%), run-time to empty (min), battery voltage (mV), temperature (°C) and state of health (%). Battery fuel gauging with the bq27530-G1 requires only PACK+ (P+), PACK– (P–), and Thermistor (T) connections to a removable battery pack or embedded battery circuit. The CSP option is a 15-ball package in the dimensions of 2,61 mm × 1,96 mm with 0,5 mm lead pitch. It is ideal for space constrained applications. 1 2 3 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Impedance Track, NanoFree are trademarks of Texas Instruments. I2C is a trademark of NXP B.V. Corp Netherlands. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2012, Texas Instruments Incorporated bq27530-G1 SLUSAL5 – DECEMBER 2012 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. TYPICAL APPLICATION AC Adapter or Wireless Power SW IN SYSTEM LOAD SYS BQ2416x VBUS USB D+ D- BAT PGND I2C Single Cell Li-Ion Battery Pack Voltage Sense I2C Temp Sense Application Processor P+ T PROTECTION IC BQ27530-G1 SOCINT P- FETs Current Sense 2 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links :bq27530-G1 bq27530-G1 www.ti.com SLUSAL5 – DECEMBER 2012 DEVICE INFORMATION AVAILABLE OPTIONS PART NUMBER bq27530YZFR-G1 bq27530YZFT-G1 (1) (2) FIRMWARE VERSION (1) PACKAGE (2) TA COMMUNICATION FORMAT 1.04 (0x0104) CSP-15 –40°C to 85°C I2C TAPE and REEL QUANTITY 3000 250 Refer to the FW_VERSION subcommand to confirm the firmware version. For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. THERMAL INFORMATION THERMAL METRIC (1) bq27530-G1 YZF(15 PINS) θJA Junction-to-ambient thermal resistance 70 θJCtop Junction-to-case (top) thermal resistance 17 θJB Junction-to-board thermal resistance 20 ψJT Junction-to-top characterization parameter 1 ψJB Junction-to-board characterization parameter 18 θJCbot Junction-to-case (bottom) thermal resistance n/a (1) UNITS °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links :bq27530-G1 3 bq27530-G1 SLUSAL5 – DECEMBER 2012 www.ti.com PIN ASSIGNMENT AND PACKAGE DIMENSIONS (TOP VIEW) B3 C3 D3 E3 E3 D3 C3 B3 A3 A2 B2 C2 D2 E2 E2 D2 C2 B2 A2 A1 B1 C1 D1 E1 E1 D1 C1 B1 A1 A3 E (BOTTOM VIEW) xx xx Pin A1 Index Area D DIM MIN TYP MAX D 2580 2610 2640 E 1926 1956 1986 UNITS m Table 1. PIN FUNCTIONS PIN NAME NO. TYPE (1) DESCRIPTION SRP A1 IA Analog input pin connected to the internal coulomb counter where SRP is nearest the PACK– connection. Connect to 5-mΩ to 20-mΩ sense resistor. SRN B1 IA Analog input pin connected to the internal coulomb counter where SRN is nearest the Vss connection. Connect to 5mΩ to 20-mΩ sense resistor. VSS C1, C2 P Device ground VCC D1 P Regulator output and bq27530-G1 power. Decouple with 1μF ceramic capacitor to Vss. REGIN E1 P Regulator input. Decouple with 0.1μF ceramic capacitor to Vss. SOC_INT A2 I/O SOC state interrupts output. Generates a pulse as described in bq27530-G1 Technical Reference Manual. Open drain output. BSCL B2 O Battery Charger clock output line for chipset communication. Push-pull output. Note: CE has an internal ESD protection diode connected to REGIN. Recommend maintaining VCE ≤ VREGIN under all conditions. CE D2 I Chip Enable. Internal LDO is disconnected from REGIN when driven low. BAT E2 I Cell-voltage measurement input. ADC input. Recommend 4.8V maximum for conversion accuracy. SCL A3 I Slave I2C serial communications clock input line for communication with system (Master). Open-drain I/O. Use with 10kΩ pull-up resistor (typical). SDA B3 I/O Slave I2C serial communications data line for communication with system (Master). Open-drain I/O. Use with 10kΩ pull-up resistor (typical). BSDA C3 I/O Battery Charger data line for chipset communication. Push-pull output. TS D3 IA Pack thermistor voltage sense (use 103AT-type thermistor). ADC input. BI/TOUT E3 I/O Battery-insertion detection input. Power pin for pack thermistor network. Thermistor-multiplexer control pin. Use with pull-up resistor >1MΩ (1.8 MΩ typical). (1) 4 I/O = Digital input/output, IA = Analog input, P = Power connection Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links :bq27530-G1 bq27530-G1 www.ti.com SLUSAL5 – DECEMBER 2012 ELECTRICAL SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) PARAMETER VREGIN VALUE Regulator input range –0.3 to 6.0 VCE CE input pin VCC UNIT –0.3 to 5.5 V (2) V –0.3 to VREGIN + 0.3 V Supply voltage range –0.3 to 2.75 V VIOD Open-drain I/O pins (SDA, SCL, SOC_INT) –0.3 to 5.5 V VBAT BAT input pin –0.3 to 5.5 V –0.3 to 6.0 VI Input voltage range to all other pins (BI/TOUT, TS, SRP, SRN, BSDA, BSCL) V –0.3 to VCC + 0.3 Human-body model (HBM), BAT pin ESD (2) V 1.5 Human-body model (HBM), all other pins kV 2 TA Operating free-air temperature range –40 to 85 °C Tstg Storage temperature range –65 to 150 °C (1) (2) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Condition not to exceed 100 hours at 25 °C lifetime. RECOMMENDED OPERATING CONDITIONS TA = -40°C to 85°C, VREGIN = VBAT = 3.6V (unless otherwise noted) PARAMETER VREGIN Supply voltage CREGIN External input capacitor for internal LDO between REGIN and VSS CLDO25 External output capacitor for internal LDO between VCC and VSS tPUCD Power-up communication delay TEST CONDITIONS No operating restrictions No FLASH writes Nominal capacitor values specified. Recommend a 5% ceramic X5R type capacitor located close to the device. MIN TYP MAX 2.8 4.5 2.45 2.8 0.47 UNIT V 0.1 μF 1 μF 250 ms SUPPLY CURRENT TA = 25°C and VREGIN = VBAT = 3.6V (unless otherwise noted) PARAMETER ICC (1) ISLP+ (1) TEST CONDITIONS TYP MAX UNIT Normal operating-mode current 118 μA Sleep+ operating mode current Fuel gauge in SLEEP+ mode. ILOAD < Sleep Current 62 μA 23 μA 8 μA ISLP (1) Low-power storage-mode current Fuel gauge in SLEEP mode. ILOAD < Sleep Current IHIB (1) Hibernate operating-mode current Fuel gauge in HIBERNATE mode. ILOAD < Hibernate Current (1) MIN Fuel gauge in NORMAL mode. ILOAD > Sleep Current Specified by design. Not production tested. Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links :bq27530-G1 5 bq27530-G1 SLUSAL5 – DECEMBER 2012 www.ti.com DIGITAL INPUT AND OUTPUT DC CHARACTERISTICS TA = –40°C to 85°C, typical values at TA = 25°C and VREGIN = 3.6 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN VOL Output voltage, low (SCL, SDA, SOC_INT, BSDA, BSCL) IOL = 3 mA VOH(PP) Output voltage, high (BSDA, BSCL) IOH = –1 mA VCC – 0.5 VOH(OD) Output voltage, high (SDA, SCL, SOC_INT) External pullup resistor connected to VCC VCC – 0.5 Input voltage, low (SDA, SCL) VIL Input voltage, low (BI/TOUT) BAT INSERT CHECK MODE active Input voltage, high (SDA, SCL) VIH Input voltage, high (BI/TOUT) VIL(CE) Input voltage, low (CE) VIH(CE) Input voltage, high (CE) Ilkg (1) (1) TYP MAX 0.4 UNIT V V –0.3 0.6 –0.3 0.6 V 1.2 BAT INSERT CHECK MODE active VREGIN = 2.8 to 4.5V VCC + 0.3 1.2 0.8 2.65 Input leakage current (I/O pins) 0.3 V V μA Specified by design. Not production tested. POWER-ON RESET TA = –40°C to 85°C, typical values at TA = 25°C and VREGIN = 3.6 V (unless otherwise noted) PARAMETER VIT+ Positive-going battery voltage input at VCC VHYS Power-on reset hysteresis TEST CONDITIONS MIN TYP MAX UNIT 2.05 2.15 2.20 V 45 115 185 mV UNIT 2.5V LDO REGULATOR TA = –40°C to 85°C, CLDO25 = 1μF, VREGIN = 3.6V (unless otherwise noted) PARAMETER VREG25 Regulator output voltage (VCC) MIN NOM MAX 2.8V ≤ VREGIN ≤ 4.5V, IOUT ≤ 16mA TEST CONDITION 2.3 2.5 2.6 2.45V ≤ VREGIN < 2.8V (low battery), IOUT ≤ 3mA 2.3 V V INTERNAL CLOCK OSCILLATORS TA = –40°C to 85°C, 2.4 V < VCC < 2.6 V; typical values at TA = 25°C and VCC = 2.5 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT fOSC High Frequency Oscillator 2.097 MHz fLOSC Low Frequency Oscillator 32.768 kHz 6 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links :bq27530-G1 bq27530-G1 www.ti.com SLUSAL5 – DECEMBER 2012 ADC (TEMPERATURE AND CELL MEASUREMENT) CHARACTERISTICS TA = –40°C to 85°C, 2.4 V < VCC < 2.6 V; typical values at TA = 25°C and VCC = 2.5 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VADC1 Input voltage range (TS) VSS – 0.125 2 V VADC2 Input voltage range (BAT) VSS – 0.125 5 V VIN(ADC) Input voltage range GTEMP Internal temperature sensor voltage gain tADC_CONV Conversion time 0.05 Resolution VOS(ADC) (1) Effective input resistance (TS) ZADC2 (1) Effective input resistance (BAT) Ilkg(ADC) (1) 125 ms 15 bits 1 bq27530-G1 not measuring cell voltage mV 8 MΩ 8 MΩ bq27530-G1 measuring cell voltage (1) V mV/°C 14 Input offset ZADC1 1 –2 100 kΩ Input leakage current μA 0.3 Specified by design. Not tested in production. INTEGRATING ADC (COULOMB COUNTER) CHARACTERISTICS TA = –40°C to 85°C, 2.4 V < VCC < 2.6 V; typical values at TA = 25°C and VCC = 2.5 V (unless otherwise noted) PARAMETER TEST CONDITIONS VSR Input voltage range, V(SRP) and V(SRN) VSR = V(SRP) – V(SRN) tSR_CONV Conversion time Single conversion Resolution VOS(SR) Input offset INL Integral nonlinearity error ZIN(SR) Ilkg(SR) (1) (1) (1) MIN TYP –0.125 MAX UNIT 0.125 V 1 14 s 15 bits μV 10 ±0.007 Effective input resistance ±0.034 % FSR 2.5 Input leakage current MΩ 0.3 μA Specified by design. Not tested in production. Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links :bq27530-G1 7 bq27530-G1 SLUSAL5 – DECEMBER 2012 www.ti.com DATA FLASH MEMORY CHARACTERISTICS TA = –40°C to 85°C, 2.4 V < VCC < 2.6 V; typical values at TA = 25°C and VCC = 2.5 V (unless otherwise noted) PARAMETER tDR (1) TEST CONDITIONS Data retention Flash-programming write cycles (1) tWORDPROG (1) ICCPROG (1) tDFERASE tIFERASE (1) tPGERASE (1) (1) (1) MIN TYP MAX UNIT 10 Years 20,000 Cycles Word programming time Flash-write supply current 5 2 ms 10 mA Data flash master erase time 200 ms Instruction flash master erase time 200 ms 20 ms Flash page erase time Specified by design. Not production tested I2C-COMPATIBLE INTERFACE COMMUNICATION TIMING CHARACTERISTICS TA = –40°C to 85°C, 2.4 V < VCC < 2.6 V; typical values at TA = 25°C and VCC = 2.5 V (unless otherwise noted) MAX UNIT tr SCL/SDA rise time PARAMETER 300 ns tf SCL/SDA fall time 300 ns tw(H) SCL pulse duration (high) 600 ns tw(L) SCL pulse duration (low) 1.3 μs tsu(STA) Setup for repeated start 600 ns td(STA) Start to first falling edge of SCL 600 ns tsu(DAT) Data setup time 100 ns th(DAT) Data hold time 0 ns tsu(STOP) Setup time for stop 600 ns t(BUF) Bus free time between stop and start 66 μs fSCL Clock frequency (1) TEST CONDITIONS MIN (1) TYP 400 kHz If the clock frequency (fSCL) is > 100 kHz, use 1-byte write commands for proper operation. All other transactions types are supported at 400 kHz. (Refer to I2C INTERFACE and I2C Command Waiting Time) Figure 1. I2C-Compatible Interface Timing Diagrams 8 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links :bq27530-G1 bq27530-G1 www.ti.com SLUSAL5 – DECEMBER 2012 GENERAL DESCRIPTION The bq27530-G1 accurately predicts the battery capacity and other operational characteristics of a single Libased rechargeable cell. It can be interrogated by a system processor to provide cell information, such as timeto-empty (TTE), and state-of-charge (SOC) as well as SOC interrupt signal to the host. The bq27530-G1 can control a bq2416x Charger IC without the intervention from an application system processor. Using the bq27530-G1 and bq2416x chipset, batteries can be charged with the typical constantcurrent, constant voltage (CCCV) profile or charged using a Multi-Level Charging (MLC) algorithm. Information is accessed through a series of commands, called Standard Commands. Further capabilities are provided by the additional Extended Commands set. Both sets of commands, indicated by the general format Command( ), are used to read and write information contained within the device control and status registers, as well as its data flash locations. Commands are sent from system to gauge using the bq27530-G1’s I2C serial communications engine, and can be executed during application development, pack manufacture, or endequipment operation. Cell information is stored in the device in non-volatile flash memory. Many of these data flash locations are accessible during application development. They cannot, generally, be accessed directly during end-equipment operation. Access to these locations is achieved by either use of the bq27530-G1’s companion evaluation software, through individual commands, or through a sequence of data-flash-access commands. To access a desired data flash location, the correct data flash subclass and offset must be known. The key to the bq27530-G1 high-accuracy gas gauging prediction is Texas Instrument’s proprietary Impedance Track™ algorithm. This algorithm uses cell measurements, characteristics, and properties to create state-ofcharge predictions that can achieve less than 1% error across a wide variety of operating conditions and over the lifetime of the battery. The device measures battery charge/discharge activity by monitoring the voltage across a small-value series sense resistor (5 mΩ to 20 mΩ typ.) located between the system’s Vss and the battery’s PACK- terminal. When a cell is attached to the device, cell impedance is computed, based on cell current, cell open-circuit voltage (OCV), and cell voltage under loading conditions. The device external temperature sensing is optimized with the use of a high accuracy negative temperature coefficient (NTC) thermistor with R25 = 10.0kΩ ±1%, B25/85 = 3435K ± 1% (such as Semitec NTC 103AT). The bq27530-G1 can also be configured to use its internal temperature sensor. When an external thermistor is used, a 18.2k pull up resistor between BI/TOUT and TS pins is also required. The bq27530-G1 uses temperature to monitor the battery-pack environment, which is used for fuel gauging and cell protection functionality. To minimize power consumption, the device has different power modes: NORMAL, SLEEP, SLEEP+, HIBERNATE, and BAT INSERT CHECK. The bq27530-G1 passes automatically between these modes, depending upon the occurrence of specific events, though a system processor can initiate some of these modes directly. For complete operational details, refer to bq27530-G1 Technical Reference Manual. NOTE FORMATTING CONVENTIONS IN THIS DOCUMENT: Commands: italics with parentheses and no breaking spaces, e.g., RemainingCapacity( ) Data flash: italics, bold, and breaking spaces, e.g., Design Capacity Register bits and flags: brackets and italics, e.g., [TDA] Data flash bits: brackets, italics and bold, e.g., [LED1] Modes and states: ALL CAPITALS, e.g., UNSEALED mode. Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links :bq27530-G1 9 bq27530-G1 SLUSAL5 – DECEMBER 2012 www.ti.com DATA COMMANDS STANDARD DATA COMMANDS Thebq27530-G1 uses a series of 2-byte standard commands to enable system reading and writing of battery information. Each standard command has an associated command-code pair, as indicated in Table 2. Because each command consists of two bytes of data, two consecutive I2C transmissions must be executed both to initiate the command function, and to read or write the corresponding two bytes of data. Additional details are found in the bq27530-G1 Technical Reference Manual. Table 2. Standard Commands COMMAND CODE UNITS SEALED ACCESS UNSEALED ACCESS Control( ) 0x00 / 0x01 N/A R/W R/W AtRate( ) 0x02 / 0x03 mA R/W R/W AtRateTimeToEmpty( ) 0x04 / 0x05 Minutes R R/W Temperature( ) 0x06 / 0x07 0.1 K R/W R/W Voltage( ) 0x08 / 0x09 mV R R/W Flags( ) 0x0a / 0x0b N/A R R/W NominalAvailableCapacity( ) 0x0c / 0x0d mAh R R/W FullAvailableCapacity( ) 0x0e / 0x0f mAh R R/W RemainingCapacity( ) 0x10 / 0x11 mAh R R/W FullChargeCapacity( ) 0x12 / 0x13 mAh R R/W AverageCurrent( ) 0x14 / 0x15 mA R R/W TimeToEmpty( ) 0x16 / 0x17 Minutes R R/W RemainingCapacityUnfiltered( ) 0x18 / 0x19 mAh R R/W StandbyCurrent( ) 0x1a / 0x1b mA R R/W RemainingCapacityFiltered( ) 0x1c / 0x1d mAh R R/W ProgChargingCurrent( ) 0x1e / 0x1f mA R (1) R (1) (1) R (1) NAME ProgChargingVoltage( ) 0x20 / 0x21 mV FullChargeCapacityUnfiltered( ) 0x22 / 0x23 mAh R R/W AveragePower( ) 0x24 / 0x25 mW R R/W FullChargeCapacityFiltered( ) 0x26 / 0x27 mAh R R/W StateOfHealth( ) 0x28 / 0x29 % / num R R/W CycleCount( ) 0x2a / 0x2b Counters R R/W StateOfCharge( ) 0x2c / 0x2d % R R/W TrueSOC( ) 0x2e / 0x2f % R R/W InstantaneousCurrentReading( ) 0x30 / 0x31 mA R R/W InternalTemperature( ) 0x32 / 0x33 0.1 K R R/W ChargingLevel( ) 0x34 / 0x35 HEX R R LevelTaperCurrent( ) 0x6e / 0x6f mA R R CalcChargingCurrent( ) 0x70 / 0x71 mA R R CalcChargingVoltage( ) 0x72 / 0x73 V R R (1) 10 R Only writeable when Charger Options [BYPASS] is set. Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links :bq27530-G1 bq27530-G1 www.ti.com SLUSAL5 – DECEMBER 2012 Control( ): 0x00/0x01 Issuing a Control( ) command requires a subsequent 2-byte subcommand. These additional bytes specify the particular control function desired. The Control( ) command allows the system to control specific features of the bq27530-G1 during normal operation and additional features when the device is in different access modes, as described in Table 3. Additional details are found in the bq27530-G1 Technical Reference Manual. Table 3. Control( ) Subcommands CNTL DATA SEALED ACCESS CONTROL_STATUS 0x0000 Yes Reports the status of hibernate, IT, etc. DEVICE_TYPE 0x0001 Yes Reports the device type (eg: bq27530) FW_VERSION 0x0002 Yes Reports the firmware version on the device type HW_VERSION 0x0003 Yes Reports the hardware version of the device type PREV_MACWRITE 0x0007 Yes Returns previous MAC subcommand code CHEM_ID 0x0008 Yes Reports the chemical identifier of the Impedance Track™ configuration BOARD_OFFSET 0x0009 No Forces the device to measure and store the board offset CC_OFFSET 0x000a No Forces the device to measure the internal CC offset CC_OFFSET_SAVE 0x000b No Forces the device to store the internal CC offset OCV_CMD 0x000c Yes Request the gauge to take a OCV measurement BAT_INSERT 0x000d Yes Forces the BAT_DET bit set when the [BIE] bit is 0 BAT_REMOVE 0x000e Yes Forces the BAT_DET bit clear when the [BIE] bit is 0 SET_HIBERNATE 0x0011 Yes Forces CONTROL_STATUS [HIBERNATE] to 1 CLEAR_HIBERNATE 0x0012 Yes Forces CONTROL_STATUS [HIBERNATE] to 0 SET_SLEEP+ 0x0013 Yes Forces CONTROL_STATUS [SNOOZE] to 1 CLEAR_SLEEP+ 0x0014 Yes Forces CONTROL_STATUS [SNOOZE] to 0 DIV_CUR_ENABLE 0x0017 Yes Makes the programmed charge current to be half of what is calculated by the gauge charging algorithm. CHG_ENABLE 0x001A Yes Enable charger. Charge will continue as dictated by gauge charging algorithm. CHG_DISABLE 0x001B Yes Disable charger (Set CE bit of bq2416x) GG_CHGRCTL_ENABLE 0x001C Yes Enables the gas gauge to control the charger while continuosly resetting the charger watchdog GG_CHGRCTL_DISABLE 0x001D Yes The gas gauge stops resetting the charger watchdog DIV_CUR_DISABLE 0x001E Yes Makes the programmed charge current to be same as what is calculated by the gauge charging algorithm. DF_VERSION 0x001F Yes Returns the Data Flash Version SEALED 0x0020 No Places device in SEALED access mode IT_ENABLE 0x0021 No Enables the Impedance Track™ algorithm RESET 0x0041 No Forces a full reset of the bq27530-G1 CNTL FUNCTION DESCRIPTION Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links :bq27530-G1 11 bq27530-G1 SLUSAL5 – DECEMBER 2012 www.ti.com FUNCTIONAL DESCRIPTION The bq27530-G1 measures the cell voltage, temperature, and current to determine battery SOC. The bq27530G1 monitors charge and discharge activity by sensing the voltage across a small-value resistor (5 mΩ to 20 mΩ typ.) between the SRP and SRN pins and in series with the cell. By integrating charge passing through the battery, the battery’s SOC is adjusted during battery charge or discharge. The total battery capacity is found by comparing states of charge before and after applying the load with the amount of charge passed. When an application load is applied, the impedance of the cell is measured by comparing the OCV obtained from a predefined function for present SOC with the measured voltage under load. Measurements of OCV and charge integration determine chemical state of charge and chemical capacity (Qmax). The initial Qmax values are taken from a cell manufacturers' data sheet multiplied by the number of parallel cells. It is also used for the value in Design Capacity. The bq27530-G1 acquires and updates the battery-impedance profile during normal battery usage. It uses this profile, along with SOC and the Qmax value, to determine FullChargeCapacity( ) and StateOfCharge( ), specifically for the present load and temperature. FullChargeCapacity( ) is reported as capacity available from a fully charged battery under the present load and temperature until Voltage( ) reaches the Terminate Voltage. NominalAvailableCapacity( ) and FullAvailableCapacity( ) are the uncompensated (no or light load) versions of RemainingCapacity( ) and FullChargeCapacity( ) respectively. The bq27530-G1 has two flags accessed by the Flags( ) function that warns when the battery’s SOC has fallen to critical levels. When RemainingCapacity( ) falls below the first capacity threshold, specified in SOC1 Set Threshold, the [SOC1] (State of Charge Initial) flag is set. The flag is cleared once RemainingCapacity( ) rises above SOC1 Clear Threshold. When Voltage( ) falls below the system shut down threshold voltage, SysDown Set Volt Threshold, the [SYSDOWN] flag is set, serving as a final warning to shut down the system. The SOC_INT also signals. When Voltage( ) rises above SysDown Clear Voltage and the [SYSDOWN] flag has already been set, the [SYSDOWN] flag is cleared. The SOC_INT also signals such change. All units are in mV. When the voltage is discharged to Terminate Voltage, the SOC will be set as 0. 12 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links :bq27530-G1 bq27530-G1 www.ti.com SLUSAL5 – DECEMBER 2012 COMMUNICATIONS I2C INTERFACE The bq27530-G1 supports the standard I2C read, incremental read, quick read, one byte write, and incremental write functions. The 7 bit device address (ADDR) is the most significant 7 bits of the hex address and is fixed as 1010101. The first 8-bits of the I2C protocol will; therefore, be 0xAA or 0xAB for write or read, respectively. Host generated S ADDR[6:0] 0 A Gauge generated CMD [7:0] A DATA [7:0] A P S ADDR[6:0] (a) 1-byte write S ADDR[6:0] 0 A 1 A DATA [7:0] N P (b) quick read CMD [7:0] A Sr ADDR[6:0] 1 A DATA [7:0] N P (c) 1- byte read S ADDR[6:0] 0 A CMD [7:0] A Sr ADDR[6:0] 1 A DATA [7:0] A ... DATA [7:0] N P (d) incremental read S ADDR[6:0] 0 A CMD[7:0] A DATA [7:0] A DATA [7:0] A ... A P (e) incremental write (S = Start , Sr = Repeated Start , A = Acknowledge , N = No Acknowledge , and P = Stop). The “quick read” returns data at the address indicated by the address pointer. The address pointer, a register internal to the I2C communication engine, will increment whenever data is acknowledged by the bq27530-G1 or the I2C master. “Quick writes” function in the same manner and are a convenient means of sending multiple bytes to consecutive command locations (such as two-byte commands that require two bytes of data) The following command sequences are not supported: Attempt to write a read-only address (NACK after data sent by master): Attempt to read an address above 0x6B (NACK command): I2C Time Out The I2C engine will release both SDA and SCL if the I2C bus is held low for 2 seconds. If the bq27530-G1 was holding the lines, releasing them will free them for the master to drive the lines. If an external condition is holding either of the lines low, the I2C engine will enter the low power sleep mode. Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links :bq27530-G1 13 bq27530-G1 SLUSAL5 – DECEMBER 2012 www.ti.com I2C Command Waiting Time To ensure proper operation at 400 kHz, a t(BUF) ≥ 66 μs bus free waiting time should be inserted between all packets addressed to the bq27530-G1 . In addition, if the SCL clock frequency (fSCL) is > 100 kHz, use individual 1-byte write commands for proper data flow control. The following diagram shows the standard waiting time required between issuing the control subcommand the reading the status result. A DF_CHECKSUM subcommand requires 100mS minimum prior to reading the result. An OCV_CMD subcommand requires 1.2 seconds prior to reading the result. For read-write standard command, a minimum of 2 seconds is required to get the result updated. For read-only standard commands, there is no waiting time required, but the host should not issue all standard commands more than two times per second. Otherwise, the gauge could result in a reset issue due to the expiration of the watchdog timer. S ADDR [6:0] 0 A CMD [7:0] A DATA [7:0] A P 66ms S ADDR [6:0] 0 A CMD [7:0] A DATA [7:0] A P 66ms S ADDR [6:0] 0 A CMD [7:0] A Sr ADDR [6:0] 1 A DATA [7:0] A DATA [7:0] N P 66ms N P 66ms Waiting time inserted between two 1-byte write packets for a subcommand and reading results (required for 100 kHz < fSCL £ 400 kHz) S ADDR [6:0] 0 A CMD [7:0] A DATA [7:0] S ADDR [6:0] 0 A CMD [7:0] A Sr ADDR [6:0] A 1 A DATA [7:0] A P DATA [7:0] A 66ms DATA [7:0] Waiting time inserted between incremental 2-byte write packet for a subcommand and reading results (acceptable for fSCL £ 100 kHz) S ADDR [6:0] DATA [7:0] 0 A A CMD [7:0] DATA [7:0] A Sr ADDR [6:0] N P 1 A DATA [7:0] A DATA [7:0] A 66ms Waiting time inserted after incremental read I2C Clock Stretching A clock stretch can occur during all modes of fuel gauge operation. In SLEEP and HIBERNATE modes, a short clock stretch will occur on all I2C traffic as the device must wake-up to process the packet. In the other modes ( BAT INSERT CHECK , NORMAL, SLEEP+ ) clock stretching will only occur for packets addressed for the fuel gauge. The majority of clock stretch periods are small as the I2C interface performs normal data flow control. However, less frequent yet more significant clock stretch periods may occur as blocks of Data Flash are updated. The following table summarizes the approximate clock stretch duration for various fuel gauge operating conditions. Approximate Duration Gauging Mode Operating Condition / Comment SLEEP HIBERNATE Clock stretch occurs at the beginning of all traffic as the device wakes up. ≤ 4 ms BAT INSERT CHECK NORMAL SLEEP+ Clock stretch occurs within the packet for flow control. (after a start bit, ACK or first data bit) ≤ 4 ms Normal Ra table Data Flash updates. 24 ms 14 Data Flash block writes. 72 ms Restored Data Flash block write after loss of power. 116 ms End of discharge Ra table Data Flash update. 144 ms Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links :bq27530-G1 bq27530-G1 www.ti.com SLUSAL5 – DECEMBER 2012 REFERENCE SCHEMATICS SCHEMATIC Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated Product Folder Links :bq27530-G1 15 PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) BQ27530YZFR-G1 ACTIVE DSBGA YZF 15 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 BQ27530 BQ27530YZFT-G1 ACTIVE DSBGA YZF 15 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 BQ27530 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. 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Addendum-Page 1 Samples PACKAGE MATERIALS INFORMATION www.ti.com 24-Aug-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device BQ27530YZFT-G1 Package Package Pins Type Drawing SPQ DSBGA 250 YZF 15 Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 180.0 8.4 Pack Materials-Page 1 2.1 B0 (mm) K0 (mm) P1 (mm) 2.76 0.81 4.0 W Pin1 (mm) Quadrant 8.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 24-Aug-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) BQ27530YZFT-G1 DSBGA YZF 15 250 182.0 182.0 17.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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