TI HD3SS0001

HD3SS0001
www.ti.com
SLAS827 – FEBRUARY 2012
10.3Gbps Thunderbolt™ and DisplayPort™ Switch
Check for Samples: HD3SS0001
FEATURES
HOST APPLICATIONS
DDC_SCL
AUX(n)
AUX(p)
DDC_SDA
24
25
Top View
of
Package
HPD
GND
TBC-2
}
CA_DET
HPD
}
TB Rx_1
or AUX/DDC
}
LSTx/LSRx
or DP ML1
GND
TBC-16
TB Rx_1(p)
TB Rx_1(n)
TBC-18
GND
GND
ML1(p)
GND
PAD
ML1(n)
TBC-9
TBC-11
15
DP_EN
VDD
10G_EN
14
11
S0
VDD
TBC-4
DESCRIPTION
HD3SS0001 is a high-speed passive switch designed to support low speed and high speed signals required for
Thunderbolt™(TBT) applications using the mDP connector. The HD3SS0001 switches between DDC, AUX, and
the 10Gbps TBT signal in order to support DisplayPort, Dual Mode DisplayPort, and ThunderboltTM. The
HD3SS0001 also switches between the ThunderboltTM Low Speed UART transmit/receive pair and DisplayPort
Main Link 1 (ML1) pair. The device supports 5.4Gbps for DisplayPort and 10.3Gbps for Thunderbolt. Switch
control is determined by three control pins and the mDP connector pin used for cable detect.
The HD3SS0001 is offered in a 28-pin QFN package and specified to operate from a single supply voltage of
3.3V over the full industrial temperature range of –40°C to 85°C.
ORDERING INFORMATION (1)
(1)
PART NUMBER
PART MARKING
PACKAGE
HD3SS0001RLFR
HD3SS0001
28-pin RLF Reel (Large)
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
1
2
3
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Thunderbolt is a trademark of Intel Corporation in the U.S. and/or other countries.
DisplayPort is a trademark of VESA Standards Association.
PRODUCT PREVIEW information concerns products in the
formative or design phase of development. Characteristic data and
other specifications are design goals. Texas Instruments reserves
the right to change or discontinue these products without notice.
Copyright © 2012, Texas Instruments Incorporated
PRODUCT PREVIEW
VDD
CA_DET
10
•
•
•
ThunderboltTM Applications
1
•
•
28
•
Compatible with DisplayPort 1.2 and
ThunderboltTM
– Supports DP and DP++ Configurations
– Handles HPD (5V tolerant) and CA_DET
– Supports AUX and DDC MUX
Wide –3dB Differential BW of over
10GHz for 10G Link
Excellent Dynamic Characteristics (at 5GHz)
– Crosstalk = –30dB
– Isolation = –20dB
– Insertion Loss = –1.5dB
– Return Loss = –16dB
– Max Bit-Bit Skew = 4 ps
VDD Operating Range 3.3 V ±10%
Small 3.5 mm x 5.5 mm, 28-Pin TQFN Package
Reduced Power Consumption in Detect and
Sleep Power Modes
LSTx
•
23
TM
LSRx
1
HD3SS0001
SLAS827 – FEBRUARY 2012
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
FUNCTIONAL DIAGRAM
spacer
spacer
VDD
HD3SS0001
DDC_SCL
100kΩ
DDC_SDA
TBC-16
3:1 Mux
AUX(p)
AUX(n)
TBC-18
TB Rx_1(p)
PRODUCT PREVIEW
TB Rx_1(n)
100kΩ
2:1 Mux
ML1(p)
ML1(n)
TBC-9
TBC-11
LSTx
LSRx
S0
DP_EN
PU/PD
Enables
VDD
1MΩ
1MΩ
Control
Logic
10G_EN
1MΩ
CA_DETECT _ SNK
TBC-4
CA_DET
1MΩ
HPD
2
HPD_ SNK
Submit Documentation Feedback
TBC-2
Copyright © 2012, Texas Instruments Incorporated
Product Folder Link(s) :HD3SS0001
HD3SS0001
www.ti.com
SLAS827 – FEBRUARY 2012
TRUTH TABLE
Control Lines
Device & PU/PD Configurations
MUX Outputs
Device Mode States
S0
(System Power State)
DP_EN
10G_EN
TBC-4
(CA_Detect)
Thunderbolt 10G Mode
1 (System Active)
0 (System Sleep)
1
1
1
1
DisplayPort Mode
1 (System Active)
0 (System Sleep)
0
0
TMDS Mode
1 (System Active)
0 (System Sleep)
Detect Mode
TBC-16/TBC-18 (AUX)
Integrated PU/PD State
2:1 Mux
(DP ML)
3:1 Mux
(TB 10Gbps)
X - Don't Care
X - Don't Care
LSTx & LSRx
LSTx & LSRx
TB Rx_1
3-stated
Off
Off
0
0
0
0
DP ML1
3-stated
AUX
3-stated
On
On
0
0
0
0
1
1
DP ML1
3-stated
DDC
3-stated
Off
Off
1 (System Active)
0 (System Sleep)
1
1
0
0
X - Don't Care
X - Don't Care
LSTx & LSRx
LSTx & LSRx
3-stated
3-stated
On
On
X - Don't Care
0
1
X - Don't Care
3-stated
3-stated
Off
Sleep Power Mode/ Invalid
State Modes
(1)
CONNECTOR SIDE PIN
CONTROLLER SIDE PIN
TBC-16
DDC_SCL or AUX(p) or TB Rx_1(p)
TBC-18
DDC_SDA or AUX(n) or TB Rx_1(n)
TBC-9
ML1(p) or LSTx
TBC-11
ML1(n) or LSRx
TBC-4
CA_DET
TBC-2
HPD
The HD3SS0001 can tolerate polarity inversions for the differential signals denoted by the (p) and (n) terminology to ease potential
board routing issues.The LSTx/LSRx cannot be swapped since they are buffered and therefore uni-directional. Also, note the integrated
pullup on TBC-18 and the integrated pulldown on TBC-16 cannot be swapped.
PIN FUNCTIONS
PIN
I/O
DESCRIPTION
NUMBER
NAME
27
28
AUX(p)
AUX(n)
I/O
Controller Side AUX Positive Signal
Controller Side AUX Negative Signal
5
6
TB Rx_1(p)
TB Rx_1(n)
O
Controller Side 10Gbps Positive Signal
Controller Side 10Gbps Negative Signal
8
9
ML1(p)
ML1(n)
I
Controller Side Channel 1, DisplayPort Main Link 1 Positive Signal
Controller Side Channel 1, DisplayPort Main Link 1 Negative Signal
20
19
TBC-16
TBC-18
I/O
Connector Side 10G or AUX Positive Signal or DDC CLK with integrated pulldown
Connector Side 10G or AUX Negative Signal or DDC Data with integrated pullup
17
16
TBC-9
TBC-11
I/O
Connector Side DP Main Link 1 Positive Signal or UART TX
Connector Side DP Main Link 1 Negative Signal or UART RX
25
26
DDC_SCL
DDC_SDA
I/O
Controller Side DDC ClockController Side DDC Data
2
CA_DET
O
Controller Side Cable Detect
23
TBC-4
I
Connector Side Cable Detect with integrated pulldown
3
HPD
O
Controller Side Hot Plug Detect
22
TBC-2
I
Connector Side Hot Plug Detect
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
Product Folder Link(s) :HD3SS0001
3
PRODUCT PREVIEW
MUX PIN CONNECTION TABLE (1)
HD3SS0001
SLAS827 – FEBRUARY 2012
www.ti.com
PIN FUNCTIONS (continued)
PIN
I/O
DESCRIPTION
NUMBER
NAME
11
12
LSTx
LSRx
I/O
10
13
14
S0
DP_EN
10G_EN
I
1, 15, 24
VDD
Supply
Positive power supply voltage
4, 7, 18, 21,
Center Pad
GND
Supply
Negative power supply voltage
Controller Side UART TX SignalController Side UART RX Signal
Control Lines for configuring device. S0 and 10G_EN incorporate integrated pulldowns and
DP_EN incorporates a pullup. Therefore, the default device state will be “Detect Mode” per the
Truth Table provided these lines are not driven.
ABSOLUTE MAXIMUM RATINGS (1) (2)
Over operating free-air temperature range (unless otherwise noted)
VALUE
Supply voltage
range (2)
PRODUCT PREVIEW
Voltage range
MIN
MAX
VDD
–0.5
4
Differential I/O
–0.5
4
Control pin/buffers
–0.5
VDD+0.5
Human body model (3)
Electrostatic
discharge
Charged-device model
(2)
(3)
(4)
V
V
±1,500
(4)
V
±500
Continuous power dissipation
(1)
UNIT
See Thermal Table
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any conditions beyond those indicated under recommended operating conditions
is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values, except differential voltages, are with respect to network ground terminal.
Tested in accordance with JEDEC/ESDA JS-001-2011
Tested in accordance with JEDEC JESD22 C101-E
THERMAL INFORMATION
HD3SS0001
THERMAL METRIC (1)
θJA
Junction-to-ambient thermal resistance
37.9
θJCtop
Junction-to-case (top) thermal resistance
34.4
θJCbot
Junction-to-case (bottom) thermal resistance
1.4
θJB
Junction-to-board thermal resistance
8.7
ψJT
Junction-to-top characterization parameter
0.6
ψJB
Junction-to-board characterization parameter
8.5
(1)
UNITS
28-PIN TQFN (RLF)
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
THERMAL CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX (1)
UNIT
4.6
7.6
mW
PD
Device power dissipation
P(Detect)
Device power dissipation in detect mode
5
mW
PSleep
Device power dissipation in sleep mode
15
µW
(1)
4
The maximum rating is simulated under 3.6V VDD.
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
Product Folder Link(s) :HD3SS0001
PACKAGE OPTION ADDENDUM
www.ti.com
18-Feb-2012
PACKAGING INFORMATION
Orderable Device
Status
(1)
HD3SS0001RLFR
PREVIEW
Package Type Package
Drawing
VQFN
RLF
Pins
Package Qty
28
3000
Eco Plan
TBD
(2)
Lead/
Ball Finish
Call TI
MSL Peak Temp
(3)
Samples
(Requires Login)
Call TI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
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Addendum-Page 1
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