TPD4S1394 www.ti.com SLVSA55 – NOVEMBER 2009 FIREWIRE ESD CLAMP WITH LIVE-INSERTION DETECTION CIRCUIT Check for Samples: TPD4S1394 FEATURES 1 • • • • • IEEE1394 Live Insertion Protection Exceeds ESD protection to IEC61000-4- 2 (Level 4) – ±15-kV Human-Body Model (HBM) – ±6-kV IEC 61000-4-2 Contact Discharge 4-Channel Matching ESD Clamps for High-Speed Differential Lines Flow-Through, Single-in-Line Pin Mapping Simplifies Board Layout Available in an 8-Pin X2SON (DQL) package APPLICATIONS • IEEE 1394 Live Insertion Protection DQL PACKAGE (TOP VIEW) VCC 1 8 D1+ GND 2 7 D1– 3 6 D2+ 4 5 D2– VCMLP FWPWR_EN DESCRIPTION The TPD4S1394 provides robust system level ESD solution for the IEEE.1394 port along with a live insertion detection mechanism for high-speed lines interfacing a low-voltage, ESD sensitive core chipset. This device protects and monitors up to two differential input pairs. The optimized line capacitance allows to protect the data lines with data rate in excess of 1.6 GHz without degrading signal integrity. The TPD4S1394 incorporates a live insertion circuit whose output state changes when improper voltage levels are present on the input data lines. The FWPWR_EN signal controls an external FireWire port power switch. During the live insertion event if there is a floating GND or a high level signal at the D+, D– pins, the internal comparator will detect the changes and pull the FWPWR_EN signal to low state. When FWPWR_EN is driven low, there is an internal delay mechanism preventing it from being driven to the high state regardless of the inputs to the comparator. Additionally, the TPD4S1394 performs ESD protection on the four inputs pins: D1+, D1–, D2+, and D2–. The TPD4S1394 conforms to the IEC61000-4-2 (Level 4) ESD protection and ±15 kV HBM ESD protection. The TPD4S1394 is characterized for operation over ambient air temperature of –40°C to 85°C. A 0.1uF decoupling capacitor is required at VCC (pin1) ORDERING INFORMATION PACKAGE (1) TA –40°C to 85°C (1) (2) SON – DQL (2) Reel of 3000 NOMINAL DIMENSIONS (mm) W = 1.4, L = 2.0, H = 0.4, Pitch = 0.5 ORDERABLE PART NUMBER TPD4S1394DQLR TOP-SIDE MARKING 5JR Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2009, Texas Instruments Incorporated TPD4S1394 SLVSA55 – NOVEMBER 2009 www.ti.com FUNCTIONAL BLOCK DIAGRAM D2+ VCMLP D2– D1+ VCC D1– Reference Generator FWPWR_EN VREF GND TERMINAL FUNCTIONS TERMINAL TYPE DESCRIPTION PIN NO. NAME 1 VCC Power Power supply 2 GND GND Ground 3 VCLMP O Comparator trip reference 4 FWPWR_EN O Control output 5, 6, 7, 8 D2+, D2–, D1+, D1– I High-speed ESD clamp inputs ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) MIN MAX –0.5 4.6 V 0 4 V Switch output –0.5 4.6 V Tstg Storage temperature range –65 150 °C TA Operating free-air temperature range –40 85 °C VCC Supply voltage range VIO IO voltage range at D+, D–, VCLMP FWPWR_E N (1) UNIT IEC 61000-4-2 Contact Discharge D+, D– pins ±6 kV HBM ESD D+, D– pins ±15 kV Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. RECOMMENDED OPERATING CONDITIONS over operating free-air temperature range (unless otherwise noted) PARAMETER VCC 2 MIN Supply voltage 3.0 Submit Documentation Feedback NOM MAX 3.6 UNIT V Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPD4S1394 TPD4S1394 www.ti.com SLVSA55 – NOVEMBER 2009 ELECTRICAL CHARACTERISTICS (1) over operating free-air temperature range (unless otherwise noted) PARAMETER Vdx VCLMP MIN TYP MAX Voltage at D1+, D1-, D2+, and D2- to trip the FWPWR_EN from high to low TEST CONDITIONS 2.9 3.4 4.0 Voltage to trip the FWPWR_EN from low to high 2.7 3.2 3.8 V Value on pin No connect ttrip Time for FWPWR_EN to go low Loading on FWPWR_EN = 50 pF 0.5 2 5 μs treset Time delay for the FWPWR_EN to go high after trip condition is met FWPWR_EN = VCC 300 450 600 ms VBR Breakdown voltage at VCLAMP II = 1 mA VD Diode forward voltage for lower clamp ID = 8 mA lower clamp diode –0.6 –0.8 FWPWR_E N Switch output RDYN Dynamic resistance (for in and out clamp) of the D+, D- I=1A CIO IO Capacitance of D+, D- VIO = 2.5 V 1.5 2 pF Current Consumption VCC = 3.3 V, FWPWR_EN = high 130 200 μA ICC (1) 2.45 UNIT V 4.2 V –0.95 V VCC V 1 Ω A 0.1-μF decoupling capacitor is required at VCC (pin 1). TYPICAL CHARACTERISTICS 2.5 Capacitance (pF) 2.0 1.5 1.0 0.5 0.0 0.0 0.5 1.0 1.5 2.0 Voltage Bias (V) 2.5 3.0 3.5 Figure 1. IO Capacitance vs IO Voltage (D+, D– Pins) Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPD4S1394 3 TPD4S1394 SLVSA55 – NOVEMBER 2009 www.ti.com TYPICAL CHARACTERISTICS (continued) 0 Insertion Loss (dB) -3 -6 -3.0 dB Frequency = 2.4 GHz -9 -12 -15 -18 1.0E+07 1.0E+08 1.0E+09 Frequency (Hz) 1.0E+10 Figure 2. Insertion Loss (S21) for D+, D– Pins 4 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPD4S1394 PACKAGE OPTION ADDENDUM www.ti.com 3-Dec-2009 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing TPD4S1394DQLR ACTIVE X2SON DQL Pins Package Eco Plan (2) Qty 8 3000 Green (RoHS & no Sb/Br) Lead/Ball Finish CU NIPDAU MSL Peak Temp (3) Level-1-260C-UNLIM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. 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Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 7-Mar-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device TPD4S1394DQLR Package Package Pins Type Drawing X2SON DQL 8 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 3000 180.0 9.5 Pack Materials-Page 1 1.6 B0 (mm) K0 (mm) P1 (mm) 2.3 0.5 4.0 W Pin1 (mm) Quadrant 8.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 7-Mar-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPD4S1394DQLR X2SON DQL 8 3000 180.0 180.0 30.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. 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