TI TPS70912DBVR

TPS709xx
www.ti.com
SBVS186 – MARCH 2012
150-mA, 30-V, UltraLow IQ, Low-Dropout Regulators with Enable
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23
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UltraLow IQ: 1 μA
Reverse Current Protection
Low ISHUTDOWN: 150 nA
Input Voltage Range: 2.5 V to 30 V
Supports 200-mA Peak Output
Low Dropout: 300 mV at 50 mA
2% Accuracy Over Temperature
Available in Fixed-Output Voltages:
1.5 V to 6.5 V
Thermal Shutdown and Overcurrent Protection
Packages: SOT23-5
DESCRIPTION
The TPS709xx series of low-dropout (LDO) linear
regulators are ultralow quiescent current devices that
are designed for power-sensitive applications. A
precision band-gap and error amplifier provides 2%
accuracy over temperature. Quiescent current of only
1 µA makes the devices ideal solutions for batterypowered, always ON systems that require very little
idle state power dissipation. All devices have a
thermal shutdown and current limit for safety.
The LDO can be put into shutdown mode by pulling
the EN pin low. The leakage current in this mode
goes down to less than 150 nA.
The TPS709xx series is available in an SOT23-5
package.
APPLICATIONS
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Zigbee™ Networks
Home Automation
Metering
Weighing Scales
Portable Power Tools
Remote Control Devices
Wireless Handsets, Smart Phones, PDAs,
WLAN and Other PC Add-On Cards
White Goods
DBV PACKAGE
SOT23-5
(TOP VIEW)
IN
1
GND
2
EN
3
5
OUT
4
NC
1
2
3
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Zigbee is a trademark of ZigBee Alliance.
All other trademarks are the property of their respective owners.
PRODUCT PREVIEW information concerns products in the
formative or design phase of development. Characteristic data and
other specifications are design goals. Texas Instruments reserves
the right to change or discontinue these products without notice.
Copyright © 2012, Texas Instruments Incorporated
PRODUCT PREVIEW
FEATURES
1
TPS709xx
SBVS186 – MARCH 2012
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
AVAILABLE OPTIONS (1)
PRODUCT
VOUT
XX is nominal output voltage (for example 28 = 2.8 V).
E is TBD
YYY is package designator
Z is package quantity; R is for reel (3000 pieces), T is for tape (250 pieces)
TPS709xxyyyz
(1)
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or visit the
device product folder at www.ti.com.
ABSOLUTE MAXIMUM RATINGS (1)
Specified at TJ = –40°C to +125°C, unless otherwise noted. All voltages are with respect to GND.
VALUE
PRODUCT PREVIEW
Voltage
Maximum output current
MIN
MAX
UNIT
VIN
–0.3
+30
V
VEN
–0.3
+7
V
VOUT
–0.3
+7
V
IOUT
Internally limited
PDISS
See the Thermal Information table
Output short-circuit duration
Indefinite
Continuous total power dissipation
Temperature
–55
+150
Storage, Tstg
–55
+150
°C
2
kV
500
V
Human body model (HBM)
Electrostatic discharge (ESD) rating
(1)
Junction, TJ
Charged device model (CDM)
°C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods my affect device reliability.
THERMAL INFORMATION
TPS709xx
THERMAL METRIC (1)
DBV (SOT23)
UNITS
5 PINS
θJA
Junction-to-ambient thermal resistance
212.1
θJCtop
Junction-to-case (top) thermal resistance
78.5
θJB
Junction-to-board thermal resistance
39.5
ψJT
Junction-to-top characterization parameter
2.86
ψJB
Junction-to-board characterization parameter
38.7
θJCbot
Junction-to-case (bottom) thermal resistance
N/A
(1)
2
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
TPS709xx
www.ti.com
SBVS186 – MARCH 2012
ELECTRICAL CHARACTERISTICS
At TA = –40°C to +85°C, VIN = VOUT (typ) + 1 V or 2.5 V (whichever is greater), IOUT = 1 mA, VEN = 2 V, and CIN = COUT = 2.2-μF
ceramic, unless otherwise noted. Typical values are at TA = +25°C.
TPS709xx
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VIN
Input voltage range
2.5
28
VOUT
Output voltage range
1.5
6.5
V
VO
DC output accuracy
–2
2
%
ΔVO/ΔVIN
Line regulation
VOUT(NOM) + 1 V, 2.5 V ≤ VIN ≤ 24 V
15
mV
ΔVO/ΔIOUT
Load regulation
0 mA ≤ IOUT ≤ 150 mA
VDO
Dropout voltage (1)
ICL
Output current limit
10
20
50
mV
IOUT = 150 mA
800
1650
mV
IOUT = 50 mA
300
650
mV
300
400
mA
1
1.8
μA
VOUT = 0.9 × VOUT(NOM)
260
IOUT = 0 mA
IGND
Ground pin current
ISHUTDOWN
Shutdown pin current
IOUT = 100 mA
150
μA
IOUT = 150 mA
300
μA
VEN ≤ 0.4 V, VIN = 2.0 V
150
nA
85
dB
70
dB
52
dB
300
μVRMS
f = 10 Hz
PSRR
V
Power-supply rejection ratio f = 100 Hz
f = 1 kHz
BW = 100 Hz to 100 kHz, IOUT = 10 mA,
VIN = 2.3 V, VOUT = 1.8 V
VN
Output noise voltage
tSTR
Startup time (2)
VEN(HI)
Enable pin high (enabled)
0.9
5.5
V
VEN(HI)
Enable pin high (disabled)
0
0.4
V
IEN
EN pin current
EN = 5.5 V, IOUT = 10 µA
5
nA
tSD
Thermal shutdown
temperature
Shutdown, temperature increasing
+160
°C
Reset, temperature decreasing
+140
°C
TJ
Operating junction
temperature
(1)
(2)
μs
150
–40
PRODUCT PREVIEW
PARAMETER
+125
°C
VDO is measured for devices with VIN = 0.98 × VOUT(NOM).
Startup time = time from EN assertion to 0.95 × VOUT(NOM).
Copyright © 2012, Texas Instruments Incorporated
Submit Documentation Feedback
3
TPS709xx
SBVS186 – MARCH 2012
www.ti.com
FUNCTIONAL BLOCK DIAGRAM
OUT
IN
Current
Limit
Thermal
Shutdown
EN
Bandgap
LOGIC
Device
PRODUCT PREVIEW
GND
Figure 1. Fixed-Voltage Version
4
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Copyright © 2012, Texas Instruments Incorporated
TPS709xx
www.ti.com
SBVS186 – MARCH 2012
TYPICAL CHARACTERISTICS
PRODUCT PREVIEW
Over operating temperature range (TJ = –40°C to +125°C), IOUT = 10 mA, VEN = 1.0 V, COUT = 2.2 μF, and VIN = VOUT(TYP) + 1
V or 2.5 V (whichever is greater), unless otherwise noted. Typical values are at TJ = +25°C.
Copyright © 2012, Texas Instruments Incorporated
Submit Documentation Feedback
5
TPS709xx
SBVS186 – MARCH 2012
www.ti.com
APPLICATION INFORMATION
The TPS709xx are a series of devices that belong to a new family of next-generation, low-dropout (LDO) voltage
regulators. They consume low quiescent current and deliver excellent line and load transient performance. This
performance, combined with low noise, very good PSRR with little (VIN – VOUT) headroom, makes these devices
ideal for RF portable applications, current limit, and thermal protection. The TPS709xx are specified from –40°C
to +125°C.
BOARD LAYOUT RECOMMENDATIONS TO IMPROVE PSRR AND NOISE PERFORMANCE
Input and output capacitors should be placed as close to the device pins as possible. To improve ac performance
(such as PSRR, output noise, and transient response), it is recommended that the board be designed with
separate ground planes for VIN and VOUT, with the ground plane connected only at the GND pin of the device. In
addition, the ground connection for the output capacitor should be connected directly to the device GND pin.
INTERNAL CURRENT LIMIT
PRODUCT PREVIEW
The TPS709xx internal current limit helps to protect the regulator during fault conditions. During current limit, the
output sources a fixed amount of current that is largely independent of output voltage. In such a case, the output
voltage is not regulated, and can be measured as VOUT = ILIMIT × RLOAD. The PMOS pass transistor dissipates
[(VIN – VOUT) × ILIMIT] until a thermal shutdown is triggered and the device turns off. As the device cools down, it
is turned on by the internal thermal shutdown circuit. If the fault condition continues, the device cycles between
current limit and thermal shutdown; see the Thermal Information section for more details.
The TPS709xx is characterized over the recommended operating output current range up to 150 mA. The
internal current limit begins to limit the output current at a minimum of 260 mA of output current. The TPS709xx
continues to operate for output currents between 150 mA and 260 mA but some data sheet parameters may not
be met, resulting in increased power dissipation.
DROPOUT VOLTAGE
The TPS709xx uses a PMOS pass transistor to achieve low dropout. When (VIN – VOUT) is less than the dropout
voltage (VDO), the PMOS pass device is in the linear region of operation and the input-to-output resistance is the
RDS(ON) of the PMOS pass element. VDO approximately scales with the output current because the PMOS device
behaves as a resistor in dropout.
As with any linear regulator, PSRR and transient response are degraded as (VIN – VOUT) approaches dropout.
This effect is shown in in the Typical Characteristics.
TRANSIENT RESPONSE
As with any regulator, increasing the output capacitor size reduces over- and undershoot magnitude, but
increases transient response duration.
UNDERVOLTAGE LOCK-OUT (UVLO)
The TPS709xx uses an undervoltage lockout (UVLO) circuit to keep the output shut off until the internal circuitry
operates properly.
REVERSE CURRENT PROTECTION
The TPS709xx have integrated reverse current protection. Reverse current protection prevents current from
flowing from the OUT pin to the IN pin when output voltage is higher than input voltage. The reverse current
protection circuitry places the power path in high impedance when it detects that the output voltage is higher than
the input voltage. This setting reduces leakage current from the output to the input to TBD nA, typical. The
reverse current protection is always active regardless of the enable pin logic state or if the OUT pin voltage is
greater than 2.0 V. Reverse current can flow if the output voltage is less than 2.0 V and if input voltage is less
than the output voltage.
6
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Copyright © 2012, Texas Instruments Incorporated
TPS709xx
www.ti.com
SBVS186 – MARCH 2012
THERMAL INFORMATION
Thermal protection disables the output when the junction temperature rises to approximately +165°C, allowing
the device to cool. When the junction temperature cools to approximately +145°C, the output circuitry is again
enabled. Depending on power dissipation, thermal resistance, and ambient temperature, the thermal protection
circuit may cycle on and off. This cycling limits the dissipation of the regulator, protecting it from damage as a
result of overheating.
Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate
heatsink. For reliable operation, junction temperature should be limited to +125°C, maximum. To estimate the
margin of safety in a complete design (including heatsink), increase the ambient temperature until the thermal
protection is triggered; use worst-case loads and signal conditions. For good reliability, thermal protection should
trigger at least +35°C above the maximum expected ambient condition of the particular application. This
configuration produces a worst-case junction temperature of +125°C at the highest expected ambient
temperature and worst-case load.
The TPS709xx internal protection circuitry is designed to protect against overload conditions. It is not intended to
replace proper heatsinking. Continuously running the TPS709xx into thermal shutdown degrades device
reliability.
The ability to remove heat from the die is different for each package type, which presents different considerations
in the printed circuit board (PCB) layout. The PCB area around the device that is free of other components
moves the heat from the device to ambient air. Performance data for JEDEC low and high-K boards are given in
the Thermal Information table. Using heavier copper increases the effectiveness in removing heat from the
device. The addition of plated through-holes to heat-dissipating layers also improves the heatsink effectiveness.
Power dissipation depends on input voltage and load conditions. Power dissipation (PD) is equal to the product of
the output current and the voltage drop across the output pass element, as shown in Equation 1:
PD = (VIN – VOUT) × IOUT
Copyright © 2012, Texas Instruments Incorporated
(1)
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7
PRODUCT PREVIEW
POWER DISSIPATION
PACKAGE OPTION ADDENDUM
www.ti.com
5-Jun-2012
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package
Drawing
Pins
Package Qty
Eco Plan
(2)
Lead/
Ball Finish
MSL Peak Temp
PREVIEW
SOT-23
DBV
5
3000
TBD
Call TI
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TPS70912DBVT
PREVIEW
SOT-23
DBV
5
250
TBD
Call TI
Call TI
TPS709135DBVR
PREVIEW
SOT-23
DBV
5
3000
TBD
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TPS709135DBVT
PREVIEW
SOT-23
DBV
5
250
TBD
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Call TI
TPS70916DBVR
PREVIEW
SOT-23
DBV
5
3000
TBD
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TPS70916DBVT
PREVIEW
SOT-23
DBV
5
250
TBD
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TPS70918DBVR
PREVIEW
SOT-23
DBV
5
3000
TBD
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TPS70918DBVT
PREVIEW
SOT-23
DBV
5
250
TBD
Call TI
Call TI
TPS70919DBVR
PREVIEW
SOT-23
DBV
5
3000
TBD
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TPS70919DBVT
PREVIEW
SOT-23
DBV
5
250
TBD
Call TI
Call TI
TPS70925DBVR
PREVIEW
SOT-23
DBV
5
3000
TBD
Call TI
Call TI
TPS70925DBVT
PREVIEW
SOT-23
DBV
5
250
TBD
Call TI
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TPS70927DBVR
PREVIEW
SOT-23
DBV
5
3000
TBD
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TPS70927DBVT
PREVIEW
SOT-23
DBV
5
250
TBD
Call TI
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TPS70928DBVR
PREVIEW
SOT-23
DBV
5
3000
TBD
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TPS70928DBVT
PREVIEW
SOT-23
DBV
5
250
TBD
Call TI
Call TI
TPS70930DBVR
PREVIEW
SOT-23
DBV
5
3000
TBD
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Call TI
TPS70930DBVT
PREVIEW
SOT-23
DBV
5
250
TBD
Call TI
Call TI
TPS70933DBVR
PREVIEW
SOT-23
DBV
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TPS70933DBVT
PREVIEW
SOT-23
DBV
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TPS70950DBVR
PREVIEW
SOT-23
DBV
5
3000
TBD
Call TI
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TPS70950DBVT
PREVIEW
SOT-23
DBV
5
250
TBD
Call TI
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The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
Addendum-Page 1
Samples
(Requires Login)
TPS70912DBVR
(1)
(3)
PACKAGE OPTION ADDENDUM
www.ti.com
5-Jun-2012
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
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Addendum-Page 2
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