RFMA1415-0.5W-Q7 14.40– 15.40GHz High Gain Surface-Mounted PA UPDATED: 04-24-2008 FEATURES • • • • • 14.40 – 15.40GHz Operating Frequency Range 26.5dBm Output Power @1dB Compression 29.0dB Typical Power Gain @1dB Compression -41dBc OIMD3 @Pout 16.5dBm/tone 7X7mm QFN Package APPLICATIONS • • Point-to-point and point-to-multipoint radio Military Radar Systems ELECTRICAL CHARACTERISTICS (TB=25 °C) SYMBOL PARAMETER/TEST CONDITIONS MIN TYP MAX UNITS 15.4 GHz Operating Frequency Range 14.4 P1dB Output Power @1dB Gain Compression 25.5 26.5 dBm G1dB Gain @1dB Gain Compression 26.0 29.0 dB F rd OIMD3 Input RL Output RL Output 3 Order Intermodulation Distortion @∆f=10MHz, Pout = 16.5dBm/tone -41 -38 dBc Input Return Loss -10 -8 dB Output Return Loss -8 dB ID1 Drain Current1 180 220 mA ID2 Drain Current1 400 460 mA VD1, VD2 Drain Voltage 7 8 V VG1, VG2 Gate Voltage -0.25 V -2.5 Rth Thermal Resistance2 Tb Operating Base Plate Temperature o 13 C/W -30 +80 o C 1. Recommended to bias each amplifier stage separately using a gate voltage range, starting from -2.5 to -0.3V to achieve typical current levels. 2. Rth is mounting dependent. Measured result when used with Excelics recommended evaluation board. 3,4 MAXIMUM RATINGS AT 25°C SYMBOL CHARACTERISTIC ABSOLUTE CONTINOUS VD1, VD2 Drain to Source Voltage 12V 8V VG1, VG2 Gate to Source Voltage -5V -2.5 V Drain Current Idss 220, 460mA ID1, ID2 PIN Input Power 20dBm @ 3dB compression TCH Channel Temperature 175°C 150°C Storage Temperature -65/175°C -65/150°C 8.8W 7.4W TSTG PT Total Power Dissipation 3. Operation beyond absolute or continuous ratings may result in permanent damage or reduction of MTTF respectively. 4. Bias conditions must also satisfy the following equation VDS*IDS < (TCH –TB)/RTH; where TB = Temperature of Base Plate Specifications are subject to change without notice. Excelics Semiconductor, Inc. 310 De Guigne Drive, Sunnyvale, CA 94085 Phone: 408-737-1711 Fax: 408-737-1868 Web: www.excelics.com page 1 of 4 Revised May 2008 RFMA1415-0.5W-Q7 14.40– 15.40GHz High Gain Surface-Mounted PA UPDATED: 04-24-2008 Package Dimension and Pin Assignment 0.276±0.002 0.276±0.002 EXCELICS RFMA1415 -0.5W-Q7 22 0.240 0.038 0.036 0.013 0 REF 21 1 15 7 14 0.008 0 REF 0.049 MAX 0 REF 0.276±0.002 0 REF 28 8 0.012±0.002 0.032±0.002 * All measurements in inches Additional Notes: 1) Ground Plane must be soldered to PCB RF ground 2) All dimensions are in inches 3) Refer to Excelics application notes on QFNs for further guidelines 4) Pin Assignment: Top View Vd1 Bottom View Vd2 Vd2 Vd1 22 RFin EXCELICS RFMA1415 -0.5W-Q7 28 1 21 RFout RFout RFin 15 7 14 Vg1 Vg2 Pin 1, 2, 3, 5, 6, 7, 8, 10, 11, 12, 14 4 9 13 15, 16, 17, 19, 20, 21, 22, 24, 25, 26, 28 18 23 27 8 Vg2 Vg1 Assignment NC RFin Vg1 Vg2 NC RFout Vd2 Vd1 Specifications are subject to change without notice. Excelics Semiconductor, Inc. 310 De Guigne Drive, Sunnyvale, CA 94085 Phone: 408-737-1711 Fax: 408-737-1868 Web: www.excelics.com page 2 of 4 Revised May 2008 RFMA1415-0.5W-Q7 14.40– 15.40GHz High Gain Surface-Mounted PA UPDATED: 04-24-2008 Typical Performance: 1. Small-Signal Parameters(@Vds = 7V, Ids1 = 180mA, Ids2 = 400mA) S21 S22 S11 32 35 31 34 30 33 29 32 28 31 27 30 26 29 25 28 24 27 23 26 22 14.2 14.4 14.6 14.8 15 15.2 15.4 G1dB(dB) P1dB(dBm) 2. P1-dB & G1-dB (@Vds = 7V, Ids1 = 180mA, Ids2 = 400mA) 25 15.6 Frequency(GHz) P1-dB G1-dB Specifications are subject to change without notice. Excelics Semiconductor, Inc. 310 De Guigne Drive, Sunnyvale, CA 94085 Phone: 408-737-1711 Fax: 408-737-1868 Web: www.excelics.com page 3 of 4 Revised May 2008 RFMA1415-0.5W-Q7 14.40– 15.40GHz High Gain Surface-Mounted PA UPDATED: 04-24-2008 Recommended Circuit Schematic: Vd1 Vd2 22uF 0.1uF NC NC NC NC RFin NC Vd1 NC NC NC Vd2 0.1uF NC EXCELICS RFMA1415 -0.5W-Q7 NC NC NC RFout NC NC NC NC NC NC Vg1 NC NC NC Vg2 NC Vg1 22uF 22uF Vg2 0.1uF 0.1uF 22uF Notes: 1) External bypass capacitors should be placed as close to the package as possible. 2) Dual biasing sequence required: a. Turn-on Sequence: Apply Vg1 = -2.5V, Vg2 = -2.5V, followed by Vd1 = Vd2 = 7V, lastly increase Vg1 & Vg2 in sequence until required Id1 and Id2 is obtained. b. Turn-off Sequence: Turn off Vd1 & Vd2, followed by Vg1 & Vg2 3) Demonstration board available upon request. Specifications are subject to change without notice. Excelics Semiconductor, Inc. 310 De Guigne Drive, Sunnyvale, CA 94085 Phone: 408-737-1711 Fax: 408-737-1868 Web: www.excelics.com page 4 of 4 Revised May 2008