HANBIT HMF51232J4-120

HANBit
HMF51232J4
FLASH-ROM MODULE 2MByte (512K x 32-Bit) – 68-Pin JLCC
Part No. HMF51232J4
GENERAL DESCRIPTION
The HMF51232J4 is a high-speed flash read only memory (FROM) module containing 524,288 words organized in a x32bit
configuration. The module consists of four 512Kx 8 FROM mounted on a 68 -pin, JLCC FR4-printed circuit board.
Commands are written to the command register using standard microprocessor write timings.
Register contents serve as input to an internal state-machine, which controls the erase and programming circuitry. Write
cycles also internally latch addresses and data needed for the programming and erase operations. Reading data out of the
device is similar to reading from 12.0V flash or EPROM devices.
Four chip enable inputs, (/CE1, /CE2, /CE3, /CE4) are used to enable the module ’s 4 bytes independently. Output enable
(/OE) and write enable (/WE) can set the memory input and output.
When FROM module is disable condition, the module is becoming power standby mode, system designer can get low -power
design.
All module components may be powered from a single +5V DC power s upply and all inputs and outputs are TTL-compatible.
FEATURES
PIN ASSIGNMENT
DQ16
A18
A17
/CE4
/CE3
/CE2
/CE1
NC
Vcc
NC
NC
/OE
/WE
A16
A15
A14
DQ15
w Access time : 55,70, 90 and 120ns
w High-density 2MByte design
w High-reliability, low-power design
w Single + 5V ± 0.5V power supply
w All inputs and outputs are
TTL-compatible
w FR4-PCB design
w Low profile 68-pin JLCC
w Minimum 1,000,000 write/erase cycle
w Sector erases architecture
w Sector group protection
w Temporary sector group unprotection
OPTIONS
MARKING
w Timing
55ns access
-55
70ns access
-70
90ns access
-90
120ns access
-120
DQ17
DQ18
DQ19
Vss
DQ20
DQ21
DQ22
DQ23
Vcc
DQ24
DQ25
DQ26
DQ27
Vss
DQ28
DQ29
DQ30
10 9 8
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REV.02(August,2002)
6
5
4
3
2
1
68 67 66 65 64 63 62 61
60
59
12
58
13
57
14
56
15
55
16
54
17
53
18
52
19
51
20
50
21
49
22
48
23
47
24
46
25
45
26
44
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
w Packages
68-pin JLCC
7
11
DQ14
DQ13
DQ12
Vss
DQ11
DQ10
DQ9
DQ8
Vcc
DQ7
DQ6
DQ5
DQ4
Vss
DQ3
DQ2
DQ1
DQ31
A6
A5
A4
A3
A2
A1
A0
Vcc
A13
A12
A11
A10
A9
A8
A7
DQ0
w Easy memory expansion
68-pin JLCC
TOP VIEW
J
1
HANBit Electronics Co., Ltd.
HANBit
HMF51232J4
FUNCTIONAL BLOCK DIAGRAM
DQ0 - DQ31
A0 - A18
32
19
A0-18
/WE
DQ 0-7
U1
/OE
/CE
/CE1
A0-18
/WE
DQ 8-15
U2
/OE
/CE
/CE2
A0-18
/WE
DQ16-23
U3
/OE
/CE
/CE3
A0-18
/WE
/WE
/OE
/OE
DQ24-31
U4
/CE
/CE4
TRUTH TABLE
MODE
/CE
/OE
/WE
DQ
ADDRESSES
READ
L
L
H
DOUT
AIN
WRITE
L
H
L
DIN
AIN
CMOS STANDBY
Vcc±0.5V
X
X
HIGH-Z
X
TTL STANDBY
H
X
X
HIGH-Z
X
OUTPUT DISABLE
L
H
H
HIGH-Z
X
Note : X means don't care
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REV.02(August,2002)
2
HANBit Electronics Co., Ltd.
HANBit
HMF51232J4
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
RATING
VIN,OUT
-2.0V to +7.0V
Voltage with respect to ground Vcc
VCC
-2.0V to +7.0V
Storage Temperature
TSTG
-65oC to +125oC
Voltage with respect to ground all other pins
Operating Temperature
TA
-55oC to +125 oC
w Stresses greater than those listed under " Absolute Maximum Ratings" may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at these or any other conditions above those indicated
in the operating section of this specification is not implied. Exposure t o absolute maximum rating conditions for extended
periods may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
SYMBOL
MIN
Vcc for ±5% device Supply Voltages
VCC
4.75V
5.25V
Vcc for ± 10% device Supply Voltages
Vcc
4.5V
5.5V
Ground
VSS
0
PARAMETER
TYP.
MAX
0
0
DC AND OPERATING CHARACTERISTICS (0oC ≤ TA ≤ 70 oC ; Vcc = 5V ± 0.5V )
TEST CONDITIONS
PARAMETER
SYMBOL
MIN
MAX
UNITS
Input Leakage Current
Vcc=Vcc max, V IN= GND to Vcc
IL1
±1.0
µA
Output Leakage Current
Vcc=Vcc max, VOUT= GND to Vcc
IL0
±1.0
µA
Output High Voltage
IOH = -2.5mA, Vcc = Vcc min
VOH
Output Low Voltage
IOL = 12mA, Vcc =Vcc min
VOL
0.45
V
Vcc Active Current for Read(1)
/CE = VIL, /OE=VIH,
ICC1
12
mA
/CE = VIL, /OE=VIH
ICC2
40
mA
/CE= VIH
ICC3
1.0
mA
4.2
V
2.4
V
Vcc Active Current for Program
or Erase(2)
Vcc Standby Current
Low Vcc Lock-Out Voltage
VLKO
3.2
Notes:
1. The Icc current listed is typically less than 2mA/MHz, with /OE at V IH.
2. Icc active while embedded algorithm (program or erase) is i n progress
3. Maximum Icc current specifications are tested with Vcc=Vcc max
ERASE AND PROGRAMMING PERFORMANCE
LIMITS
PARAMETER
UNIT
MIN.
TYP.
COMMENTS
MAX.
Excludes 00H programming
Sector Erase Time
-
1
8
sec
prior to erasure
URL: www.hbe.co.kr
REV.02(August,2002)
3
HANBit Electronics Co., Ltd.
HANBit
HMF51232J4
Excludes system-level
Byte Programming Time
-
7
300
us
overhead
Excludes system-level
Chip Programming Time
-
3.6
10.8
sec
overhead
CAPACITANCE
PARAMETER
PARAMETER
SYMBOL
DESCRIPTION
CIN
TEST SETUP
TYP.
MAX
UNIT
VIN = 0
4
6
pF
VOUT = 0
8
12
pF
VIN = 0
8
12
pF
Input Capacitance
COUT
Output Capacitance
CIN2
Control Pin Capacitance
o
Notes : Test conditions TA = 25 C, f=1.0 MHz.
AC CHARACTERISTICS
u Read Only Operations Characteristics
PARAMETER
SYMBOLS
JEDEC
STANDARD
tAVAV
tRC
tAVQV
tACC
DESCRIPTION
TEST SETUP
Read Cycle Time
-55
-90
UNIT
Min
55
90
ns
Max
55
90
ns
Max
55
90
ns
/CE = V IL
Address to Output Delay
/OE = VIL
tELQV
tCE
Chip Enable to Output Delay
/OE = VIL
tGLQV
tOE
Chip Enable to Output Delay
Max
30
35
ns
tEHQZ
tDF
Chip Enable to Output High-Z
Max
18
20
ns
tGHQZ
tDF
Output Enable to Output High-Z
Max
18
20
ns
tAXQX
tQH
Min
0
0
ns
Output Hold Time From Addresses,
/CE or /OE, Whichever Occurs First
Notes : Test Conditions : Output Load : 1TTL gate and Output Load Capacitance 100 pF, in case of 55ns-30pF
Input rise and fall times : 5 ns , In case of 55ns-5ns
Input pulse levels : 0.45V to 2.4V, In case of 55ns- 0.0V-3.0V
Timing measurement reference level
Input : 0.8V, Incase of 55ns-1.5V
Output : 2.0V, In case of 55ns-1.5V
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REV.02(August,2002)
4
HANBit Electronics Co., Ltd.
HANBit
HMF51232J4
5.0V
2.7kΩ
IN3064
or Equivalent
Device
Under
Test
CL
6.2kΩ
Diodes = IN3064
or Equivalent
Note : CL = 100pF including jig capacitance
u Erase/Program Operations
PARAMETER
SYMBOLS
DESCRIPTION
-55
-90
UNIT
JEDEC
STANDARD
tAVAV
tWC
Write Cycle Time
Min
55
90
ns
tAVWL
tAS
Address Setup Time
Min
0
0
ns
tWLAX
tAH
Address Hold Time
Min
40
45
ns
tDVWH
tDS
Data Setup Time
Min
25
45
ns
tWHDX
tDH
Data Hold Time
Min
0
0
ns
tOES
Output Enable Setup Time
Min
0
0
ns
Read Recover Time Before Write
Min
0
0
ns
tGHWL
tGHWL
tELWL
tCS
/CE Setup Time
Min
0
0
ns
tWHEH
tCH
/CE Hold Time
Min
0
0
ns
tWLWH
tWP
Write Pulse Width
Min
30
45
ns
tWHWL
tWPH
Write Pulse Width High
Min
20
20
ns
tWHWH1
tWHWH1
Byte Programming Operation
Typ
7
7
µs
tWHWH2
tWHWH2
Sector Erase Operation (Note1)
Typ
1
1
sec
Vcc set up time
Min
50
50
µs
tVCS
Notes :
1. This does not include the preprogramming time
2. This timing is only for Sector Protect operations
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REV.02(August,2002)
5
HANBit Electronics Co., Ltd.
HANBit
HMF51232J4
u Erase/Program Operations
Alternate /CE Controlled Writes
PARAMETER SYMBOLS
DESCRIPTION
-55
-90
UNIT
Min
55
90
ns
Address Setup Time
Min
0
0
ns
tAH
Address Hold Time
Min
40
45
ns
tDVEH
tDS
Data Setup Time
Min
25
45
ns
tEHDX
tDH
Data Hold Time
Min
0
0
ns
tOES
Output Enable Setup Time
Min
0
0
ns
tGHEL
tGHEL
Read Recover Time Before Write
Min
0
0
ns
tWLEL
tWS
/WE Setup Time
Min
0
0
ns
tEHWH
tWH
/WE Hold Time
Min
0
0
ns
tELEH
tCP
/CE Pulse Width
Min
30
45
ns
tEHEL
tCPH
/CE Pulse Width High
Min
20
20
ns
tWHWH1
tWHWH1
Byte Programming Operation
Typ
7
7
µs
tWHWH2
tWHWH2
Sector Erase Operation (Note)
Typ
1
1
sec
JEDEC
STANDARD
tAVAV
tWC
Write Cycle Time
tAVEL
tAS
tELAX
Notes : This does not include the preprogramming time.
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REV.02(August,2002)
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HANBit Electronics Co., Ltd.
HANBit
HMF51232J4
u READ OPERATIONS TIMING
u RESET TIMING
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REV.02(August,2002)
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HANBit Electronics Co., Ltd.
HANBit
HMF51232J4
u PROGRAM OPERATIONS TIMING
u CHIP/SECTOR ERASE OPERATION TIMINGS
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REV.02(August,2002)
8
HANBit Electronics Co., Ltd.
HANBit
HMF51232J4
u DATA# POLLING TIMES(DURING EMBEDDED ALGORITHMS)
u TOGGLE# BIT TIMINGS (DURING EMBEDDED ALGORITHMS)
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REV.02(August,2002)
9
HANBit Electronics Co., Ltd.
HANBit
HMF51232J4
u SECTOR PROTECT UNPROTECT TIMEING DIAGRAM
u ALTERNATE CE# CONTROLLED WRITE OPERATING TIMINGS
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REV.02(August,2002)
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HANBit Electronics Co., Ltd.
HANBit
HMF51232J4
PACKAGE DIMENSIONS
4.30±0.20mm
24.94±0.20mm
0.46±0.20mm
23.67±0.20mm
1.278±0.20mm
ORDERING INFORMATION
Part Number
Density
Org.
Package
HMF51232J4-55
2MByte
512k×32bit
68Pin-JLCC
HMF51232J4-70
2MByte
512k×32bit
HMF51232J4-90
2MByte
HMF51232J4-120
2MByte
URL: www.hbe.co.kr
REV.02(August,2002)
Component
Vcc
SPEED
4EA
5.0V
55ns
68 Pin-JLCC
4EA
5.0V
70ns
512k×32bit
68 Pin-JLCC
4EA
5.0V
90ns
512k×32bit
68 Pin-JLCC
4EA
5.0V
120ns
11
Number
HANBit Electronics Co., Ltd.