TUSB2036 SLLS372E – MARCH 2000 – REVISED NOVEMBER 2011 www.ti.com 2/3-PORT HUB FOR THE UNIVERSAL SERIAL BUS WITH OPTIONAL SERIAL EEPROM INTERFACE Check for Samples: TUSB2036 • • • • • PACKAGE (2) TA LQFP – VF Reel of 1000 (1) (2) EXTMEM V GND DP0PUR XTAL1/CLK48 23 3 22 4 21 5 20 6 19 7 18 17 8 NP3 NPINT1 NPINT0 OCPROT/PWRSW DP3 DM3 OVRCUR3 PWRON3 9 10 11 1213 14 15 16 ORDERABLE PART NUMBER Reel of 250 0°C to 70°C 24 DP2 • • 26 25 2 PWRON2 • 32 31 3029 2827 1 OVRCUR2 DM2 • XTAL2 • VF PACKAGE (TOP VIEW) DP1 • • • Fully Compliant With the USB Specification as a Full-Speed Hub: TID #30220242 Integrated USB Transceivers 3.3-V Low Power ASIC Logic • One Upstream Port and 2−3 Programmable Downstream Ports – Total Number of Ports (2 or 3) Selected by Input Terminal – Total Number of Permanently Connected Ports Is Selected by 2 Input Terminals Two Power Source Modes – Self-Powered Mode – Bus-Powered Mode All Downstream Ports Support Full-Speed and DP0 DM0 Low-Speed Operations VCC Power Switching and Overcurrent Reporting Is RESET Provided Ganged or Per Port EECLK EEDATA/GANGED Supports Suspend and Resume Operations GND Suspend Status Terminal Available for BUSPWR External Logic Power Down Supports Custom Vendor ID and Product ID With External Serial EEPROM 3-State EEPROM Interface Allows EEPROM Sharing Push-Pull Outputs for PWRON Eliminate the Need for External Pullup Resistors Noise Filtering on OVRCUR Provides Immunity to Voltage Spikes Supports 6-MHz Operation Through a Crystal Input or a 48-MHz Input Clock ORDERING INFORMATION (1) SUSPND MODE • Output Terminal Available to Disable External Pullup Resister on DP0 for 3 ms After Reset or After Change on BUSPWR and Enable Easy Implementation of On-Board Bus/Self-Power Dynamic Switching Circuitry Available in 32-Terminal LQFP Package With a 0.8-mm Terminal Pitch (JEDEC − S-PQFP-G For Low-Profile Quad Flat Pack) PWRON1 • OVRCUR1 DM1 FEATURES 1 TOP-SIDE MARKING TUSB2036VF TUSB2036VFG4 TUSB2036VFR TUSB2036 TUSB2036VFRG4 Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2000–2011, Texas Instruments Incorporated TUSB2036 SLLS372E – MARCH 2000 – REVISED NOVEMBER 2011 www.ti.com DESCRIPTION The TUSB2036 hub is a 3.3-V CMOS device that provides up to three downstream ports in compliance with the USB 2.0 specification. Because this device is implemented with a digital state machine instead of a microcontroller, no firmware programming is required. Fully-compliant USB transceivers are integrated into the ASIC for all upstream and downstream ports. The downstream ports support both full-speed and low-speed devices by automatically setting the slew rate according to the speed of the device attached to the ports. The configuration of the BUSPWR terminal selects either the bus-powered or the self-powered mode. The introduction of the DP0 pullup resistor disable terminal, DP0PUR, makes it much easier to implement an on-board bus/self-power dynamic-switching circuitry. With the new function terminal, the end-equipment vendor can reduce the total board cost while adding additional product value. The EXTMEM (terminal 26) enables or disables the optional EEPROM interface. When EXTMEM is high, the vendor and product IDs (VID and PID) use defaults, such that the message displayed during enumeration is General Purpose USB Hub. For this configuration, terminal 6 functions as the GANGED input terminal and the EECLK (terminal 5) is unused. If custom VID and PID descriptors are desired, the EXTMEM must be tied low (EXTMEM = 0) and a SGS Thompson M93C46 EEPROM, or equivalent, stores the programmable VID, PID, and GANGED values. For this configuration, terminals 5 and 6 function as the EEPROM interface signals with terminal 5 as EECLK and terminal 6 as EEDATA, respectively. The TUSB2036 supports both bus-powered and self-powered modes. External power-management devices, such as the TPS2044, are required to control the 5-V power source switching (on/off) to the downstream ports and to detect an overcurrent condition from the downstream ports individually or ganged. Outputs from external power devices provide overcurrent inputs to the TUSB2036 OVRCUR terminals in case of an overcurrent condition, the corresponding PWRON terminals are disabled by the TUSB2036. In the ganged mode, all PWRON signals transition simultaneously, and any OVRCUR input can be used. In the nonganged mode, the PWROR outputs and OVRCUR inputs operate on a per-port basis. The TUSB2036 provides the flexibility of using either a 6-MHz or a 48-MHz clock. The logic level of the MODE terminal controls the selection of the clock source. When MODE is low, the output of the internal APLL circuitry is selected to drive the internal core of the chip. When MODE is high, the XTAL1 input is selected as the input clock source and the APLL circuitry is powered down and bypassed. The internal oscillator cell is also powered down while MODE is high. For 6-MHz operation, TUSB2036 requires a 6-MHz clock signal on XTAL1 terminal (with XTAL2 for a crystal) from which its internal APLL circuitry generates a 48-MHz internal clock to sample the data from the upstream port. For 48-MHz operation, the clock cannot be generated with a crystal, using the XTAL2 output, since the internal oscillator cell only supports the fundamental frequency. If low-power suspend and resume are desired, a passive crystal or resonator must be used, although the hub supports the flexibility of using any device that generates a 6-MHz clock. Because most oscillators cannot be stopped while power is on, their use prohibits low-power suspend, which depends on disabling the clock. When the oscillator is used, by connecting its output to the XTAL1 terminal and leaving the XTAL2 terminal open, its TTL output level can not exceed 3.6 V. If a 6-MHz oscillator is used, it must be stopped at logic low whenever SUSPND is high. For crystal or resonator implementations, the XTAL1 terminal is the input and the XTAL2 terminal is used as the feedback path. A sample crystal tuning circuit is shown in Figure 7. The hub silicon can accurately reflect the system port configuration by the NP3 and NPINT1-0 terminals. When NP3 is low, the hub is configured as a 3-port hub; when it is high, the hub is configured as a 2-port hub. The NPINT1-0 terminals tell the hub silicon how many ports have permanently attached devices, according to Table 1. 2 Submit Documentation Feedback Copyright © 2000–2011, Texas Instruments Incorporated Product Folder Link(s): TUSB2036 TUSB2036 SLLS372E – MARCH 2000 – REVISED NOVEMBER 2011 www.ti.com Table 1. System Port Configuration NPINT1-0 HUB DESCRIPTOR DEVICE REMOVABLE FIELD (7−0) PORT AVAILABILITY 00 All ports are available through external USB connectors 00000000 01 Port 1 has a permanently attached device; ports 2 and 3 are externally available 00000010 10 Ports 1 and 2 have permanently attached devices; port 3 is externally available 00000110 11 All ports have permanently attached devices NPINT1-0 NP3 high: 00000110 NP3 low: 00001110 HUB DESCRIPTOR WITH HUB CHARACTERISTICS FIELD BIT 2 COMPOUND DEVICE OR NOT 00 01, 10, 11 Hub is not part of a compound device 0 Hub is part of a compound device 1 FUNCTIONAL BLOCK DIAGRAM DP0 DM0 1 2 USB Transceiver 27 32 Suspend /Resume Logic and Frame Timer Hub Repeater SIE M 1 U X 0 30 OSC/PLL 29 31 4 26 SIE Interface Logic 6 Serial EEPROM Interface Port 1 Logic 24 Port 2 Logic 20 19 23, 22 Hub /Device Command Decoder Port 3 Logic USB Transceiver 21 8 USB Transceiver 16 15 USB Transceiver 12 Hub Power Logic 10, 14, 18 11 9, 13, 17 DP3 DM3 5 DP2 DM2 DP1 DM1 DP0PUR SUSPND XTAL1/CLK48 XTAL2 MODE RESET EXTMEM EEDATA/GANGED EECLK NP3 NPINT(1- 0) OCPROT/PWRSW BUSPWR OVRCUR1 - OVRCUR3 PWRON1 - PWRON3 Submit Documentation Feedback Copyright © 2000–2011, Texas Instruments Incorporated Product Folder Link(s): TUSB2036 3 TUSB2036 SLLS372E – MARCH 2000 – REVISED NOVEMBER 2011 www.ti.com TERMINAL FUNCTIONS TERMINAL NAME BUSPWR DM0 NO. I/O 8 I DESCRIPTION Power source indicator. BUSPWR is an active-low input that indicates whether the downstream ports source their power from the USB cable or a local power supply. For the bus-power mode, this terminal must be pulled low, and for the self-powered mode, this terminal must be pulled to 3.3 V. Input must not change dynamically during operation. 2 I/O Root port USB differential data minus. DM0 paired with DP0 constitutes the upstream USB port. 11, 15, 19 I/O USB differential data minus. DM1–DM3 paired with DP1–DP3 support up to four downstream USB ports. DP0 1 I/O Root port USB differential data plus. DP0 paired with DM0 constitutes the upstream USB port. DP0PUR 27 O Pullup resistor connection. When a system reset happens (RESET being driven to low, but not USB reset) or any logic level change on BUSPWR terminal, DP0PUR output is inactive (floating) until the internal counter reaches a 15-ms time period. After the counter expires, DP0PUR is driven to the VCC (3.3 V) level thereafter until the next system reset event occurs or there is a BUSPWR logic level change. DP1–DP3 12, 16, 20 I/O USB differential data plus. DP1–DP3 paired with DM1–DM3 support up to four downstream USB ports. EECLK 5 O EEPROM serial clock. When EXTMEM is high, the EEPROM interface is disabled. The EECLK terminal is disabled and must be left floating (unconnected). When EXTMEM is low, EECLK acts as a 3-state serial clock output to the EEPROM with a 100-μA internal pulldown. EEDATA/ GANGED 6 I/O EEPROM serial data/power-management mode indicator. When EXTMEM is high, EEDATA/GANGED selects between ganged or per-port power overcurrent detection for the downstream ports. When EXTMEM is low, EEDATA/GANGED acts as a serial data I/O for the EEPROM and is internally pulled down with a 100-μA pulldown. This standard TTL input must not change dynamically during operation. EXTMEM 26 I DM1–DM3 GND 7, 28 OCPROT/ PWRSW 21 When EXTMEM is high, the serial EEPROM interface of the device is disabled. When EXTMEM is low, terminals 5 and 6 are configured as the clock and data terminals of the serial EEPROM interface, respectively. GND terminals must be tied to ground for proper operation. I Overcurrent Protection for bus-powered hub (active low). /Power Switching for self-powered hub (active low). The terminal has a different meaning for the bus or self-powered hub. If the terminal is logic high the internal pulldown is disabled. (1) (2) OVRCUR1 − OVRCUR3 10, 14, 18 O Overcurrent input. OVRCUR1 − OVRCUR3 are active low. For per-port overcurrent detection, one overcurrent input is available for each of the three downstream ports. In the ganged mode, any OVRCUR input may be used and all OVRCUR terminals must be tied together. OVRCUR terminals are active low inputs with noise filtering logic. Each OVRCURn input is sampled every 2 ms and any input which is valid for two consecutive samples will be passed to the internal logic. OVRCUR3 has an internal pull-up that can be enabled for the 2-port operation. PWRON1 – PWRON3 9, 13, 17 O Power-on/-off control signals. PWRON1–PWRON3 are active low, push-pull outputs that enables the external power switch device. Push-pull outputs eliminate the pullup resistors which open-drain outputs require. However, the external power switches that connect to these terminals must be able to operate with 3.3-V inputs because these outputs cannot drive 5-V signals. RESET 4 I RESET is an active low TTL input with hysteresis and must be asserted at power up. When RESET is asserted, all logic is initialized. Generally, a reset with a pulse width between 100 μs and 1 ms is recommended after 3.3-V VCC reaches its 90%. Clock signal has to be active during the last 60 μs of the reset window. SUSPND 32 O Suspend status. SUSPND is an active high output available for external logic power-down operations. During the suspend mode, SUSPND is high. SUSPND is low for normal operation. MODE 31 Mode select. When MODE is low, the APLL output clock is selected as the clock source to drive the internal core of the device and 6-MHz crystal or oscillator can be used. When MODE is high, the clock on XTAL1/CLK48 is selected as the clock source and 48-MHz oscillator or other on-board clock source can be used. NP3 24 Number of ports is 3. Active low input. A logic 0 configures the system to use 3 ports. A logic 1 configures the system to use 2 ports. NPINT1−0 (1) (2) 4 22, 23 Number of ports internal to hub system, which are permanently attached (see Table 1). If the hub is implemented to be bus-powered (via BUSPWR tying to GND): (a) TUSB2036 reports to the host that the hub end-product downstream ports are power-switched (this is required by the USB 2.0 specification). Hub end-product vendor has to ensure the actual end-product implementation meets this specification requirement. (b) Terminal 21 acts as overcurrent protection (OCPROT) implementation indication terminal for the bus-powered hub. The overcurrent protection implementation is reported through the wHubCharacteristics. D4 bit in the hub descriptor. (c) When OCPROT is low, the TUSB2036 reports to the host that the hub end-product provides overcurrent protection and the wHubCharacteristics. D4 bit is set to 0. (d) When OCPROT is high, the TUSB2036 reports to the host that the hub end-product does not provide overcurrent protection and the wHubCharacteristics. D4 bit is set to 1. If the hub is implemented to be self-powered (via BUSPWR tying to 3.3-V VCC): (a) TUSB2036 reports to the host that the hub end-product provides overcurrent protection to the downstream ports (this is required by the USB 2.0 specification). Hub end-product vendor has to ensure the actual end-product implementation meets this specification requirement. (b) Terminal 21 acts as power switching (PWRSW) implementation indication terminal for the self-powered hub. The power-switching implementation is reported through the bPwrOn2PwrGood field in the hub descriptor. (c) When PWRSW is low, the TUSB2036 reports to the host that the hub end-product has port power switching at the downstream ports and the bPwrOn2PwrGood is set to 50 units (100 ms). (d) When PWRSW is high, the TUSB2036 reports to the host that the hub end-product does not have port power switching at the downstream ports and the bPwrOn2PwrGood is set to 0 units (0 ms). Submit Documentation Feedback Copyright © 2000–2011, Texas Instruments Incorporated Product Folder Link(s): TUSB2036 TUSB2036 SLLS372E – MARCH 2000 – REVISED NOVEMBER 2011 www.ti.com TERMINAL FUNCTIONS (continued) TERMINAL NAME VCC NO. I/O 3, 25 DESCRIPTION 3.3-V supply voltage XTAL1/CLK48 30 I Crystal 1/48-MHz clock input. When MODE is low, XTAL1/CLK48 is a 6-MHz crystal input with 50% duty cycle. An internal APLL generates the 48-MHz and 12-MHz clocks used internally by the ASIC logic. When MODE is high, XTAL1/CLK48 acts as the input of the 48-MHz clock and the internal APLL logic is bypassed. XTAL2 29 O Crystal 2. XTAL2 is a 6-MHz crystal output. This terminal must be left open when using an oscillator. ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) MIN MAX VCC Supply voltage range (2) –0.5 3.6 V VI Input voltage range –0.5 VCC + 0.5 V VO Output voltage range –0.5 VCC + 0.5 IIK Input clamp current VI < 0 V or VI < VCC ±20 mA IOK Output clamp current VO < 0 V or VO < VCC ±20 mA Tstg Storage temperature range –65 150 °C TA Operating free-air temperature range 0 70 °C (1) (2) UNIT V Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage levels are with respect to GND. RECOMMENDED OPERATING CONDITIONS MIN NOM MAX VCC Supply voltage PARAMETER 3 3.3 3.6 V VI Input voltage, TTL/LVCMOS (1) 0 VCC V 0 VCC V 2 VCC V 0.8 V V (2) VO Output voltage, TTL/LVCMOS VIH(REC) High-level input voltage, signal-ended receiver VIL(REC) Low-level input voltage, signal-ended receiver UNIT VIH(TTL) High-level input voltage, TTL/LVCMOS (1) 2 VCC VIL(TTL) Low-level input voltage, TTL/LVCMOS (1) 0 0.8 V TA Operating free-air temperature 0 70 °C R(DRV) External series, differential driver resistor 22 (-5%) 22 (+5%) Ω f(OPRH) Operating (dc differential driver) high speed mode 12 Mb/s f(OPRL) Operating (dc differential driver) low speed mode 1.5 Mb/s VICR Common mode, input range, differential receiver 2.5 V tt Input transition times, TTL/LVCMOS TJ Junction temperature range (3) (1) (2) (3) (1) 0.8 0 25 ns 0 115 °C Applies for input and bidirectional buffers. Applies for output and bidirectional buffers. These junction temperatures reflect simulated conditions. Absolute maximum junction temperature is 150°C. The customer is responsible for verifying junction temperature. Submit Documentation Feedback Copyright © 2000–2011, Texas Instruments Incorporated Product Folder Link(s): TUSB2036 5 TUSB2036 SLLS372E – MARCH 2000 – REVISED NOVEMBER 2011 www.ti.com ELECTRICAL CHARACTERISTICS over recommended ranges of operating free-air temperature and supply voltage (unless otherwise noted) PARAMETER TEST CONDITIONS TTL/LVCMOS VOH High-level output voltage USB data lines TTL/LVCMOS VOL Low-level output voltage USB data lines IOH = –4 mA MIN MAX VCC – 0.5 R(DRV) = 15 kΩ to GND 2.8 IOH = –12 mA (without R(DRV)) V VCC – 0.5 IOL = 4 mA 0.5 R(DRV) = 1.5 kΩ to 3.6 V 0.3 IOL = 12 mA (without R(DRV)) 0.5 TTL/LVCMOS VIT+ Positive input threshold VIT– Negative-input threshold Vhys Input hysteresis (1) (VT+ – VT–) IOZ High-impedance output current IIL IIH Single-ended UNIT V 1.8 0.8 V ≤ VICR ≤ 2.5 V V 1.8 TTL/LVCMOS 0.8 V 0.8 V ≤ VICR ≤ 2.5 V 1 0.3 0.7 Single-ended 0.8 V ≤ VICR ≤ 2.5 V 300 500 TTL/LVCMOS V = VCC or GND (2) ±10 USB data lines 0 V ≤ VO ≤ VCC ±10 Low-level input current TTL/LVCMOS VI = GND –1 μA High-level input current TTL/LVCMOS VI = VCC 1 μA z0(DRV) Driver output impedance USB data lines Static VOH or VOL 7.1 19.9 Ω VID Differential input voltage USB data lines 0.8 V ≤ VICR ≤ 2.5 V 0.2 ICC (1) (2) Single-ended TTL/LVCMOS μA V Normal operation Input supply current mV Suspend mode 40 mA 1 μA Applies for input buffers with hysteresis. Applies for open drain buffers. DIFFERENTIAL DRIVER SWITCHING CHARACTERISTICS Full Speed Mode over recommended ranges of operating free-air temperature and supply voltage, CL = 50 pF (unless otherwise noted) PARAMETER TEST CONDITIONS tr Transition rise time for DP or DM See Figure 1 and Figure 2 tf Transition fall time for DP or DM See Figure 1 and Figure 2 t(RFM) Rise/fall time matching (1) (tr/tf) × 100 VO(CRS) Signal crossover output voltage (1) (1) MIN MAX 4 20 UNIT ns 4 20 ns 90 110 % 1.3 2.0 V Characterized only. Limits are approved by design and are not production tested. DIFFERENTIAL DRIVER SWITCHING CHARACTERISTICS Low Speed Mode over recommended ranges of operating free-air temperature and supply voltage, CL = 50 pF (unless otherwise noted) PARAMETER TEST CONDITIONS (1) MIN MAX UNIT tr Transition rise time for DP or DM CL = 200 pF to 600 pF, See Figure 1 and Figure 2 75 300 ns tf Transition fall time for DP or DM (1) CL = 200 pF to 600 pF, See Figure 1 and Figure 2 75 300 ns t(RFM) Rise/fall time matching (1) (tr/tf) × 100 80 120 % CL = 200 pF to 600 pF 1.3 2.0 V VO(CRS) (1) 6 Signal crossover output voltage (1) Characterized only. Limits are approved by design and are not production tested. Submit Documentation Feedback Copyright © 2000–2011, Texas Instruments Incorporated Product Folder Link(s): TUSB2036 TUSB2036 SLLS372E – MARCH 2000 – REVISED NOVEMBER 2011 www.ti.com 22 Ω 1.5 kΩ 15 kΩ 22 Ω 15 kΩ Figure 1. Differential Driver Switching Load V ID - Diff erential Receiver Input Sensitivity - V Figure 2. Differential Driver Timing Waveforms 1.5 1.3 1 0.5 0.2 0 0 3 1 2 3.6 0.8 2.5 VICR - Common Mode Input Rang e - V 4 Figure 3. Differential Receiver Input Sensitivity vs Common Mode Input Range Vhys Logic high VCC VIH VIT+ VIT- VIL Logic low 0V Figure 4. Single-Ended Receiver Input Signal Parameter Definitions Submit Documentation Feedback Copyright © 2000–2011, Texas Instruments Incorporated Product Folder Link(s): TUSB2036 7 TUSB2036 SLLS372E – MARCH 2000 – REVISED NOVEMBER 2011 www.ti.com APPLICATION INFORMATION A major advantage of USB is the ability to connect 127 functions configured in up to 6 logical layers (tiers) to a single personal computer (see Figure 5). PC With Root Hub Monitor With 4-Port Hub (Self-Powered) Printer With 4-Port Hub (Self-Powered) Scanner Digital Scanner Figure 5. USB-Tiered Configuration Example Another advantage of USB is that all peripherals are connected using a standardized four-wire cable that provides both communication and power distribution. The power configurations are bus-powered and self-powered modes. The maximum current that may be drawn from the USB 5-V line during power up is 100 mA. For the bus-powered mode, a hub can draw a maximum of 500 mA from the 5-V line of the USB cable. A bus-powered hub must always be connected downstream to a self-powered hub unless it is the only hub connected to the PC and there are no high-powered functions connected downstream. In the self-powered mode, the hub is connected to an external power supply and can supply up to 500 mA to each downstream port. High-powered functions may draw a maximum of 500 mA from each downstream port and may only be connected downstream to self-powered hubs. Per the USB specification, in the bus-powered mode, each downstream port can provide a maximum of 100 mA of current, and in the self-powered mode, each downstream port can provide a maximum of 500 mA of current. Both bus-powered and self-powered hubs require overcurrent protection for all downstream ports. The two types of protection are individual-port management (individual-port basis) or ganged-port management (multiple-port basis). Individual-port management requires power-management devices for each individual downstream port, but adds robustness to the USB system because, in the event of an overcurrent condition, the USB host only powers down the port that has the condition. The ganged configuration uses fewer power management devices and thus has lower system costs, but in the event of an overcurrent condition on any of the downstream ports, all the ganged ports are disabled by the USB host. Using a combination of the BUSPWR and EEDATA/GANGED inputs, the TUSB2036 supports four modes of power management: bus-powered hub with either individual-port power management or ganged-port power management, and the self-powered hub with either individual-port power management or ganged-port power management. Texas Instruments supplies the complete hub solution because we offer this TUSB2036 along with the power-management devices needed to implement a fully USB compliant system. 8 Submit Documentation Feedback Copyright © 2000–2011, Texas Instruments Incorporated Product Folder Link(s): TUSB2036 TUSB2036 SLLS372E – MARCH 2000 – REVISED NOVEMBER 2011 www.ti.com USB Design Notes The following sections provide block diagram examples of how to implement the TUSB2036 device. Note, even though no resistors are shown, pullup, pulldown, and series resistors must be used to properly implement this device. Figure 6 is a block diagram example of how to connect the external EEPROM if a custom product ID and vendor ID are desired. Figure 7 is an example of how to generate the 6-MHz clock signal. Figure 8 shows the EEPROM read operation timing diagram. Figure 9, Figure 10, Figure 11, and Figure 12 illustrate how to connect the TUSB2036 device for different power source and port power-management combinations. TUSB2036 USB Hub (3-Port Configuration) 6-MHz Clock Signal XTAL1/CLK48 3, 25 29 VCC XTAL2 3.3 V 4 System Power-On Reset Bus or Local Power 5 V GND 30 RESET 26 NP3 OCPROT/ PWRSW GND Regulator 24 21 7, 28 EXTMEM 1 DP0 2 EEPROM 6 D ORG 6 8 5 VCC Q C VSS 4 5 EECLK 2 11, 15, 19 4 10, 14, 18 EEDATA 1 kΩ 4 DM1 - DM4 DM0 3 12, 16, 20 DP1 - DP3 MODE OVRCUR1 OVRCUR3 PWRON1 PWRON3 NPINT1 NPINT0 S 4 Power Switching 9, 13, 17 4 GND USB Data lines and Power to Downstream Ports Vbus 23 22 1 Figure 6. Typical Application of the TUSB2036 USB Hub CL XTAL1 XTAL2 C1 C2 NOTE: This figure assumes a 6-MHz fundamental crystal that is parallel loaded. The component values of C1, C2, and Rd are determined using a crystal from Fox Electronics – part number HC49U-6.00MHz 30\50\0±70\20, which means ±30 ppm at 25°C and ±50 ppm from 0°C to 70°C. The characteristics for the crystal include a load capacitance (CL) of 20 pF, maximum shunt capacitance (Co) of 7 pF, and the maximum ESR of 50 Ω. In order to insure enough negative resistance, use C1 = C2 = 27 pF. The resistor Rd is used to trim the gain, and Rd = 1.5 kΩ is recommended. Figure 7. Crystal Tuning Circuit Submit Documentation Feedback Copyright © 2000–2011, Texas Instruments Incorporated Product Folder Link(s): TUSB2036 9 TUSB2036 SLLS372E – MARCH 2000 – REVISED NOVEMBER 2011 www.ti.com Programming the EEPROM An SGS Thompson M93C46 EEPROM, or equivalent, stores the programmable VID and PID. When the EEPROM interface is enabled (EXTMEM = 0), the EECLK and EEDATA are internally pulled down (100 μA) inside the TUSB2036. The internal pulldowns are disabled when the EEPROM interface is disabled (EXTMEM = 1). The EEPROM is programmed with the three 16-bit locations as shown in Table 2. Connecting terminal 6 of the EEPROM high (ORG = 1) organizes the EEPROM memory into 64×16-bit words. Table 2. EEPROM Memory Map ADDRESS D15 D14 D13 D12–D8 D7–D0 00000 0 GANGED 00000 00000 00000000 00001 VID High-byte VID Low-byte 00010 PID High-byte PID Low-byte XXXXXXXX The D and Q signals of the EEPROM must be tied together using a 1-kΩ resistor with the common I/O operations forming a single-wire bus. After system power-on reset, the TUSB2036 performs a one-time access read operation from the EEPROM if the EXTMEM terminal is pulled low and the chip select(s) of the EEPROM is connected to the system power-on reset. Initially, the EEDATA terminal is driven by the TUSB2036 to send a start bit (1) which is followed by the read instruction (10) and the starting-word address (00000). Once the read instruction is received, the instruction and address are decoded by the EEPROM, which then sends the data to the output shift register. At this point, the hub stops driving the EEDATA terminal and the EEPROM starts driving. A dummy (0) bit is then output and the first three 16-bit words in the EEPROM are output with the most significant bit (MSB) first. The output data changes are triggered by the rising edge of the clock provided by the TUSB2036 on the EECLK terminal. The SGS-Thompson M936C46 EEPROM is recommended because it advances to the next memory location by automatically incrementing the address internally. Any EEPROM used must have the automatic internal address advance function. After reading the three words of data from the EEPROM, the TUSB2036 puts the EEPROM interface into a high-impedance condition (pulled down internally) to allow other logic to share the EEPROM. The EEPROM read operation is summarized in Figure 8. For more details on EEPROM operation, refer to SGS-Thompson Microelectronics M93C46 Serial Microwire Bus EEPROM data sheet. 10 Submit Documentation Feedback Copyright © 2000–2011, Texas Instruments Incorporated Product Folder Link(s): TUSB2036 D C S Start A5 Other Address Bits A1 6 Bit Address (000000) A0 Dummy Bit MSB of The First Word D15 Copyright © 2000–2011, Texas Instruments Incorporated Product Folder Link(s): TUSB2036 Other LSB of Data Bits Third Word D0 EEPROM Driving Data Line D14 48 Data Bits MSB of Fourth Word XX Don’t Care www.ti.com Hub Driving Data Line Read OP Code(10) 3-Stated With Internal Pulldown TUSB2036 SLLS372E – MARCH 2000 – REVISED NOVEMBER 2011 Figure 8. EEPROM Read Operation Timing Diagram Submit Documentation Feedback 11 TUSB2036 SLLS372E – MARCH 2000 – REVISED NOVEMBER 2011 www.ti.com Bus-Powered Hub, Ganged-Port Power Management When used in bus-powered mode, the TUSB2036 supports up to four downstream ports by controlling a TPS2041 device which is capable of supplying 100 mA of current to each downstream port. Bus-powered hubs must implement power switching to ensure current demand is held below 100 mA when the hub is hot-plugged into the system. Utilizing the TPS2041 for ganged-port power management provides overcurrent protection for the downstream ports. The SN75240 transient suppressors reduce inrush current and voltage spikes on the data lines. The OVRCUR signals must be tied together for a ganged operation. TUSB2036 3-Port Configuration With no Permanently Attached Devices. BUSPWR DP0PUR Upstream Port ¶ DP1 DP0 D+ D- DM0 SN75240† 15 kΩ 15 kΩ 0.1 mF GND A C B D DM2 3.3 V 4.7 mF VCC GND 5V 15 kΩ NPINT1 D+ NPINT0 GND D- 100 mF‡ 15 kΩ NP3 OCPROT/PWRSW 5V Ferrite Beads SN75240† DP2 3.3 V LDO § 4.7 mF D+ DM1 A C B D 5V Downstream Ports EEDATA/GANGED 1.5 kΩ DFerrite Beads GND XTAL1/CLK48 DP3 DM3 5V 15 kΩ 6-MHz Clock Signal A C B D 15 kΩ SN75240† XTAL2 MODE 3.3 V 100 mF‡ D+ TPS2041† EXTMEM PWRON1 EN DFerrite Beads IN IN PWRON2 GND 1 mF System Power-On Reset RESET 5V PWRON3 OUT OUT OUT GND OVRCUR1 100 mF‡ OC OVRCUR2 OVRCUR3 NOTES: † TPS2041 and SN75240 are Texas Instruments devices. ‡ 120 µF per hub is the minimum required per the USB specification. However, TI recommends a 100-µF, low ESR, tantalum capacitor per port for immunity to voltage droop. § LDO is a 5-V-to-3.3-V voltage regulator ¶ All USB DP, DM signal pairs require series resistors of approximately 27Ω to ensure proper termination. An optional filter capacitor of about 22 pF is recommended for EMI suppression. This capacitor, if used, must be placed between the hub terminal and the series resistor, as per section 7.1.6 of the USB specification. Figure 9. TUSB2036 Bus-Powered Hub, Ganged-Port Power-Management Application 12 Submit Documentation Feedback Copyright © 2000–2011, Texas Instruments Incorporated Product Folder Link(s): TUSB2036 TUSB2036 SLLS372E – MARCH 2000 – REVISED NOVEMBER 2011 www.ti.com Self-Powered Hub, Individual-Port Power Management In a self-powered configuration, the TUSB2036 can be implemented for individual-port power management when used with two TPS2044 because it is capable of supplying 500 mA of current to each downstream port and can provide current limiting on a per port basis. When the hub detects a fault on a downstream port, power is removed from only the port with the fault and the remaining ports continue to operate normally. Self-powered hubs are required to implement overcurrent protection and report overcurrent conditions. The SN75240 transient suppressors reduce inrush current and voltage spikes on the data lines. TUSB2036 3.3 V 1.5 k DP0PUR Upstream Port D- DM0 SN75240† 15 kΩ 0.1 mF GND 5V 100 mF‡ 15 kΩ 5V 3.3 V Downstrea m Ports 15 kΩ 4.7 mF GND SN75240† DP2 4.7 mF A C B D DM2 3.3 V LDO § 5V 15 kΩ 3.3 V A C B D D+ D- DM1 BUSPWR DP0 D+ ¶ DP1 1.5 kΩ Permanently Attached High-Speed Device VCC D+ DP3 GND D- DM3 15 kΩ MODE 15 kΩ A C B D GND SN75240† 5V 3.3 V 100 mF‡ XTAL1/CLK48 TPS2044† EEDATA/GANGED 6-MHz Clock Signal XTAL2 3.3 V EXTMEM PWRON1 EN1 PWRON2 EN2 PWRON3 EN3 EN4 NP3 D+ DOUT1 NPINT1 GND OUT2 RESET OUT4 NPINT0 OVRCUR1 OC1 IN1 OVRCUR2 OC2 IN2 OVRCUR3 OCPROT/PWRSW OC3 GND 5V OUT3 3.3 V System Power-On Reset 100 mF‡ 0.1 mF OC4 NOTES: † TPS2042 and SN75240 are Texas Instruments devices. Two TPS2042 devices can be substituted for the TPS2044. ‡ 120 µF per hub is the minimum required per the USB specification. However, TI recommends a 100-µF, low ESR, tantalum capacitor per port for immunity to voltage droop. § LDO is a 5-V-to-3.3-V voltage regulator. TPS76333 from Texas Instruments can be used. ¶ All USB DP, DM signal pairs require series resistors of approximately 27Ω to ensure proper termination. An optional filter capacitor of about 22 pF is recommended for EMI suppression. This capacitor, if used, must be placed between the hub terminal and the series resistor, as per section 7.1.6 of the USB specification. Figure 10. TUSB2036 Self-Powered Hub, Individual-Port Power-Management Application Submit Documentation Feedback Copyright © 2000–2011, Texas Instruments Incorporated Product Folder Link(s): TUSB2036 13 TUSB2036 SLLS372E – MARCH 2000 – REVISED NOVEMBER 2011 www.ti.com Self-Powered Hub, Ganged-Port Power Management The TUSB2036 can also be implemented for ganged-port power management in a self-powered configuration. The implementation is very similar to the bus-powered example with the exception that a self-powered port supplies 500 mA of current to each downstream port. The overcurrent protection can be provided by a TPS2044 quad device or a TPS2024 single power switch. TUSB2036 Upstream Port 1.5 kΩ Downstream Ports DP1 DM0 SN75240† 3.3 V ¶ DP0 D+ D- DP0PUR EEDATA/GANGED BUSPWR D+ D- DM1 15 kΩ A C B D 5V 15 kΩ 3.3 V LDO § 4.7 mF 0.1 mF GND 3.3 V 4.7 mF Ferrite Beads GND SN75240† DP2 5V A C B D 5V DM2 VCC 100 mF‡ 15 kΩ 15 kΩ GND MODE D+ DP3 D- DM3 XTAL1/CLK48 15 kΩ 15 kΩ 6-MHz Clock Signal Ferrite Beads A C B D GND SN75240† 5V XTAL2 3.3 V EXTMEM PWRON1 System Power-On Reset RESET GND 100 mF‡ TPS2044† PWRON2 EN1 EN2 PWRON3 EN3 IN1 IN2 D+ 0.1 mF EN4 DFerrite Beads GND NP3 OVRCUR1 OVRCUR2 OC1 OC2 NPINT1 OVRCUR3 OC3 NPINT0 5V 100 mF‡ OC4 OCPROT/PWRSW OUT1 OUT2 OUT3 OUT4 5 V Board Power Supply NOTES: † TPS2044, TPS2042, and SN75240 are Texas Instruments devices. The TPS2024 can be substituted for the TPS2044. ‡ 120 µF per hub is the minimum required per the USB specification. However, TI recommends a 100-µF, low ESR, tantalum capacitor per port for immunity to voltage droop. § LDO is a 5-V-to-3.3-V voltage regulator. TPS76333 from Texas Instruments can be used. ¶ All USB DP, DM signal pairs require series resistors of approximately 27Ω to ensure proper termination. An optional filter capacitor of about 22 pF is recommended for EMI suppression. This capacitor, if used, must be placed between the hub terminal and the series resistor, as per section 7.1.6 of the USB specification. Figure 11. TUSB2036 Self-Powered Hub, Ganged-Port Power-Management Application Self-Powered Hub, Individual-Port Power Management In a self-powered configuration, the TUSB2036 can be implemented for individual-port power management when 14 Submit Documentation Feedback Copyright © 2000–2011, Texas Instruments Incorporated Product Folder Link(s): TUSB2036 TUSB2036 SLLS372E – MARCH 2000 – REVISED NOVEMBER 2011 www.ti.com used with the TPS2044 because it is capable of supplying 500 mA of current to each downstream port and can provide current limiting on a per-port basis. When the hub detects a fault on a downstream port, power is removed from only the port with the fault and the remaining ports continue to operate normally. Self-powered hubs are required to implement overcurrent protection and report overcurrent conditions. The SN75240 transient suppressors reduce inrush current and voltage spikes on the data lines. TUSB2036 Downstream Ports DP0PUR Upstream Port D15 kΩ DM0 SN75240† 15 kΩ A C B D 5V D+ DM1 DP0 D+ D- ¶ DP1 1.5 kΩ DP2 4.7 mF 0.1 mF 15 kΩ 4.7 mF VCC D+ DP3 GND GND D- DM3 15 kΩ MODE 15 kΩ XTAL1/CLK48 XTAL2 System Power-On Reset BUSPWR EEDATA/GANGED 6-MHz Clock Signal 3.3 V 100 mF‡ 15 kΩ 5V 3.3 V GND SN75240† 5V DM2 3.3 V LDO § A C B D GND SN75240† 5V 100 mF‡ 3.3 V TPS2044† PWRON1 EN1 PWRON2 EN2 PWRON3 EN3 D+ D- EN4 EXTMEM NP3 OUT1 NPINT1 OUT2 NPINT0 OUT3 GND 5V OUT4 RESET GND A C B D OVRCUR1 OC1 IN1 OVRCUR2 OC2 IN2 OVRCUR3 OC3 OCPROT/PWRSW 100 mF‡ 0.1 mF OC4 5-V Board Power Supply NOTES: † TPS2042 and SN75240 are Texas Instruments devices. Two TPS2042 devices can be substituted for the TPS2044. ‡ 120 µF per hub is the minimum required per the USB specification. However, TI recommends a 100-µF, low ESR, tantalum capacitor per port for immunity to voltage droop. § LDO is a 5-V-to-3.3-V voltage regulator. TPS76333 from Texas Instruments can be used. ¶ All USB DP, DM signal pairs require series resistors of approximately 27Ω to ensure proper termination. An optional filter capacitor of about 22 pF is recommended for EMI suppression. This capacitor, if used, must be placed between the hub terminal and the series resistor, as per section 7.1.6 of the USB specification. Figure 12. TUSB2036 Self-Powered Hub, Individual-Port Power-Management Application Submit Documentation Feedback Copyright © 2000–2011, Texas Instruments Incorporated Product Folder Link(s): TUSB2036 15 PACKAGE OPTION ADDENDUM www.ti.com 9-Nov-2011 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) TUSB2036VF ACTIVE LQFP VF 32 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR TUSB2036VFG4 ACTIVE LQFP VF 32 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR TUSB2036VFR ACTIVE LQFP VF 32 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR TUSB2036VFRG4 ACTIVE LQFP VF 32 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR Samples (Requires Login) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 16-Feb-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device TUSB2036VFR Package Package Pins Type Drawing LQFP VF 32 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 1000 330.0 16.4 Pack Materials-Page 1 9.6 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 9.6 1.9 12.0 16.0 Q2 PACKAGE MATERIALS INFORMATION www.ti.com 16-Feb-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TUSB2036VFR LQFP VF 32 1000 336.6 336.6 31.8 Pack Materials-Page 2 MECHANICAL DATA MTQF002B – JANUARY 1995 – REVISED MAY 2000 VF (S-PQFP-G32) PLASTIC QUAD FLATPACK 0,45 0,25 0,80 24 0,20 M 17 25 16 32 9 0,13 NOM 1 8 5,60 TYP 7,20 SQ 6,80 9,20 SQ 8,80 Gage Plane 0,05 MIN 0,25 0°– 7° 1,45 1,35 Seating Plane 0,75 0,45 0,10 1,60 MAX 4040172/D 04/00 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. 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