Inchange Semiconductor Product Specification BD896/898/900/902 Silicon PNP Power Transistors DESCRIPTION ・With TO-220C package ・Complement to type BD895/897/899/901 ・DARLINGTON APPLICATIONS ・For use in output stages in audio equipment, general amplifier,and analogue switching applications PINNING PIN DESCRIPTION 1 Base 2 Collector;connected to mounting base 3 Emitter 导体 半 电 R O T UC Absolute maximum ratings(Ta=25℃) 固 SYMBOL PARAMETER BD896 BD898 VCBO INCH Open emitter Emitter-base voltage IC Collector current-DC IB Base current PT Total power dissipation VALUE -60 V -80 -100 BD896 -45 BD898 UNIT -45 BD902 Collector-emitter voltage VEBO OND EMIC S E G AN Collector-base voltage BD900 VCEO CONDITIONS -60 Open base V BD900 -80 BD902 -100 Open collector -5 V -8 A -300 mA TC=25℃ 70 Ta=25℃ 2 W Tj Junction temperature 150 ℃ Tstg Storage temperature -65~150 ℃ Inchange Semiconductor Product Specification BD896/898/900/902 Silicon PNP Power Transistors CHARACTERISTICS Tj=25℃ unless otherwise specified SYMBOL PARAMETER CONDITIONS BD896 V(BR)CEO VCEsat VBE Collector-emitter breakdown voltage MAX UNIT -60 IC=-100mA, IB=0 V BD900 -80 BD902 -100 Collector-emitter saturation voltage IC=-3A ,IB=-12mA -2.5 V Base-emitter on voltage IC=-3A ; VCE=-3V -2.5 V VCB=-45V, IE=0 TC=100℃ VCB=-60V, IE=0 TC=100℃ VCB=-80V, IE=0 TC=100℃ VCB=-100V, IE=0 TC=100℃ -0.2 -2.0 BD898 Collector cut-off current BD900 导体 半 电 BD902 固 ICEO TYP. -45 BD898 BD896 ICBO MIN VCE=-30V, IB=0 BD898 VCE=-30V, IB=0 BD900 G N A CH VCE=-40V, IB=0 BD902 VCE=-50V, IB=0 M E S E IN IEBO Emitter cut-off current VEB=-5V; IC=0 hFE DC current gain IC=-3A ; VCE=-3V VEC Diode forward voltage IE=-8A ton Turn-on time toff Turn-off time IC=-3A ; IB1=-IB2=-12mA VBE=3.5V;RL=10Ω;tp=20μs mA -0.2 -2.0 -0.2 -2.0 R O T UC D N O IC BD896 Collector cut-off current -0.2 -2.0 -0.5 mA -2 mA -3.5 V 750 1 μs 5 μs THERMAL CHARACTERISTICS SYMBOL Rth j-c PARAMETER Thermal resistance junction to case 2 MAX UNIT 1.79 ℃/W Inchange Semiconductor Product Specification BD896/898/900/902 Silicon PNP Power Transistors PACKAGE OUTLINE 导体 半 电 固 D N O IC R O T UC M E S GE N A H INC Fig.2 Outline dimensions 3