ISC BDV67D

Inchange Semiconductor
Product Specification
BDV67/67A/67B/67C/67D
Silicon NPN Power Transistors
DESCRIPTION
・With TO-3PN package
・Complement to type BDV66/66A/66B/66C/66D
・DARLINGTON
・High DC current gain
APPLICATIONS
・For use in audio output stages and general
amplifier and switching applications.
PINNING
PIN
DESCRIPTION
1
Base
2
Collector;connected to
mounting base
3
Emitter
Fig.1 simplified outline (TO-3PN) and symbol
Absolute maximum ratings(Tc=25℃)
SYMBOL
VCBO
VCEO
VEBO
PARAMETER
Collector-base voltage
Collector-emitter voltage
Emitter-base voltage
CONDITIONS
VALUE
BDV67
80
BDV67A
100
BDV67B
Open emitter
120
BDV67C
140
BDV67D
160
BDV67
60
BDV67A
80
BDV67B
Open base
100
BDV67C
120
BDV67D
150
Open collector
UNIT
V
V
5
V
IC
Collector current
16
A
ICM
Collector current-peak
20
A
IB
Base current
0.5
A
PC
Collector power dissipation
200
W
Tj
Junction temperature
150
℃
Tstg
Storage temperature
-65~150
℃
TC=25℃
Inchange Semiconductor
Product Specification
BDV67/67A/67B/67C/67D
Silicon NPN Power Transistors
CHARACTERISTICS
Tj=25℃ unless otherwise specified
SYMBOL
V(BR)CEO
VCEsat
PARAMETER
Collector-emitter
breakdown voltage
CONDITIONS
MIN
BDV67
60
BDV67A
80
BDV67B
IC=30mA, IB=0
TYP.
MAX
V
100
BDV67C
120
BDV67D
150
UNIT
Collector-emitter saturation voltage
IC=10A ,IB=40mA
2.0
V
VBE
Base-emitter on voltage
IC=10A ; VCE=3V
2.5
V
ICBO
Collector cut-off current
VCB=VCBOmax, IE=0
VCB=1/2VCBOmax; Tj=150℃
1.0
4.0
mA
ICEO
Collector cut-off current
VCE=1/2VCEOmax, IB=0
1
mA
IEBO
Emitter cut-off current
VEB=5V; IC=0
5
mA
hFE-1
DC current gain
IC=1A ; VCE=3V
hFE-2
DC current gain
IC=10A ; VCE=3V
hFE-3
DC current gain
IC=16A ; VCE=3V
1000
CC
Collector capacitance
IE=0 ; VCB=10V;f=1MHz
300
VF
Diode forward voltage
IE=10A
ton
Turn-on time
toff
Turn-off time
3000
1000
pF
3.0
IC = 10 A, IB1 =-IB2=40 mA
VCC = 12V
V
1.0
μs
3.5
μs
THERMAL CHARACTERISTICS
SYMBOL
Rth j-mb
PARAMETER
Thermal resistance junction to mounting base
2
MAX
UNIT
0.625
K/W
Inchange Semiconductor
Product Specification
BDV67/67A/67B/67C/67D
Silicon NPN Power Transistors
PACKAGE OUTLINE
Fig.2 Outline dimensions(unindicated tolerance:±0.1mm)
3