SDM-09120-1Y Product Description 915-960 MHz Class AB 130W Power Amplifier Sirenza Microdevices’ SDM-09120-1Y 130W power module is a robust impedance matched, single-stage, push-pull Class AB amplifier module suitable for use as a power amplifier driver or output stage. The power transistors are fabricated using Sirenza's latest, high performance LDMOS process. It is a drop-in, no-tune solution for high power applications requiring high efficiency, excellent linearity, and unit-tounit repeatability. It is internally matched to 50 ohms. Functional Block Diagram Vgs +3V DC to +5 V DC +28V DC 1 Vds1 180 o 0 o Gnd Gnd Balun Balun RFin RFout Gnd Gnd 0 Vgs 2 o 180 o +3V DC to +5 V DC +28V DC Vds 2 • • • • Key Specifications Symbol • • • • • • • 50 W RF impedance 130W Output P1dB Single Supply Operation : Nominally 28V High Gain: 15 dB at 942 MHz High Efficiency: 42% at 942 MHz ESD Protection: JEDEC Class 2 (2000V HBM) RoHS Compliant Green Package Applications Case Flange = Ground Frequency Product Features Base Station PA driver Repeater CDMA GSM / EDGE Parameter Units Min. Typ. Max. Frequency of Operation MHz 915 - 960 - P1dB Output Power at 1dB Compression, 943 MHz W 120 130 Gain 120W PEP Output Power, 942MHz and 943MHz dB 14 15 - Peak-to-Peak Gain Variation, 120W PEP, 925 - 960MHz dB - 0.3 0.5 Gain Flatness IRL Input Return Loss, 120W PEP Output Power, 925 - 960MHz dB - -14 -12 IMD 3rd Order Product. 120W PEP Output, 942MHz and 943MHz dBc - -28 -26 120W PEP Output, Change in Spacing 100KHz - 25MHz dB - 1.0 - Drain Efficiency, 120W PEP Output, 942MHz and 943MHz % 32 33 - Drain Efficiency, 120W CW Output, 943MHz % - 42 - Signal Delay from Pin 3 to Pin 8 nS - 4.0 - Deg - 0.7 - IMD Variation Efficiency Delay Phase Linearity Deviation from Linear Phase (Peak-to-Peak) T TFlange = 25ºC Test Conditions Zin = Zout = 50Ω, VDD = 28.0V, IDQ1 = IDQ2 =500mA Quality Specifications Parameter ESD Rating MTTF Description Unit Human Body Model Volts Typical 2000 200oC Channel Hours 1.2 X 106 The information provided herein is believed to be reliable at press time. Sirenza Microdevices assumes no responsibility for inaccuracies or ommisions. Sirenza Microdevices assumes no responsibility for the use of this information, and all such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. Sirenza Microdevices does not authorize or warrant any Sirenza Microdevices product for use in life-support devices and/or systems. Copyright 2005 Sirenza Microdevices, Inc. All worldwide rights reserved. 303 S. Technology Court, Broomfield, CO 80021 Phone: (800) SMI-MMIC 1 http://www.sirenza.com EDS-105407 Rev C SDM-09120-1Y 915-960 MHz 130W Power Amp Module Pin Description Pin # Function 1 VGS1 Description LDMOS FET Q1 and Q2 gate bias. VGSTH 3.0 to 5.0 VDC. See Notes 2, 3 and 4 2,4,7,9 Ground Module Topside ground. 3 RF Input Internally DC blocked 5 VGS2 LDMOS FET Q3 and Q4 gate bias. VGSTH 3.0 to 5.0 VDC. See Notes 2, 3 and 4 6 VD2 LDMOS FET Q3 and Q4 drain bias. See Note 1. 8 RF Output 10 VD1 Flange Ground Internally DC blocked LDMOS FET Q1 and Q2 drain bias. See Note 1. Baseplate provides electrical ground and a thermal transfer path for the device. Proper mounting assures optimal performance and the highest reliability. See Sirenza applications note AN-054 Detailed Installation Instructions for Power Modules. Simplified Device Schematic Q1 1 +28V DC +3V DC to +6 V DC 9 Q2 2 180 Note 1: Internal RF decoupling is included on all bias leads. No additional bypass elements are required, however some applications may require energy storage on the VD leads to accommodate modulated signals. 10 o o 0 Balun Balun 3 Q3 0 o o 180 7 4 Q4 5 Note 2: Gate voltage must be applied to VGS leads simultaneously with or after application of drain voltage to prevent potentially destructive oscillations. Bias voltages should never be applied to a module unless it is properly terminated on both input and output. 8 +28V DC +3V DC to +6 V DC Note 3: The required VGS corresponding to a specific IDQ will vary from module to module and may differ between VGS1 and VGS2 on the same module by as much as ±0.10 volts due to the normal die-to-die variation in threshold voltage for LDMOS transistors. 6 Absolute Maximum Ratings Value Unit Drain Voltage (VDD) Parameters 35 V RF Input Power +43 dBm Load Impedance for Continuous Operation Without Damage 5:1 VSWR Control (Gate) Voltage, VDD = 0 VDC 15 V Output Device Channel Temperature +200 ºC Operating Temperature Range -20 to +90 ºC Storage Temperature Range -40 to +100 ºC Operation of this device beyond any one of these limits may cause permanent damage. For reliable continuous operation see typical setup values specified in the table on page one. Note 4: The threshold voltage (VGSTH) of LDMOS transistors varies with device temperature. External temperature compensation may be required. See Sirenza application notes AN-067 LDMOS Bias Temperature Compensation. Note 5: This module was designed to have it's leads hand soldered to an adjacent PCB. The maximum soldering iron tip temperature should not exceed 700° F, and the soldering iron tip should not be in direct contact with the lead for longer than 10 seconds. Refer to app note AN054 (www.sirenza.com) for further installation instructions. Caution: ESD Sensitive Appropriate precaution in handling, packaging and testing devices must be observed. 303 S. Technology Court Broomfield, CO 80021 Phone: (800) SMI-MMIC 2 http://www.sirenza.com EDS-105407 Rev C SDM-09120-1Y 915-960 MHz 130W Power Amp Module Typical Performance Curves 2 Tone Gain, Efficiency, Linearity and IRL vs Frequency Vdd=28V, Idq=1.2A, Pout=120W PEP, Delta F=1 MHz 45 -25 -5 40 -30 35 -35 30 -40 25 -45 20 -50 15 -55 -10 40 -15 35 -20 30 -25 25 -30 20 -35 15 -40 10 10 -45 5 -50 980 0 5 900 920 940 960 -60 Gain IM3 IM7 0 25 50 CW Gain, Efficiency, IRL vs Frequency Vdd=28V, Idq=1.2A, Pout=120W 0 75 50 -5 Gain Efficiency -10 IRL 30 -15 20 -20 10 -25 920 940 960 980 -30 1000 Frequency (MHz) 303 S. Technology Court Broomfield, CO 80021 125 -65 -70 150 60 19 55 18 50 17 45 16 40 15 35 14 30 13 25 Gain Efficiency 12 11 0 900 100 CW Gain, Efficiency vs Pout Vdd=28V, Idq=1.2A, Freq=942 MHz 20 Gain (dB) 60 Input Return Loss (dB) Gain (dB), Efficiency (%) Efficiency IM5 Pout (W PEP) Frequency (MHz) 40 IMD (dBc) 45 0 IMD(dBc), IRL (dB) Gain (dB), Efficiency (%) 50 Efficiency IM5 IRL 20 15 10 10 9 5 8 0 25 50 75 100 125 Efficiency (%) Gain IM3 IM7 Gain (dB), Efficiency (%) 55 2 Tone Gain, Efficiency, Linearity vs Pout Vdd=28V, Idq=1.2A, Freq=942 MHz, Delta F=1 MHz 0 150 Pout (W) Phone: (800) SMI-MMIC 3 http://www.sirenza.com EDS-105407 Rev C SDM-09120-1Y 915-960 MHz 130W Power Amp Module Typical Performance Curves (cont’d) -25 40 -26 30 -27 Gain Efficiency 20 -28 IRL 0 Gain IRL IM5 50 Gain (dB), Efficiency (%) 50 60 -5 Efficiency IM3 IM7 -10 -15 40 -20 -25 30 -30 -35 20 -40 -45 10 -29 0 -30 10 -50 Input Return Loss (dB), IMD (dBc). -24 Input Return Loss (dB) 60 Gain (dB), Efficiency (%) Two Tone Gain, Efficiency, IRL, IMD vs Supply Voltage Pout=120W PEP, Idq=1.2A, Freq=942 MHz, Delta F=1 MHz CW Gain, Efficiency, IRL vs Supply Voltage Pout=120W, Idq=1.2A, Freq=942 MHz -55 18 20 22 24 26 28 30 0 32 -60 18 20 22 24 26 28 30 Vds (Volts) Vds (Volts) CW Gain vs Pout for various Idq Vds=28V, Freq=942 MHz IM3 vs Pout for various Idq Vds=28V, Freq=942 MHz, Delta F=1 MHz 16.5 -25 32 Idq=0.8A Idq=1.6A Idq=1.0A 16 -30 Idq=1.2A -35 Idq= 1.4A 15.5 Gain (dB) Gain (dB) Idq=1.4A Idq=1.2A 15 Idq=1.0A Idq=1.6A -40 Idq=0.8A -45 14.5 -50 14 0 20 40 60 80 100 120 140 0 20 40 60 80 100 120 140 Pout (W PEP) Pout (W) Note: Evaluation test fixture information available on Sirenza Website, referred to as SDM-EVAL 303 S. Technology Court Broomfield, CO 80021 Phone: (800) SMI-MMIC 4 http://www.sirenza.com EDS-105407 Rev C SDM-09120-1Y 915-960 MHz 130W Power Amp Module Package Outline Drawing 2.00 [50.8] 3.56 [ 3.18 ] .140 .125 (5X) 3.18 ] [ 3.56 .140 .125 1.297 [32.94] (5X) 5 LABEL LOCATION (2X) (6X) .100 [2.54] 1 10 LOGO MODULE NUMBER BAR CODE LOT NUMBER 2.00 [50.8] .055 [1.40] 2 1.274 [32.36] 1.52 1.49 37.85 ] [ 38.61 3 .907 [23.04] .637 [16.18] 4 .367 [9.32] .044 [1.12] (2X) 9 8 7 .270 [6.86] .540 [13.72] .810 [20.57] 1.080 [27.43] 1.800 [45.72] 6 5 .11 [2.9] LEAD IDENTIFICATION Lead No. 1 2 3 4 5 6 7 8 9 10 BASE PLATE .703 [17.86] .125 [3.18] (2X) .21 [5.3] Function VGS1 Ground Input Ground V GS2 V D2 Ground Output Ground V D1 Ground .005 [.13] .089 .076 .36 [9.1] 1.93 ] [ 2.26 2 MAX .062 [1.57] 1. INTERPRET DRAWING PER ANSI Y14.5. 2. MEASURE FROM THE BOTTOM OF THE LEADS. 3. DIMENSIONS ARE INCHES[MM]. 4. LEAD IDENTIFICATION IS FOR REFERENCE ONLY. 5. ORIENTATION OF LABEL IS TO BE AS SHOWN. MODULE WEIGHT = 41gm NOMINAL Note: Refer to Application note AN054, “Detailed Installation Instructions for Power Modules” for detailed mounting information. 303 S. Technology Court Broomfield, CO 80021 Phone: (800) SMI-MMIC 5 http://www.sirenza.com EDS-105407 Rev C