SIRENZA XD010-51S

Product Description
Sirenza Microdevices’ XD010-51S-D4F 15W power module is a robust 2stage Class A/AB amplifier module is a driver stage in many 900 MHz
applications. The power transistors are fabricated using Sirenza's latest,
high performance LDMOS process. This unit operates from a single voltage supply and has internal temperature compensation of the bias voltage to ensure stable performance over the full temperature range. It is a
drop-in, no-tune solution for medium power applications requiring high efficiency, excellent linearity, and unit-to-unit repeatability. It is internally
matched to 50 ohms.
XD010-51S-D4F
XD010-51S-D4FY
Pb
RoHS Compliant
& Green Package
902-928 MHz Class A/AB
15W Power Amplifier Module
Functional Block Diagram
Stage 1
Bias
Network
1
Temperature
Compensation
2
RF in
Product Features
Stage 2
4
3
VD1
VD2
RF out
Case Flange = Ground
•
•
•
•
•
•
•
•
•
Available in RoHS compliant packaging
50 W RF impedance
15W Output P1dB
Single Supply Operation : Nominally 28V
High Gain: 32 dB at 915 MHz
High Efficiency: 30% at 915 MHz
Robust 8000V ESD (HBM), Class 3B
XeMOS II LDMOS FETS
Temperature Compensation
Applications
•
•
RFID
Point to Multipoint data radio systems
Key Specifications
Symbol
Frequency
Parameter
Unit
Min.
Frequency of Operation
MHz
902
Typ.
928
P1dB
Output Power at 1dB Compression, 915MHz
W
12.5
Gain
Gain at 10W Output Power (CW)
dB
30
Peak to Peak Gain Variation at 10W (CW)
dB
IRL
Input Return Loss 10W CW
dB
14
Efficiency
Drain Efficiency at 10W CW
%
25
Linearity
3rd Order IMD at 10W PEP (Two Tone), 1MHz Spacing
dBc
-35
Signal Delay from Pin 1 to Pin 4
nS
2.5
Deviation from Linear Phase (Peak to Peak)
Deg
0.5
Thermal Resistance Stage 1 (Junction-to-Case)
ºC/W
11
ºC/W
4
Gain Flatness
Delay
Phase Linearity
RTH, j-l
Thermal Resistance Stage 2 (Junction-to-Case)
RTH, j-2
Test Conditions Zin = Zout = 50Ω, VDD = 28.0V, IDQ1 = 230 mA, IDQ2 =158 mA, TFlange = 25ºC
Max.
15
32
0.7
1.5
18
30
-30
1625-1675The information provided herein is believed to be reliable at press time. Sirenza Microdevices assumes no responsibility for inaccuracies or omissions. Sirenza Microdevices assumes no responsibility for the use of this information, and
all such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any thrid party. Sirenza Microdevices
does not authorize or warrant any Sirenza Microdevices product for use in life-support devices and/or systems. Copyright 2003 Sirenza Microdevices, Inc. All worldwide rights reserved.
303 S. Technology Court,
Broomfield, CO 80021
Phone: (800) SMI-MMIC
1
http://www.sirenza.com
EDS-105061 Rev E
XD010-51S-D4F 902-928 MHz 15W Power Amp Module
Quality Specifications
Parameter
ESD Rating
Human Body Model, JEDEC Document - JESD22-A114-B
85o
MTTF
o
C Leadframe, 200 C Channel
Unit
Typical
V
8000
Hours
1.2 X 106
Pin Description
Pin #
Function
Description
1
RF Input
Module RF input. This pin is internally connected to DC ground. Do not apply DC voltages to the RF leads. Care must be
taken to protect against video transients that may damage the active devices.
2
VD1
This is the drain voltage for the first stage. Nominally +28Vdc
3
VD2
This is the drain voltage for the 2nd stage of the amplifier module. The 2nd stage gate bias is temperature compensated to
maintain constant quiscent drain current over the operating temperature range. See Note 1.
4
RF Output
Module RF output. This pin is internally connected to DC ground. Do not apply DC voltages to the RF leads. Care must be
taken to protect against video transients that may damage the active devices.
Flange
Gnd
Exposed area on the bottom side of the package needs to be mechanically attached to the ground plane of the board for
optimum thermal and RF performance. See mounting instructions in application note AN-060 on Sirenza’s web site.
Simplified Device Schematic
2 VD1
3 VD2
Temperature
Bias
Network
Compensation
RFout
Q2
Q1
4
RFin
1
Case Flange = Ground
Absolute Maximum Ratings
Parameters
Value
Unit
1st Stage Bias Voltage (VD1 )
35
V
2nd Stage Bias Voltage (VD2)
35
V
RF Input Power
+20
dBm
Load Impedance for Continuous Operation Without Damage
5:1
VSWR
+200
ºC
Operating Temperature Range
-20 to +90
ºC
Storage Temperature Range
-40 to +100
ºC
Output Device Channel Temperature
Operation of this device beyond any one of these limits may cause permanent damage. For reliable continuous operation see typical setup values specified in the table on page one.
Caution: ESD Sensitive
Appropriate precaution in handling, packaging
and testing devices must be observed.
303 S. Technology Court
Broomfield, CO 80021
Phone: (800) SMI-MMIC
2
Note 1:
The internally generated gate voltage is thermally compensated to maintain constant quiescent current over the temperature range listed in the data sheet. No compensation is
provided for gain changes with temperature. This can only be
accomplished with AGC external to the module.
Note 2:
Internal RF decoupling is included on all bias leads. No additional bypass elements are required, however some applications may require energy storage on the drain leads to
accommodate time-varying waveforms.
Note 3:
This module was designed to have its leads hand soldered to
an adjacent PCB. The maximum soldering iron tip temperature should not exceed 700° F, and the soldering iron tip
should not be in direct contact with the lead for longer than 10
seconds. Refer to app note AN060 (www.sirenza.com) for further installation instructions.
http://www.sirenza.com
EDS-105061 Rev E
XD010-51S-D4F 902-928 MHz 15W Power Amp Module
Typical Performance Curves
2 Tone Gain, Efficiency, Linearity and IRL vs Frequency
Vdd=28V, Pout=10W PEP, Delta F=1 MHz
-20
-15
45
-25
40
-20
40
-30
35
-25
35
-35
30
-30
30
-40
25
-35
25
-45
20
-40
20
-50
15
-45
IMD(dBc), IRL (dB)
15
10
-50
10
5
-55
5
-60
950
0
0
880
890
900
910
920
930
940
-55
Gain
IM3
IM7
2
4
-65
6
8
10
12
14
16
Pout (W PEP)
CW Gain, Efficiency, IRL vs Frequency Vdd=28V, Pout=10W
40
-15
Gain
Efficiency
50
32.5
-22.5
30
-25
32
40
31.75
Gain (dB)
-20
60
32.25
-17.5
IRL
35
CW Gain, Efficiency vs Pout
Vdd=28V, Freq=915 MHz
32.5
Input Return Loss (dB)
Gain (dB), Efficiency (%)
-60
-70
0
Frequency (MHz)
37.5
Efficiency
IM5
Gain
Efficiency
31.5
30
31.25
Efficiency (%)
45
Efficiency
IM5
IRL
IMD (dBc)
50
Gain
IM3
IM7
Gain (dB), Efficiency (%)
-10
50
Gain (dB), Efficiency (%)
2 Tone Gain, Efficiency, Linearity vs Pout
Vdd=28V, Freq=915 MHz, Delta F=1 MHz
20
31
27.5
-27.5
25
880
890
900
910
920
930
940
-30
950
30.5
0
0
2
4
6
8
10
12
14
16
Pout (W)
Frequency (MHz)
303 S. Technology Court
Broomfield, CO 80021
10
30.75
Phone: (800) SMI-MMIC
3
http://www.sirenza.com
EDS-105061 Rev E
XD010-51S-D4F 902-928 MHz 15W Power Amp Module
Test Board Schematic with module connections shown
Test Board Bill of Materials
Component
Description
Manufacturer
PCB
Rogers 4350, er=3.5
Thickness=30mils
Rogers
J1, J2
SMA, RF, Panel Mount Tab W /
Flange
Johnson
J3
MTA Post Header, 6 Pin, Rectangle, Polarized, Surface
Mount
AMP
C1, C10
Cap, 10mF, 35V, 10%, Tant,
Elect, D
Kemet
C2, C20
Cap, 0.1mF, 100V, 10%, 1206
Johanson
C3, C30
Cap, 1000pF, 100V, 10%, 1206
Johanson
C25, C26
Cap, 68pF, 250V, 5%, 0603
ATC
C21, C22
Cap, 0.1mF, 100V, 10%, 0805
Panasonic
C23, C24
Cap, 1000pF, 100V, 10%, 0603
AVX
Mounting
Screws
4-40 X 0.250”
Various
Test Board Layout
To receive Gerber files, DXF drawings, a detailed BOM, and assembly recommendations for the test board with fixture, contact applications support at [email protected]. Data sheet for evaluation circuit (XD010-EVAL) available from Sirenza website.
303 S. Technology Court
Broomfield, CO 80021
Phone: (800) SMI-MMIC
4
http://www.sirenza.com
EDS-105061 Rev E
XD010-51S-D4F 902-928 MHz 15W Power Amp Module
Package Outline Drawing
Recommended PCB Cutout and Landing Pads for the D4F Package
Note 3: Dimensions are in inches
Refer to Application note AN-060 “Installation Instructions for XD Module Series” for additional mounting info. App note availbale at at www.sirenza.com
303 S. Technology Court
Broomfield, CO 80021
Phone: (800) SMI-MMIC
5
http://www.sirenza.com
EDS-105061 Rev E