SP7T Antenna Switch Module for GSM and UMTS or CDMA Dual Mode Handset CXM3517BER Description This switch is one of a range of low insertion loss, good linearity and high power MMIC antenna switch modules for GSM/UMTS or CDMA dual-mode handsets. The Sony A.S.M. contains SP7T switch, a 1.8V CMOS decoder and a dual-LPF on GSM transmit paths. The Sony GaAs junction gate pHEMT (JPHEMT) process is used for very low insertion loss and high linearity. The excellent insertion loss contributes to good sensitivity and longer talk time. * A.S.M. = Antenna Switch Module (Applications: Quad Band GSM and Single Band UMTS or CDMA Dual-Mode Handset) Features Low insertion loss: 0.80dB (Typ.) on Tx1 (GSM Low Band Tx) 0.80dB (Typ.) on Tx2 (GSM High Band Tx) 0.33dB (Typ.) on TRx (UMTS Band I) High attenuation: 30dB (Typ.) Tx1 @ 2nd Harmonic freq. 30dB (Typ.) Tx2 @ 2nd Harmonic freq. No DC blocking capacitors (Small device footprint) Small package: VQFN-22P (2.6mm × 3.4mm × 0.8mm Typ.) Low voltage operation: VDD = +2.65V CMOS control line (CTLA/CTLB/CTLC) RX paths are changeable for band assignment Lead-free and RoHS compliant Structure GaAs Junction Gate pHEMT (JPHEMT) Switch, CMOS Decoder and Dual-LPF Note on Handling - GaAs MMIC’s are ESD sensitive devices. Special handling precautions are required. Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. -1- E08405-PS CXM3517BER Block Diagram Ant ∗ Built-in CMOS decoder F14 F7 F2 F1 F3 F4 F5 F6 F9 F15 F10 LPF2 LPF1 Tx1 Tx2 Rx1 Rx2 Rx4 Rx3 TRx Tx1 GND GND Tx2 Pin Configuration 11 10 9 8 GND 12 GND 13 8 7 GND 7 6 GND 6 9 10 11 12 13 24 GND Top View VQFN-22P PKG 4 Rx4 (2.6mm × 3.4mm × 0.8mm Typ.) 4 GND 16 3 Rx3 3 ANT 17 2 Rx2 2 GND 18 1 GND 1 19 20 21 22 CTLA TRx 15 CTLB 5 CTLC 5 Rx1 VDD GND 14 14 16 23 GND 17 18 22 -2- 15 Bottom View 22 22 19 CXM3517BER Pin Description Pin No. Symbol Pin No. Symbol 1 GND 13 GND 2 Rx2 14 GND 3 Rx3 15 TRx 4 Rx4 16 GND 5 Rx1 17 ANT 6 GND 18 GND 7 GND 19 VDD 8 Tx2 (GSM1800/1900) 20 CTLC 9 GND 21 CTLB 10 GND 22 CTLA 11 Tx1 (GSM850/900) 23 GND (Bottom) 12 GND 24 GND (Bottom) Truth Table State *1 *2 Active path 1 Tx1 2 Tx2 Switch state*2 Vctl state A B C F1 F2 F3 F4 F5 F6 F7 F9 F10 F14 F15 H H L H L L L L L L H H L H H L L L H L L L L L L H L H 3 Rx1 *1 L L L L L H L L L L H L H H 4 Rx2 *1 L L H L L L H L L L H L H H 5 Rx3 *1 L H H L L L L H L L H L H H 6 Rx4 *1 L H L L L L L L H L H L H H 7 TRx H L H L L L L L L H H H L L Each RX path can be used from 869MHz to 1990MHz frequency, user can select these RX paths changeably. State “L” means a switch “OFF”, state “H” means a switch “ON”. -3- CXM3517BER Electrical Characteristics Supply Voltage Value (Ta = +25°C) Item Bias voltage (VDD) Min. Typ. Max. Unit +2.5 +2.65 +3.3 V Logic Value (Ta = +25°C) Item State Control voltage (CTL-A/B/C) Min. Typ. Max. High +1.5 +1.8 +3.3 Low 0 — +0.3 Absolute Maximum Ratings Item Ratings Bias voltage (VDD) 4.3V (Ta: +25°C) Control voltage (CTL-A/B/C) 4.3V (Ta: +25°C) Input power max. [Tx1] *1 +36.5dBm (Duty cycle: 25%) (Ta: +25°C) Input power max. [Tx2] *1 +34.5dBm (Duty cycle: 25%) (Ta: +25°C) Input power max. [TRx] *1 +32dBm (Ta: +25°C) Input power max. [Rx1, Rx2, Rx3, Rx4] *1 +13dBm (Ta: +25°C) Operating temperature range –30 to +90°C Strage temperature range –65 to +150°C *1 FR-4 (4 layers), 30mm Sqr., t = 0.8mm -4- Unit V CXM3517BER (VDD = 2.65V, Vctl = 0/1.8V, Ta: +25°C) Item Insertion loss Symbol I.L Min. Typ. Max. Ant - Tx1 Path *1 — 0.80 1.00 Ant - Tx2 *2 — 0.80 1.00 Ant - Rx1, Rx2, Rx3, Rx4 *3 — 0.65 0.80 *4 — 0.85 1.00 *5 — 0.33 0.50 *8 — 0.25 0.40 Ant - TRx Tx1 - Rx1, Rx2, Rx3, Rx4 *1 824 to 915MHz State 1 45 55 — Tx1 - TRx *1 824 to 915MHz State 1 30 40 — Tx1 - Tx2 *1 824 to 915MHz State 1 18 21 — *1 880 to 915MHz State 3/4/5/6 22 26 — State 3/4/5/6 30 40 — Tx1 - Ant Tx2 - Ant Isolation Iso 3fo 2fo Harmonic level 3fo 2fo 3fo 2fo 3fo 1760 to 1830MHz State 1 26 31 — *1 2640 to 2745MHz State 1 26 31 — *11 State 3/4/5/6 20 28 — 1710 to 1910MHz State 3/4/5/6 19 23 — Tx2 - Rx1, Rx2, Rx3, Rx4 *2 1710 to 1910MHz State 2 40 50 — Tx2 - TRx *2 1710 to 1910MHz State 2 25 30 — Tx2 - Tx1 *2 1710 to 1910MHz State 2 28 31 — *5 1920 to 2170MHz State 7 40 50 — *8 824 to 894MHz State 7 45 55 — *9 1710 to 1990MHz State 7 45 55 — *5 1920 to 2170MHz State 7 30 39 — *8 824 to 894MHz State 7 20 26 — *9 1710 to 1990MHz State 7 30 39 — *5 1920 to 2170MHz State 7 20 24 — *8 824 to 894MHz State 7 30 38 — *9 1710 to 1990MHz State 7 20 25 — TRx - Tx2 2fo 1710 to 1910MHz *1 824 to 915MHz TRx - Tx1 VSWR *10 *2 TRx - Rx1, Rx2, Rx3, Rx4 V.S.W.R. Conditions Ant - Tx1 824 to 915MHz — 1.30 Ant - Tx2 1710 to 1910MHz — 1.45 1.60 Ant - Rx1, Rx2, Rx3, Rx4, TRx 824 to 2170MHz Tx1 - Ant *1 Tx2 - Ant *2 TRx - Ant *5 TRx - Ant *8 -5- — Unit dB dB — 1.20 — –48 –36 — –48 –36 — –52 –36 — –43 –36 — –54 –36 — –53 –36 — –60 –36 — –58 –36 dBm CXM3517BER Item Inter modulation distortion Symbol Path Min. Typ. Max. — –107 –105 IMD2 TRx - Ant IMD3 TRx - Ant *7, *12 — –106 –102 1648 to 1830MHz 25 30 — 2472 to 2745MHz 25 41 — 3296 to 3660MHz 20 26 — 3420 to 3820MHz 25 30 — 5130 to 5730MHz 25 33 — Tx1 - Ant Attenuation Conditions *6, *12 ATT Tx2 - Ant Unit dBm dB Switching time Ts 90% OFF – 90% ON — 3 5 μs Control current Ictl VDD = 2.65V, Vctl = 1.8V — 5 20 μA Supply current Idd Active Mode — 0.18 0.40 mA Electrical characteristics are specified on Sony EVB and with all RF ports terminated with 50Ω. *1 *2 *3 *4 *5 *6 *7 *8 *9 *10 *11 *12 Pin on Tx1: +34dBm, 824 to 915MHz, VDD = 2.65V Pin on Tx2: +32dBm, 1710 to 1910MHz, VDD = 2.65V Pin on Ant: +10dBm, 869 to 960MHz, VDD = 2.65V Pin on Ant: +10dBm, 1805 to 1990MHz, VDD = 2.65V Pin on TRx: +26dBm, 1920 to 2170MHz, VDD = 2.65V Pin on TRx: +20dBm, 1950MHz, Pin on Ant: –15dBm, 190MHz, VDD = 2.65V Pin on TRx: +20dBm, 1950MHz, Pin on Ant: –15dBm, 1760MHz, VDD = 2.65V Pin on TRx: +26dBm, 824 to 894MHz, VDD = 2.65V Pin on TRx: +26dBm, 1710 to 1990MHz, VDD = 2.65V Pin on Tx1: +5dBm, 1710 to 1910MHz, VDD = 2.65V Pin on Tx2: +5dBm, 824 to 915MHz, VDD = 2.65V Measured with recommended circuit -6- CXM3517BER 11 GND 10 Tx2 GND Tx1 GND Recommended Circuit 9 8 12 7 GND 24 GND GND TRx GND 13 14 6 VQFN-22P PKG (2.6mm × 3.4mm × 0.8mm Typ.) 5 4 15 GND Rx1 Rx4 Top View ANT L1 GND 3 17 2 23 GND 18 20 CTLC VDD 19 1 21 Rx3 Rx2 GND 22 CTLA C1 16 CTLB GND C2 100pF Note) 1. No DC blocking capacitors are required on all RF ports. 2. DC levels of all RF ports are GND. 3. L1 (22nH) and C1 (22pF) are recommended on Ant port for ESD protection. -7- CXM3517BER Pin 1 Index (0.55) 2.6 3.4 (0.95) (φ0.5) PCB Layout Template • PKG size: 3.4mm × 2.6mm • Pin pitch: 0.4mm : Land ∗ Metal mask thickness: 110µm : Mask (Open area) : Resist (Open area) PKG line 3.8 3.4 (PKG line) 0.52 0.42 0.25 [Detailed view A] 0.72 0.62 0.4 0.3 R0.2 R0.2 C0.1 0.3 0.5 2.6 3.0 1.2 1.4 1.5 0.89 R0.05 0.2 0.05 R0.2 0.79 R0.2 0.1 0.15 0.21 0.26 0.4 A ∗ Mask corner R = 0.05mm -8- CXM3517BER Recommended PCB Design 0.55 0.25 IC (VQFN-22P package) PCB metal pattern GND via hole for LPF (Light blue) GND via hole for switch 1pin 0.58 1.00 0.80 2.31 1.45 0.09 (Unit: mm) The positions of these via holes are recommended for stable attenuation. Independent GND with via hole -9- CXM3517BER Package Outline (Unit: mm) LEAD PLATING SPECIFICATIONS ITEM - 10 - SPEC. LEAD MATERIAL COPPER ALLOY SOLDER COMPOSITION Sn-Bi Bi:1-4wt% PLATING THICKNESS 5-18µm Sony Corporation