SSM4407GM P-channel Enhancement-mode Power MOSFET PRODUCT SUMMARY BVDSS -30V R DS(ON) 14mΩ ID -10.7A DESCRIPTION The SSM4407GM acheives fast switching performance with low gate charge without a complex drive circuit. It is suitable for low voltage applications such as DC/DC converters and general load-switching circuits. The SSM4407GM is supplied in a RoHS-compliant SO-8 package, which is widely used for medium power commercial and industrial surface mount applications. Pb-free; RoHS-compliant SO-8 D D D D G SO-8 S S S ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Units VDS Drain-source voltage -30 V VGS Gate-source voltage ±25 V ID Continuous drain current, TC = 25°C -10.7 A -8.6 A -50 A TC = 70°C 1 IDM Pulsed drain current PD Total power dissipation, TC = 25°C Linear derating factor 2.5 W 0.02 W/°C TSTG Storage temperature range -55 to 150 °C TJ Operating junction temperature range -55 to 150 °C THERMAL CHARACTERISTICS Symbol RΘ JA Parameter Maximum thermal resistance, junction-ambient 3 Value Units 50 °C/W Notes: 1.Pulse width must be limited to avoid exceeding the maximum junction temperature of 150°C. 2.Pulse width <300us, duty cycle <2%. 3.Mounted on a square inch of copper pad on FR4 board ; 125°C/W when mounted on the minimum pad area required for soldering. 12/16/2005 Rev.3.01 www.SiliconStandard.com 1 of 5 SSM4407GM ELECTRICAL CHARACTERISTICS Symbol (at Tj = 25°C, unless otherwise specified) Parameter Test Conditions Min. Typ. Max. Units -60 - - V BVDSS Drain-source breakdown voltage VGS=0V, ID=-250uA ∆ BV DSS/∆ Tj Breakdown voltage temperature coefficient Reference to 25°C, ID=-1mA - -0.015 - V/°C RDS(ON) Static drain-source on-resistance2 VGS=-10V, ID=-10A - - 14 mΩ VGS=-4.5V, ID=-5A - - 25 mΩ VDS=VGS, ID=-250uA -1 - -3 V - 13 - S VGS(th) Gate threshold voltage gfs Forward transconductance VDS=-10V, ID=-10A IDSS Drain-source leakage current VDS=-30V, VGS=0V - - -1 uA VDS=-24V ,VGS=0V, Tj = 70°C - - -25 uA VGS=±25V - - ±100 nA ID=-10A - 28 45 nC nC IGSS Gate-source leakage current 2 Qg Total gate charge Qgs Gate-source charge VDS=-24V - 5.2 - Qgd Gate-drain ("Miller") charge VGS=-10V - 19.8 - nC VDS=-15V - 12 - ns 2 td(on) Turn-on delay time tr Rise time ID=-1A - 11 - ns td(off) Turn-off delay time RG=6.8Ω , VGS=-10V - 97 - ns tf Fall time RD=15Ω - 72 - ns Ciss Input capacitance VGS=0V - 1960 3200 pF Coss Output capacitance VDS=-25V 590 - pF Crss Reverse transfer capacitance f=1.0MHz - 465 - pF Min. Typ. IS=-2A, VGS=0V - - -1.2 V - Source-Drain Diode Symbol Parameter 2 Test Conditions Max. Units VSD Forward voltage trr Reverse-recovery time IS=-10A, VGS=0V, - 36 - ns Qrr Reverse-recovery charge dI/dt=100A/µs - 34 - nC Notes: 1.Pulse width must be limited to avoid exceeding the maximum junction temperature of 150°C. 2.Pulse width <300us, duty cycle <2%. 12/16/2005 Rev.3.01 www.SiliconStandard.com 2 of 5 SSM4407GM 40 T A =25 o C -10V -5.0V -4.5V -4.0V -ID , Drain Current (A) 36 T A =150 o C 36 30 24 18 V G =-3.0V 12 6 28 24 20 16 12 V G =-3.0V 8 4 0 0 0 1 2 0 3 1 1 2 2 -V DS , Drain-to-Source Voltage (V) -V DS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 1.80 25 I D =-10A I D =-10A V GS = -10V 1.60 Normalized RDS(ON) T A =25 o C 20 RDS(ON) (mΩ ) -10V -5.0V -4.5V -4.0V 32 -ID , Drain Current (A) 42 15 1.40 1.20 1.00 0.80 0.60 10 3 5 7 9 11 -50 0 50 100 150 o T j , Junction Temperature ( C) -V GS , Gate-to-Source Voltage (V) Fig 3. On-Resistance vs. Gate Voltage Fig 4. Normalized On-Resistance vs. Junction Temperature 3 100.00 10.00 2 T j =25 o C -VGS(th) (V) -IS(A) T j =150 o C 1.00 1 0.10 0.01 0 0.1 0.3 0.5 0.7 0.9 1.1 1.3 1.5 -50 0 -V SD , Source-to-Drain Voltage (V) Fig 5. Forward Characteristic of Reverse Diode 12/16/2005 Rev.3.01 50 100 T j , Junction Temperature ( 150 o C) Fig 6. Gate Threshold Voltage vs. Junction Temperature www.SiliconStandard.com 3 of 5 SSM4407GM f=1.0MH 14 10000 I D = -10A V DS = -24V -VGS , Gate to Source Voltage (V) 12 10 Ciss C (pF) 8 6 1000 Coss Crss 4 2 100 0 0 2 4 6 8 10 12 14 16 1 18 5 Q G , Total Gate Charge (nC) 9 13 17 21 25 29 -V DS , Drain-to-Source Voltage (V) Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics 1 100us 10 1ms 10ms -ID (A) 1 100ms 0.1 1s 10s DC T A =25 o C Single Pulse 0.01 Normalized Thermal Response (Rthja) 100 DUTY=0.5 0.2 0.1 0.1 0.05 0.02 0.01 0.01 PDM t Single Pulse T Duty factor = t/T Peak Tj = PDM x Rthja + T a RΘJA = 125°C/W 0.001 0.1 1 10 100 0.0001 0.001 0.01 -V DS , Drain-to-Source Voltage (V) Fig 9. Maximum Safe Operating Area 0.1 1 10 100 1000 t , Pulse Width (s) Fig 10. Effective Transient Thermal Impedance VG VDS 90% QG -4.5V QGS QGD 10% VGS td(on) tr td(off) tf Fig 11. Switching Time Waveform 12/16/2005 Rev.3.01 Charge Q Fig 12. Gate Charge Waveform www.SiliconStandard.com 4 of 5 SSM4407GM PHYSICAL DIMENSIONS D SYMBOL MIN MAX A 1.35 1.75 A1 0.10 0.25 B 0.33 0.51 C 0.19 0.25 D 4.80 5.00 E 3.80 4.00 H E e e A A1 C B L 1.27(TYP) H 5.80 6.50 L 0.38 1.27 All dimensions in millimeters. Dimensions do not include mold protrusions. PART MARKING PART NUMBER: 4407GM XXXXXX YWWSSS DATE/LOT CODE: (YWWSSS) Y = last digit of the year WW = week SSS = lot code sequence PACKING: Moisture sensitivity level MSL3 3000 pcs in antistatic tape on a 13 inch (330mm) reel packed in a moisture barrier bag (MBB). 12/16/2005 Rev.3.01 www.SiliconStandard.com 5 of 5