TMF8901B Semiconductor Si RF LDMOS Transistor Unit in mm SOT-223 □ Applications 6.5 - VHF and UHF wide band amplifier 3.0 □ Features 4 3.5 GP = 12.4 dB at VDS = 4.5 V, IDset = 200 mA, f = 470 MHz GP = 14.7 dB at VDS = 6.0 V, IDset = 200 mA, f = 470 MHz 7.0 - Power gain - Output power POUT = 32.4 dBm at VDS = 4.5 V, IDset = 200 mA, f = 470 MHz 1 POUT = 34.7 dBm at VDS = 6.0 V, IDset = 200 mA, f = 470 MHz 2 3 2.3 0.7 - Drain efficiency 4.6 ηD = 60 % (typ.) Pin Configuration □ Marking 1. Gate 4 2. Source 8901 3. Drain 4. Source 1 2 3 □ Absolute Maximum Ratings (TA = 25 ℃) Symbol Ratings Unit Drain to Source Voltage VDS 13.0 V Gate to Source Voltage VGS 4.0 V Drain Current ID 1.2 A Total Power Dissipation Ptot 5.0 W Channel Temperature Tch 150 ℃ Storage Temperature Tstg -65 ~ 150 ℃ Parameter 1 TMF8901B □ Electrical Characteristics (TA = 25 ℃) Parameter Symbol Gate to Source Leakage Current IGSS Drain to Source Leakage Current Test Conditions Min. Typ. Max. Unit VGSS = 3.0 V - - 1 ㎂ IDSS VDSS = 8.5 V, VGS = 0 V - - 10 ㎂ Threshold Voltage Vth VDS = 4.8 V, ID = 1 mA 0.8 1.0 1.4 V Transconductance Gm VDS = 4.8 V, ID = 400 mA - 700 - mS 13 - - 0.4 - V Drain to Source Breakdown Voltage BVDSS IDSS = 10 ㎂ Drain to Source On-Voltage VDSon VGS = 4 V, ID = 600 mA Power Gain Output Power - V GP f = 470 MHz, PIN = 20 dBm VDS = 4.5 V, IDset = 200 mA 11 12.4 - dB POUT f = 470 MHz, PIN = 20 dBm VDS = 4.5 V, IDset = 200 mA 31 32.4 - dBm - 600 - mA - 64 - % Operating Current Iop Drain Efficiency ηD Power Gain GP f = 470 MHz, PIN = 20 dBm VDS = 6.0 V, IDset = 200 mA 13 14.7 - dB POUT f = 470 MHz, PIN = 20 dBm VDS = 6.0 V, IDset = 200 mA 33 34.7 - dBm - 805 - mA - 61 - % Output Power Operating Current Iop Drain Efficiency ηD 2 TMF8901B □ Typical Characteristics ( TA = 25℃, unless otherwise specified) Output Power, Power Gain, Drain Efficiency vs. Input Power POUT ηD 25 50 40 GP 10 15 20 70 POUT 30 25 50 GP 20 40 10 20 10 25 5 0 5 10 15 20 10 25 Input Power, PIN (dBm) Input Power, PIN (dBm) Output Power vs. Input Power Drain Current vs. Input Power 1100 50 1000 f = 470 MHz Iidle = 200 mA f = 470 MHz Iidle = 200 mA 900 Drain Current, IDS (mA) 45 Output Power, POUT (dBm) 60 ηD 20 10 5 35 30 30 0 80 15 15 5 Output Power, POUT (dBm) Power Gain, GP (dB) 60 30 Drain Efficiency, ηD (%) 70 20 40 80 35 90 f = 470 MHz Iidle = 200 mA VDS = 6.0 V Drain Efficiency, ηD (%) f = 470 MHz Iidle = 200 mA VDS = 4.5 V 40 Output Power, POUT (dBm) Power Gain, GP (dB) 45 90 45 40 VDS = 6 V 35 30 VDS = 4.5 V 25 20 VDS = 6.0 V 800 700 600 500 VDS = 4.5 V 400 300 200 15 100 0 10 0 5 10 15 20 Input Power, PIN (dBm) 25 0 5 10 15 20 25 Input Power, PIN (dBm) 3 TMF8901B Power Gain, Drain Efficiency vs. Drain Idle Current Power Gain, GP (dB) 16 15 68 19 66 18 64 ηD 14 13 62 60 GP 250 16 62 GP 15 60 12 54 52 11 52 50 300 10 9 200 64 ηD 54 10 150 17 56 56 100 66 13 11 50 68 58 58 0 f = 470 MHz PIN = 20 dBm VDS = 6.0 V 14 12 8 70 0 50 100 150 200 250 Drain Efficiency, ηD (%) f = 470 MHz PIN = 20 dBm VDS = 4.5 V 20 Power Gain, GP (dB) 17 70 Drain Efficiency, ηD (%) 18 50 300 Drain Idle Current, Iidle (mA) Drain Idle Current, Iidle (mA) Power Gain, Drain Efficiency vs. Drain Voltage 17 Power Gain, GP (dB) 16 15 70 14 13 12 65 ηD GP 11 60 Drain Efficiency, ηD (%) 75 f = 470 MHz Iidle = 200 mA PIN = 20 dBm 10 9 55 2 3 4 5 6 7 Drain Voltage, VDS (V) 4 TMF8901B □ Test Circuit Schematic Diagram Port VGG R R1 R=6.8 kOhm C C7 C=10 nF C C5 C=10 nF L L2 L=100 nH R= C C1 C=2.2 nF MLIN TL1 Subst="MSub1" W=1.37 mm L=19 mm Port P_IN C C2 C=22 pF R R2 R=56 Ohm L L1 Model=0.4x2.0x6T EE_MOS1 TMF8901B C C8 C=100 nF Port VDD C C4 C=2.2 nF MLIN TL2 Subst="MSub1" W=1.37 mm L=8 mm Port P_OUT C C3 C=18 pF C C9 C=2.2 nF Test Board : 0.8mm FR4 glass epoxy 5