IRF9640, RF1S9640SM Data Sheet 11A, 200V, 0.500 Ohm, P-Channel Power MOSFETs These are P-Channel enhancement mode silicon-gate power field-effect transistors. They are advanced power MOSFETs designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. All of these power MOSFETs are designed for applications such as switching regulators, switching converters, motor drivers, relay drivers and as drivers for other high-power switching devices. The high input impedance allows these types to be operated directly from integrated circuits. Formerly developmental type TA17522. Ordering Information PART NUMBER PACKAGE July 1999 File Number 2284.2 Features • 11A, 200V • rDS(ON) = 0.500Ω • Single Pulse Avalanche Energy Rated • SOA is Power Dissipation Limited • Nanosecond Switching Speeds • Linear Transfer Characteristics • High Input Impedance • Related Literature - TB334, “Guidelines for Soldering Surface Mount Components to PC Boards” Symbol BRAND D IRF9640 TO-220AB IRF9640 RF1S9640SM TO-263AB RF1S9640 NOTE: When ordering, use the entire part number. Add the suffix 9A to obtain the TO-263AB variant in the tape and reel, i.e., RF1S9640SM9A. G S Packaging JEDEC TO-220AB JEDEC TO-263AB SOURCE DRAIN GATE DRAIN (FLANGE) GATE SOURCE DRAIN (FLANGE) 4-33 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 IRF9640, RF1S9640SM TC = 25oC, Unless Otherwise Specified Absolute Maximum Ratings Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDS Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating (Note 3, 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .EAS Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg IRF9640, RF1S9640SM -200 -200 -11 -7 -44 ±20 125 1 790 -55 to 150 UNITS V V A A A V W W/oC mJ oC 300 260 oC oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC Electrical Specifications TC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Drain to Source Breakdown Voltage BVDSS ID = -250µA, VGS = 0V (Figure 10) -200 - - V Gate Threshold Voltage VGS(TH) VGS = VDS, ID = -250µA -2 - -4 V VDS = Rated BVDSS, VGS = 0V - - 25 µA µA Zero Gate Voltage Drain Current IDSS VDS = 0.8 x Rated BVDSS, VGS = 0V, TC = 125oC On-State Drain Current (Note 2) ID(ON) Gate to Source Leakage Current IGSS Drain to Source On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time rDS(ON) gfs td(ON) Rise Time tr Turn-Off Delay Time td(OFF) Fall Time tf Total Gate Charge (Gate to Source + Gate to Drain) Gate to Source Charge Qg(TOT) Qgs Gate to Drain “Miller” Charge Qgd Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS Internal Drain Inductance LD - - 250 -11 - - A - - ±100 nA ID = -6A, VGS = -10V (Figures 8, 9) - 0.350 0.500 Ω VDS > ID(ON) x rDS(ON)MAX, ID = -6A (Figure 12) 4 6 - S VDD = 0.5 x Rated BVDSS, ID ≈ -11A, RG = 9.1Ω VGS = -10V (Figures 17, 18) RL = 8.4Ω for VDSS = -100V RL = 6.1Ω for VDSS = -75V MOSFET Switching Times are Essentially Independent of Operating Temperature - 18 22 ns - 45 68 ns - 75 90 ns - 29 44 ns VGS = -10V, ID = -11A, VDS = 0.8 x Rated BVDSS Ig(REF) = -1.5mA (Figures 14, 19, 20) Gate Charge is Essentially Independent of Operating Temperature - 70 90 nC - 55 - nC - 15 - nC VDS = -25V, VGS = 0V, f = 1MHz (Figure 11) - 1100 - pF - 375 - pF - 150 - pF Measured From the Contact Screw on Tab To Center of Die - 3.5 - nH - 4.5 - nH - 7.5 - nH - - 1.0 oC/W - - 62.5 oC/W VDS > ID(ON) x rDS(ON)MAX, VGS = -10V VGS = ±20V Measured From the Drain Lead, 6mm (0.25in) from Package to Center of Die Internal Source Inductance LS Measured From the Source Lead, 6mm (0.25in) from Header to Source Bonding Pad Modified MOSFET Symbol Showing the Internal Devices Inductances D LD G LS S Thermal Resistance Junction to Case RθJC Thermal Resistance Junction to Ambient RθJA 4-34 Typical Socket Mount IRF9640, RF1S9640SM Source to Drain Diode Specifications PARAMETER SYMBOL Continuous Source to Drain Current ISD Pulse Source to Drain Current (Note 3) TEST CONDITIONS MIN TYP MAX - - -11 A - - -44 A TJ = 25oC, ISD = -11A, VGS = 0V (Figure 13) - - -1.5 V TJ = 150oC, ISD = -11A, dISD/dt = 100A/µs TJ = 150oC, ISD = -11A, dISD/dt = 100A/µs - 300 - ns - 1.9 - µC Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Diode ISDM UNITS D G S Source to Drain Diode Voltage (Note 2) VSD Reverse Recovery Time trr Reverse Recovery Charge QRR NOTES: 2. Pulse Test: Pulse width ≤ 300µs, duty cycle ≤ 2%. 3. Repetitive Rating: Pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3). 4. VDD = 50V, starting TJ = 25oC, L = 9.8mH, RG = 25Ω, peak IAS = 11A. See Figures 15, 16. Typical Performance Curves Unless Otherwise Specified -15 ID, DRAIN CURRENT (A) 1.0 -10 0.8 0.6 0.4 -5 0.2 0 0 50 100 150 0 0 TC, CASE TEMPERATURE (oC) 50 100 150 TC, CASE TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE ZθJC, NORMALIZED TRANSIENT THERMAL IMPEDANCE POWER DISSIPATION MULTIPLIER 1.2 FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE 1 0.5 0.2 0.1 0.1 PDM 0.05 0.02 0.01 0.01 10-5 t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJC x RθJC + TC SINGLE PULSE 10-4 10-3 10-2 10-1 t 1, RECTANGULAR PULSE DURATION (s) FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE 4-35 1 10 IRF9640, RF1S9640SM Typical Performance Curves Unless Otherwise Specified (Continued) -100 -50 100µs -10 1ms 10ms OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) -1 100ms DC TC = 25oC PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VGS = -9V -30 VGS = -8V -20 VGS = -7V VGS = -6V -10 VGS = -5V TJ = MAX RATED SINGLE PULSE -0.1 -1 -100 VDS, DRAIN TO SOURCE VOLTAGE (V) -1000 0 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VGS = -7V -12 VGS = -6V -8 VGS = -5V ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) -50 VDS ≥ I D(ON) x rDS(ON) VGS = -8V -4 -10 -20 -30 -40 VDS, DRAIN TO SOURCE VOLTAGE (V) FIGURE 5. OUTPUT CHARACTERISTICS 100 PULSE DURATION = 80µs VGS = -10V DUTY CYCLE = 0.5% MAX VGS = -9V -16 VGS = -4V 0 -10 FIGURE 4. FORWARD BIAS SAFE OPERATING AREA -20 VGS = -10V -40 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 10µs VGS = -11V -10 125oC 25oC -1.0 -55oC VGS = -4V 0 0 -4 -2 -6 -8 -10 -0.1 -2 -4 -6 -8 VGS, GATE TO SOURCE VOLTAGE (V) 0 VDS, DRAIN TO SOURCE VOLTAGE (V) FIGURE 6. SATURATION CHARACTERISTICS NORMALIZED DRAIN TO SOURCE ON RESISTANCE rDS(ON), DRAIN TO SOURCE ON RESISTANCE (Ω) FIGURE 7. TRANSFER CHARACTERISTICS 5µs PULSE TEST 0.8 0.7 VGS = -10V 0.6 0.5 0.4 0.3 VGS = - 20V 0.2 0 0 -15 -30 -45 -60 -75 ID, DRAIN CURRENT (A) NOTE: 2.5 VGS = -10V, ID = -6A PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 2.0 1.5 1.0 0.5 0.0 -40 0 40 80 120 TJ , JUNCTION TEMPERATURE (oC) Heating effect of 5µs pulse is minimal. FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT 4-36 -10 FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE 160 IRF9640, RF1S9640SM Typical Performance Curves Unless Otherwise Specified (Continued) 2000 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS ≈ CDS + CGD ID = 250µA 1.10 1600 C, CAPACITANCE (pF) NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE 1.15 1.05 1.00 0.95 CISS 1200 800 COSS 400 0.90 CRSS 0.85 -80 -40 0 40 80 120 0 160 10 0 TJ , JUNCTION TEMPERATURE (oC) FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE -100 TJ = -55oC ISD, DRAIN CURRENT (A) gfs, TRANSCONDUCTANCE (S) 8 TJ = 25oC TJ = 125oC 6 30 40 50 FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE 10 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 20 VDS, DRAIN TO SOURCE VOLTAGE (V) 4 2 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX TJ = 150oC -10 TJ = 25oC -1.0 -0.1 0 -10 -20 -30 -40 -50 -0.6 -0.4 I D , DRAIN CURRENT (A) FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE 0 VGS, GATE TO SOURCE (V) -0.8 -1.4 -1.0 -1.2 -1.6 VSD, SOURCE TO DRAIN VOLTAGE (V) ID = -11A -5 VDS = -40V VDS = -100V -10 VDS = -160V 0 20 40 60 80 Qg(TOT), Total GATE CHARGE (nC) FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE 4-37 -1.8 IRF9640, RF1S9640SM Test Circuits and Waveforms VDS tAV L 0 VARY tP TO OBTAIN - RG REQUIRED PEAK IAS + VDD DUT 0V VDD tP VGS IAS IAS VDS tP 0.01Ω BVDSS FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS tON tOFF td(OFF) td(ON) tr 0 - DUT VGS VDS VDD 90% 90% VGS 0 + 10% 10% RL RG tf 10% 50% 50% PULSE WIDTH 90% FIGURE 18. RESISTIVE SWITCHING WAVEFORMS FIGURE 17. SWITCHING TIME TEST CIRCUIT -VDS (ISOLATED SUPPLY) CURRENT REGULATOR 0 VDS DUT 12V BATTERY 0.2µF 50kΩ 0.3µF Qgs Qg(TOT) DUT G VGS Qgd D VDD 0 S Ig(REF) IG CURRENT SAMPLING RESISTOR 0 +VDS ID CURRENT SAMPLING RESISTOR FIGURE 19. GATE CHARGE TEST CIRCUIT 4-38 Ig(REF) FIGURE 20. GATE CHARGE WAVEFORMS IRF9640, RF1S9640SM All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. 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