IRF730 Data Sheet July 1999 5.5A, 400V, 1.000 Ohm, N-Channel Power MOSFET This is an N-Channel enhancement mode silicon gate power field effect transistor. It is an advanced power MOSFET designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. All of these power MOSFETs are designed for applications such as switching regulators, switching convertors, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. Formerly developmental type TA17414. Ordering Information PART NUMBER IRF730 1580.5 Features • 5.5A, 400V • rDS(ON) = 1.000Ω • Single Pulse Avalanche Energy Rated • SOA is Power Dissipation Limited • Nanosecond Switching Speeds • Linear Transfer Characteristics • High Input Impedance • Related Literature - TB334 “Guidelines for Soldering Surface Mount Components to PC Boards” Symbol PACKAGE TO-220AB File Number BRAND D IRF730 NOTE: When ordering, use the entire part number. G S Packaging JEDEC TO-220AB SOURCE DRAIN GATE DRAIN (FLANGE) 4-232 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 IRF730 Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . EAS Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . .TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg IRF730 400 400 5.5 3.5 22 ±20 75 0.6 300 -55 to 150 UNITS V V A A A V W W/oC mJ oC 300 260 oC oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. Electrical Specifications TC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Drain to Source Breakdown Voltage BVDSS ID = 250µA, VGS = 0V (Figure 10) 400 - - V Gate Threshold Voltage VGS(TH) VDS = VGS, ID = 250µA 2.0 - 4.0 V Zero Gate Voltage Drain Current IDSS On-State Drain Current (Note 2) ID(ON) Gate to Source Leakage Current IGSS Drain to Source On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time rDS(ON) gfs td(ON) Rise Time Fall Time Total Gate Charge (Gate to Source + Gate to Drain) - 25 µA - - 250 µA VDS > ID(ON) x rDS(ON)MAX, VGS = 10V (Figure 7) 5.5 - - A - - ±100 nA - 0.800 1.000 Ω 2.9 4.4 - S VGS = ±20V ID = 3.0A, VGS = 10V (Figure 8, 9) VDS ≥ 10V, ID = 3.3A (Figure 12) VDD = 200V, ID ≈ 5.5A, RGS = 12Ω, RL = 35Ω MOSFET Switching Times are Essentially Independent of Operating Temperature - 10 17 ns 20 29 ns td(OFF) - 35 56 ns tf - 15 24 ns - 20 35 nC - 3.0 - nC - 10 - nC - 600 - pF - 150 - pF - 40 - pF - 3.5 - nH - 4.5 - nH - 7.5 - nH - - 1.67 oC/W - - 80 oC/W Qg(TOT) Gate to Source Charge Qgs Gate to Drain “Miller” Charge Qgd Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS Internal Drain Inductance - VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 125oC - tr Turn-Off Delay Time VDS = Rated BVDSS, VGS = 0V LD VGS = 10V, ID = 5.5A, VDS = 0.8 x Rated BVDSS, Ig(REF) = 1.5mA, (Figure 14) Gate Charge is Essentially Independent of Operating Temperature VDS = 25V, VGS = 0V, f = 1MHz (Figure 11) Measured From the Contact Screw on Tab to Center of Die Measured From the Drain Lead, 6mm (0.25in) From Package to Center of Die Internal Source Inductance LS Measured From the Source Lead, 6mm (0.25in) From Header to Source Bonding Pad Modified MOSFET Symbol Showing the Internal Device Inductances D LD G LS S Thermal Resistance Junction to Case RθJC Thermal Resistance Junction to Ambient RθJA 4-233 Free Air Operation IRF730 Source to Drain Diode Specifications PARAMETER SYMBOL Continuous Source to Drain Current ISD Pulse Source to Drain Current (Note 3) ISDM TEST CONDITIONS Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Rectifier D MIN TYP MAX UNITS - - 5.5 A - - 22 A G Source to Drain Diode Voltage (Note 2) VSD Reverse Recovery Time trr Reverse Recovery Charge QRR S o TJ = 25 C, ISD = 5.5A, VGS = 0V (Figure 13) TJ = 25oC, ISD = 5.5A, dISD/dt = 100A/µs TJ = 25oC, ISD = 5.5A, dISD/dt = 100A/µs - - 1.6 V 140 300 660 ns 0.93 2.1 4.3 µC NOTES: 2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%. 3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3). 4. VDD = 50V, starting TJ = 25oC, L = 17mH, RG = 25Ω, peak IAS = 5.5A. Typical Performance Curves Unless Otherwise Specified 6 ID, DRAIN CURRENT (A) 1.0 0.8 0.6 0.4 4 2 0.2 0 0 0 50 100 150 TC, CASE TEMPERATURE (oC) 25 75 50 100 125 150 TC , CASE TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE 10 ZθJC, TRANSIENT THERMAL IMPEDANCE (oC/W) POWER DISSIPATION MULTIPLIER 1.2 1 0.5 0.2 PDM 0.1 0.1 0.05 t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJC + TC 0.02 0.01 SINGLE PULSE 0.01 10-5 10-4 10-1 10-3 10-2 t1, RECTANGULAR PULSE DURATION (s) FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE 4-234 100 101 IRF730 Typical Performance Curves Unless Otherwise Specified (Continued) 10 100 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) OPERATION IN THIS AREA IS LIMITED BY rDS(ON) 10µs 10 100µs 1ms 1 10ms TC = 25oC TJ = MAX RATED SINGLE PULSE 0.1 1 VGS = 10V VGS = 6.0V 8 6 VGS = 5.5V 4 VGS = 5.0V 2 VGS = 4.5V DC 0 10 100 VDS, DRAIN TO SOURCE VOLTAGE (V) 1000 VGS = 4.0V 0 40 80 120 10 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VGS = 10V IDR, DRAIN CURRENT (A) VGS = 6.0V 8 6 VGS = 5.5V 4 VGS = 5.0V 2 1 TJ = 150oC TJ = 25oC 0.1 VDS ≥ 50V PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VGS = 4.5V VGS = 4.0V 0 0 12 6 9 3 VDS, DRAIN TO SOURCE VOLTAGE (V) 15 0.01 0 FIGURE 6. SATURATION CHARACTERISTICS 10 3.0 8 NORMALIZED DRAIN TO SOURCE ON RESISTANCE PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VGS = 10V 6 VGS = 20V 4 2 0 2 4 6 8 VGS, GATE TO SOURCE VOLTAGE (V) FIGURE 7. TRANSFER CHARACTERISTICS 10 ON RESISTANCE (Ω) 200 FIGURE 5. OUTPUT CHARACTERISTICS 10 rDS(ON), DRAIN TO SOURCE 160 VDS, DRAIN TO SOURCE VOLTAGE (V) FIGURE 4. FORWARD BIAS SAFE OPERATING AREA ID, DRAIN CURRENT (A) PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 2.4 1.8 1.2 0.6 0 0 3 6 9 ID, DRAIN CURRENT (A) 12 FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT 4-235 15 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VGS = 10V, ID = 5.5A -40 0 40 80 120 TJ , JUNCTION TEMPERATURE (oC) FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE 160 IRF730 Typical Performance Curves Unless Otherwise Specified (Continued) 1.25 1500 1.15 C, CAPACITANCE (pF) NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE ID = 250µA 1.05 0.95 1200 COSS 600 -40 0 80 40 120 0 160 FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE 1 10 VDS, DRAIN TO SOURCE VOLTAGE (V) 100 FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE 10 100 ISD, SOURCE TO DRAIN CURRENT (A) PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 8 TJ = 25oC 6 4 TJ = 150oC 2 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 10 2 4 6 ID, DRAIN CURRENT (A) 8 10 FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT 20 TJ = 25oC TJ = 150oC 1 0.1 0 VGS, GATE TO SOURCE VOLTAGE (V) gfs, TRANSCONDUCTANCE (S) CRSS 300 TJ , JUNCTION TEMPERATURE (oC) 0 CISS 900 0.85 0.75 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS ≈ CDS + CGD 0 0.4 0.8 1.2 1.6 VSD, SOURCE TO DRAIN VOLTAGE (V) FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE ID = 5.5A 16 VDS = 320V VDS = 200V VDS = 80V 12 8 4 0 0 8 16 24 32 40 Qg , GATE CHARGE (nC) FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE 4-236 2.0 IRF730 Test Circuits and Waveforms VDS BVDSS tP L VARY tP TO OBTAIN + RG REQUIRED PEAK IAS VDS IAS VDD VDD - VGS DUT tP 0V IAS 0 0.01Ω tAV FIGURE 16. UNCLAMPED ENERGY WAVEFORMS FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT tON tOFF td(ON) td(OFF) tf tr VDS RL 90% 90% + RG - VDD 10% 10% 0 90% DUT VGS VGS 0 FIGURE 18. RESISTIVE SWITCHING WAVEFORMS VDS (ISOLATED SUPPLY) CURRENT REGULATOR 0.2µF 50% PULSE WIDTH 10% FIGURE 17. SWITCHING TIME TEST CIRCUIT 12V BATTERY 50% VDD Qg(TOT) SAME TYPE AS DUT 50kΩ Qgd 0.3µF VGS Qgs D VDS DUT G 0 Ig(REF) S 0 IG CURRENT SAMPLING RESISTOR VDS ID CURRENT SAMPLING RESISTOR FIGURE 19. GATE CHARGE TEST CIRCUIT 4-237 Ig(REF) 0 FIGURE 20. GATE CHARGE WAVEFORMS IRF730 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 4-238 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029