IRFR220, IRFU220 Data Sheet 4.6A, 200V, 0.800 Ohm, N-Channel Power MOSFETs These are N-Channel enhancement mode silicon gate power field effect transistors. They are advanced power MOSFETs designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. All of these power MOSFETs are designed for applications such as switching regulators, switching convertors, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. Formerly developmental type TA9600. Ordering Information PART NUMBER July 1999 File Number 2410.2 Features • 4.6A, 200V • rDS(ON) = 0.800Ω • Single Pulse Avalanche Energy Rated • SOA is Power Dissipation Limited • Nanosecond Switching Speeds • Linear Transfer Characteristics • High Input Impedance • Related Literature - TB334 “Guidelines for Soldering Surface Mount Components to PC Boards” Symbol PACKAGE BRAND IRFR220 TO-252AA IFR220 IRFU220 TO-251AA IFU220 D G NOTE: When ordering, use the entire part number. S Packaging JEDEC TO-251AA SOURCE DRAIN GATE JEDEC TO-252AA GATE DRAIN DRAIN (FLANGE) SOURCE DRAIN (FLANGE) 4-389 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 IRFR220, IRFU220 Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specfied Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg IRFR220, IRFU220 200 200 4.6 2.9 18 ±20 50 0.4 85 -55 to 150 UNITS V V A A A V W W/oC mJ oC 300 260 oC oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. Electrical Specifications TC = 25oC, Unless Otherwise Specified MIN TYP MAX UNITS Drain to Source Breakdown Voltage PARAMETER BVDSS ID = 250µA, VGS = 0V, (Figure 10) 200 - - V Gate Threshold Voltage VGS(TH) VGS = VDS , ID = 250µA Zero Gate Voltage Drain Current On-State Drain Current (Note 2) Gate to Source Leakage Current Drain to Source On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time SYMBOL IDSS ID(ON) IGSS rDS(ON) gfs td(ON) Rise Time tr Turn-Off Delay Time td(OFF) Fall Time TEST CONDITIONS 2.0 - 4.0 V VDS = Rated BVDSS , VGS = 0V - - 25 µA VDS = 0.8 x Rated BVDSS , VGS = 0V, TJ = 125oC - - 250 µA 4.6 - - A VDS > ID(ON) x rDS(ON)MAX , VGS = 10V, (Figure 7) VGS = ±20V - - ±100 nA ID = 2.4A, VGS = 10V, (Figures 8, 9) - 0.47 0.800 Ω 1.7 2.6 - S VDD = 100V, ID ≈ 4.6A, RGS = 18Ω, RL = 18Ω, VGS = 10V MOSFET Switching Times are Essentially Independent of Operating Temperature - 8.8 13 ns - 27 41 ns - 21 32 ns - 14 21 ns VGS = 10V, ID = 4.6A, VDS = 0.8 x Rated BVDSS , Ig(REF) = 1.5mA, (Figure 14) Gate Charge is Essentially Independent of Operating Temperature - 12 18 nC - 2.3 3.4 nC - 4.5 6.8 nC VDS = 25V, VGS = 0V, f = 1MHz, (Figure 11) - 330 - pF - 120 - pF VDS ≥ 50V, ID = 2.4A, (Figure 12) tf Total Gate Charge (Gate to Source + Gate to Drain) Qg(TOT) Gate to Source Charge Qgs Gate to Drain “Miller” Charge Qgd Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS Internal Drain Inductance LD Measured From the Drain Lead, 6.0mm (0.25in) From Package to Center of Die Internal Source Inductance LS Measured From the Source Lead, 6.0mm (0.25in) From Package to Source Bonding Pad Modified MOSFET Symbol Showing the Internal Device Inductances D - 41 - pF - 4.5 - nH - 7.5 - nH - - 2.5 oC/W - - 110 oC/W LD G LS S Thermal Resistance, Junction to Case RθJC Thermal Resistance, Junction to Ambient RθJA 4-390 Typical Solder Mount IRFR220, IRFU220 Source to Drain Diode Specifications PARAMETER SYMBOL Continuous Source to Drain Current ISD Pulse Source to Drain Current (Note 3) ISDM TEST CONDITIONS Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Rectifier MIN TYP MAX UNITS - - 4.6 A - - 18 A - - 1.8 V 69 170 400 ns 0.30 0.72 1.8 µC D G S Source to Drain Diode Voltage (Note 2) VSD Reverse Recovery Time trr Reverse Recovery Charge QRR TJ = 25oC, ISD = 4.6A, VGS = 0V, (Figure 13) TJ = 25oC, ISD = 4.6A, dISD/dt = 100A/µs TJ = 25oC, ISD = 4.6A, dISD/dt = 100A/µs NOTES: 2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%. 3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3). 4. VDD = 10V, starting TJ = 25oC, L = 6.18mH, RG = 50Ω, peak IAS = 4.6A. Typical Performance Curves Unless Otherwise Specified 5 ID , DRAIN CURRENT (A) 1.0 0.8 0.6 0.4 0.2 0 4 3 2 1 0 0 50 100 150 TC , CASE TEMPERATURE (oC) 25 50 75 100 125 150 TC , CASE TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE 10 ZθJC , TRANSIENT THERMAL IMPEDANCE POWER DISSIPATION MULTIPLIER 1.2 0.5 1 0.2 PDM 0.1 0.05 0.1 t1 0.02 0.01 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJC + TC SINGLE PULSE 10-2 10-5 10-4 0.1 10-3 10-2 t1, RECTANGULAR PULSE DURATION (S) FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE 4-391 1 10 IRFR220, IRFU220 Typical Performance Curves Unless Otherwise Specified (Continued) 100 10 VGS = 10V VGS = 8V ID , DRAIN CURRENT (A) ID , DRAIN CURRENT (A) OPERATION IN THIS AREA IS LIMITED BY rDS(ON) 10µs 10 100µs 1ms 1 0.1 10ms 8 VGS = 7V 6 4 VGS = 6V 2 VGS = 5V DC TJ = MAX RATED TC = 25oC SINGLE PULSE 1 VGS = 4V 0 0 10 100 VDS , DRAIN TO SOURCE VOLTAGE (V) 20 ID , DRAIN CURRENT (A) ID , DRAIN CURRENT (A) VGS = 8V 6 VGS = 7V 4 VGS = 6V VGS = 4V 2 1 TJ = 150oC TJ = 25oC 0.1 VGS = 5V 3 4 5 10-2 0 2 VDS , DRAIN TO SOURCE VOLTAGE (V) 6 8 10 FIGURE 7. TRANSFER CHARACTERISTICS 3.0 5 NORMALIZED DRAIN TO SOURCE ON RESISTANCE PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 4 VGS = 10V 3 2 4 VGS , GATE TO SOURCE VOLTAGE (V) FIGURE 6. SATURATION CHARACTERISTICS rDS(ON) , DRAIN TO SOURCE ON RESISTANCE (S) 100 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VDS = 50V VGS = 10V 8 1 80 10 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 0 60 FIGURE 5. OUTPUT CHARACTERISTICS 10 2 40 VDS , DRAIN TO SOURCE VOLTAGE (V) FIGURE 4. FORWARD BIAS SAFE OPERATING AREA 0 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VGS = 20V 1 2.4 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VGS = 10V, ID = 2.4A 1.8 1.2 0.6 0 0 0 5 10 15 20 ID , DRAIN CURRENT (A) FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT 4-392 25 -40 0 40 80 120 TJ , JUNCTION TEMPERATURE (oC) FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE 160 IRFR220, IRFU220 Typical Performance Curves Unless Otherwise Specified (Continued) 1000 ID = 250µA 1.15 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS ≈ CDS + CGD 800 C, CAPACITANCE (pF) NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE 1.25 1.05 0.95 600 CISS 400 COSS 0.85 200 CRSS 0.75 -40 0 80 40 120 0 160 1 10 VDS , DRAIN TO SOURCE VOLTAGE (V) TJ , JUNCTION TEMPERATURE (oC) FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE ISD , SOURCE TO DRAIN CURRENT (A) PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VDS = 50V TJ = 25oC 3 TJ = 150oC 2 1 102 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 10 TJ = 25oC TJ = 150oC 1 0.1 0 0 2 4 6 8 0 10 0.3 ID , DRAIN CURRENT (A) 0.6 ID = 4.6A VDS = 160V VDS = 100V VDS = 40V 16 12 8 4 0 2 4 6 8 10 Qg(TOT) , TOTAL GATE CHARGE (nC) FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE 4-393 1.2 FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE 20 0 0.9 VSD , SOURCE TO DRAIN VOLTAGE (V) FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT VGS , GATE TO SOURCE (V) gfs , TRANSCONDUCTANCE (S) 5 4 102 1.5 IRFR220, IRFU220 Test Circuits and Waveforms VDS BVDSS L tP VARY tP TO OBTAIN + RG REQUIRED PEAK IAS VDS IAS VDD VDD - VGS DUT tP 0V IAS 0 0.01Ω tAV FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS tON tOFF td(ON) td(OFF) tf tr RL VDS 90% 90% + RG - VDD 10% 10% 0 DUT 90% VGS VGS 0 FIGURE 17. SWITCHING TIME TEST CIRCUIT 0.2µF 50% PULSE WIDTH 10% FIGURE 18. RESISTIVE SWITCHING WAVEFORMS VDS (ISOLATED SUPPLY) CURRENT REGULATOR 12V BATTERY 50% VDD Qg(TOT) SAME TYPE AS DUT 50kΩ Qgd 0.3µF VGS Qgs D VDS DUT G 0 IG(REF) S 0 IG CURRENT SAMPLING RESISTOR VDS ID CURRENT SAMPLING RESISTOR FIGURE 19. GATE CHARGE TEST CIRCUIT 4-394 IG(REF) 0 FIGURE 20. GATE CHARGE WAVEFORMS IRFR220, IRFU220 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. 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