IRFR110, IRFU110 Data Sheet 4.7A, 100V, 0.540 Ohm, N-Channel Power MOSFETs These are N-Channel enhancement mode silicon gate power field effect transistors designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. These advanced power MOSFETs are designed for use in applications such as switching regulators, switching converters, motor drivers, relay drivers and drivers for high-power bipolar switching transistors requiring high speed and low gate-drive power. These transistors can be operated directly from integrated circuits. File Number 3275.3 Features • 4.7A, 100V • rDS(ON) = 0.540Ω • Single Pulse Avalanche Energy Rated • SOA is Power Dissipation Limited • Nanosecond Switching Speeds • Linear Transfer Characteristics • High Input Impedance • 175oC Operating Temperature • Related Literature - TB334 “Guidelines for Soldering Surface Mount Components to PC Boards” Formerly developmental type TA17441. Ordering Information PART NUMBER July 1999 PACKAGE BRAND IRFU110 TO-251AA IFU110 IRFR110 TO-252AA IFR110 Symbol D NOTE: When ordering, use the entire part number. G S Packaging JEDEC TO-251AA SOURCE DRAIN GATE JEDEC TO-252AA GATE SOURCE DRAIN (FLANGE) DRAIN (FLANGE) 4-371 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999 IRFR110, IRFU110 Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain to Gate Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID Pulsed Drain Current (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Rating (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ , TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg IRFR110, IRFU110 100 100 4.7 3.3 17 ±20 30 0.2 19 -55 to 175 UNITS V V A A A V W W/oC mj oC 300 260 oC oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 150oC. Electrical Specifications TC = 25oC, Unless Otherwise Specified TEST CONDITIONS MIN TYP MAX UNITS Drain to Source Breakdown Voltage PARAMETER SYMBOL BVDSS ID = 250µA, VGS = 0V (Figure 10) 100 - - V Gate to Threshold Voltage VGS(TH) VGS = VDS, ID = 250µA 2 - 4 V VDS = Rated BVDSS , VGS = 0V - - 25 µA VDS = 0.8 x Rated BVDSS , VGS = 0V, TJ = 150oC - - 250 µA Zero Gate Voltage Drain Current On-State Drain Current IDSS ID(ON) Gate to Source Leakage Current Drain to Source On Resistance (Note 4) Forward Transconductance (Note 4) Turn-On Delay Time 4.7 - - A VGS = ±20V - - ±100 nA rDS(ON) ID = 3.3A, VGS = 10V (Figures 8, 9) - 0.41 0.540 Ω gfs VDS = 50V, IDS = 3.3A (Figure 12) IGSS td(ON) Rise Time tr Turn-Off Delay Time td(OFF) Fall Time VDS > ID(ON) x rDS(ON)MAX , VGS = 10V 1.3 2.0 - S VDD = 50V, ID ≈ 5.6A, RGS = 24Ω, RL = 9.1Ω, VGS = 10V MOSFET Switching Times are Essentially Independent of Operating Temperature - 7.6 11 ns - 24 36 ns - 14 21 ns - 14 21 ns VGS = 10V, ID ≈ 5.6A, VDS = 0.8 x Rated BVDSS , RL = 14Ω, IG(REF) = 1.5mA (Figure 14) Gate Charge is Essentially Independent of Operating Temperature - 5.2 7.7 nC - 1.5 - nC - 2.2 - nC VGS = 0V, VDS = 25V, f = 1.0MHz (Figure 11) - 180 - pF - 82 - pF - 15 - pF - 4.5 - nH - 7.5 - nH - - 5.0 oC/W - - 110 oC/W tf Total Gate Charge Qg(TOT) Gate to Source Charge Qgs Gate to Drain “Miller” Charge Qgd Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS Internal Drain Inductance LD Measured from the Drain Lead, 6mm (0.25in) from Package to Center of Die Internal Source Inductance LS Measured from The Source Lead, 6mm (0.25in) from Header to Source Bonding Pad Modified MOSFET Symbol Showing the Internal Devices Inductances D LD G LS S Junction to Case RθJC Junction to Ambient RθJA 4-372 Free Air Operation IRFR110, IRFU110 Source to Drain Diode Specifications PARAMETER SYMBOL Continuous Source to Drain Current ISD Pulse Source to Drain Current (Note 2) ISDM TEST CONDITIONS D Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Diode MIN TYP MAX UNITS - - 4.7 A - - 17 A G S Source to Drain Diode Voltage (Note 4) VSD Reverse Recovery Time Reverse Recovery Charge TJ = 25oC, ISD = 4.7A, VGS = 0V (Figure 13) - - 2.5 V trr TJ = 25oC, ISD = 5.6A, dISD/dt = 100A/µs 46 96 200 ns QRR TJ = 25oC, ISD = 5.6A, dISD/dt = 100A/µs 0.17 0.38 0.83 µC NOTES: 2. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3). 3. VDD = 25V, starting TJ = 25oC, L = 1.3mH, RG = 25Ω, peak IAS = 4.7A. 4. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%. Typical Performance Curves Unless Otherwise Specified 5 ID , DRAIN CURRENT (A) 1.0 0.8 0.6 0.4 0.2 0 4 3 2 1 0 0 25 50 75 100 125 150 25 175 50 75 100 150 125 175 TC , CASE TEMPERATURE (oC) TC , CASE TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE 10 ZθJC , TRANSIENT THERMAL IMPEDANCE POWER DISSIPATION MULTIPLIER 1.2 0.5 1 0.2 0.1 PDM 0.05 0.1 0.01 10-5 0.02 0.01 t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJC + TC SINGLE PULSE 10-4 10-3 10-2 10-1 t1 , RECTANGULAR PULSE DURATION (s) FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE 4-373 1 10 IRFR110, IRFU110 Typical Performance Curves 10 102 TC = 25oC TJ = MAX RATED SINGLE PULSE 10µs 10 VGS = 10V ID , DRAIN CURRENT (A) ID , DRAIN CURRENT (A) Unless Otherwise Specified (Continued) 100µs 1ms 1.0 10ms OPERATION IN THIS AREA LIMITED BY rDS(ON) DC 0.1 1 6 VGS = 7V 4 VGS = 6V 2 VGS = 4V 0 103 0 10 20 30 40 VDS , DRAIN TO SOURCE VOLTAGE (V) VDS , DRAIN TO SOURCE VOLTAGE (V) FIGURE 4. FORWARD BIAS SAFE OPERATING AREA 10 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 50 FIGURE 5. OUTPUT CHARACTERISTICS PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VDS ≥ 50V VGS 10V 8 ID , DRAIN CURRENT (A) ID , DRAIN CURRENT (A) 10 VGS = 8V VGS = 5V 102 10 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 8 VGS 8V 6 VGS 7V 4 VGS = 6V 2 1 TJ = 25oC TJ = 175oC 0.1 VGS 5V VGS 4V 0 0 2 4 6 8 10-2 0 10 FIGURE 6. SATURATION CHARACTERISTICS NORMALIZED DRAIN TO SOURCE ON RESISTANCE 3 2 VGS = 20V 1 0 0 4 8 12 ID , DRAIN CURRENT (A) 16 FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT 4-374 6 8 10 3.0 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VGS = 10V 4 FIGURE 7. TRANSFER CHARACTERISTICS 4 ON RESISTANCE (Ω) rDS(ON) , DRAIN TO SOURCE 5 2 VGS , GATE TO SOURCE VOLTAGE (V) VDS , DRAIN TO SOURCE VOLTAGE (V) 20 2.4 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VGS = 10V ID = 3.3A 1.8 1.2 0.5 0 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 TJ, JUNCTION TEMPERATURE (oC) FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE IRFR110, IRFU110 Typical Performance Curves Unless Otherwise Specified (Continued) 500 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS ≈ CDS + CGS ID = 250µA 1.15 400 C, CAPACITANCE (pF) NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE 1.25 1.05 0.95 300 CISS 200 COSS 0.85 100 CRSS 0.75 -60 -40 -20 0 20 40 60 0 80 100 120 140 160 180 1 10 VDS , DRAIN TO SOURCE VOLTAGE (V) TJ, JUNCTION TEMPERATURE (oC) FIGURE 10. DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE 2.0 ISD , SOURCE TO DRAIN CURRENT (A) PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VDS ≥ 50V TJ = 25oC 1.5 TJ = 175oC 1.0 0.5 102 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 10 TJ = 175oC 1.0 TJ = 25oC 0.1 0 0 2 4 6 ID , DRAIN CURRENT (A) 8 0 10 0.4 0.8 ID = 5.6A VDS = 80V VDS = 50V VDS = 20V 16 12 8 4 0 2 4 6 8 10 Qg, GATE CHARGE (nC) FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE 4-375 1.6 FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE 20 0 1.2 VSD , SOURCE TO DRAIN VOLTAGE (V) FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT VGS , GATE TO SOURCE VOLTAGE (V) gfs , TRANSCONDUCTANCE (S) 2.5 102 2.0 IRFR110, IRFU110 Test Circuits and Waveforms VDS BVDSS L tP VARY tP TO OBTAIN IAS + RG REQUIRED PEAK IAS VDS VDD VDD - VGS DUT tP 0V IAS 0 0.01Ω tAV FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS tON tOFF td(ON) td(OFF) tf tr RL VDS 90% 90% + RG - VDD 10% 10% 0 DUT 90% VGS VGS 0 FIGURE 17. SWITCHING TIME TEST CIRCUIT 0.2µF 50% PULSE WIDTH 10% FIGURE 18. RESISTIVE SWITCHING WAVEFORMS VDS (ISOLATED SUPPLY) CURRENT REGULATOR 12V BATTERY 50% VDD Qg(TOT) SAME TYPE AS DUT 50kΩ Qgd 0.3µF VGS Qgs D VDS DUT G 0 IG(REF) S 0 IG CURRENT SAMPLING RESISTOR VDS ID CURRENT SAMPLING RESISTOR FIGURE 19. GATE CHARGE TEST CIRCUIT 4-376 IG(REF) 0 FIGURE 20. GATE CHARGE WAVEFORMS IRFR110, IRFU110 All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 4-377 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029