TECHNICAL KK1207 DESCRIPTION The KK1207 is specifically designed for LED and LED DISPLAY derivers. The KK1207 have 12/9 segment output lines, 7 to 4 grid output lines, one display memory, control circuit and 3 line serial data interface. This function are all incorporated into a single chip to build a highly reliable peripheral device for a single chip microcomputer. It is very convenience to control for numeric display. KK1207’s pin assignments and application circuit are optimized for easy PCB Layout and cost saving advantages. FEATURES · CMOS Technology · Segment output line selection by command : 12 ~ 9 · Grid output line selection by command : 7 ~ 4 · Operation voltage : 5V · Low Power Consumption · 8-Step Dimming control by command · Serial Interface for Clock, Data Input, Strobe Pins · 24-pin, SOP Package APPLICATION · Segment LED display : VCR, DVD, MWO 1 TECHNICAL DATA KK KK1207 BLOCK DIAGRAM SG1 SG2 Control SG3 SG4 DIN CLK STB Serial Data Interface SG5 SG6 Display Memory SG7 Segment Driver / Grid Driver SG8 SG9 SG10/GR7 OSC Timing Generator OSC SG11/GR6 SG12/GR5 R GR4 Dimming Circuit GND GR3 GR2 GR1 VDD GND PIN CONFIGURATION OSC 1 24 GND DIN CLK STB VDD SG1 SG2 SG3 SG4 SG5 SG6 SG7 2 3 4 5 6 7 8 9 10 11 12 23 22 21 20 19 18 17 16 15 14 13 GR1 GR2 GR3 GR4 GND VDD SG12/GR5 SG11/GR6 SG10/GR7 SG9 SG8 2 TECHNICAL DATA KK KK1207 PIN DESCRIPTION Pin Name I/O Description Pin No. OSC I Oscillator Input Pin. A resistor is connected to this pin and GND. 1 DIN I Data Input Pin. This pin inputs serial data at the rising edge of the shift clock (staring from the lower bit) 2 CLK I Clock Input Pin. Rising edge trigger. 3 STB I Strobe pin for Serial Interface. The data input after the STB has fallen is processed as a command. When this pin is “HIGH”, CLK is ignored. 4 VDD - Power Supply 5,18 SG1 to SG9 O Segment Output Pins(p-channel, open drain) 6~14 SG10/GR7 to SG12/GR5 O Segment Output Pin/ Grid Output Pin (CMOS Output) 15~17 GND - Ground Pin 19,24 GR4 to GR1 O Grid Output Pins (n-channel, open drain) 20~23 3 TECHNICAL DATA KK1207 FUNCTIONAL DESCRIPTION Commands A command is the first byte (b0 to b7) inputted to KK1207 via DIN Pin after STB Pin has changed from ”HIGH” to “LOW” state. If for some reason the STB Pin is set “HIGH” while data or commands are being transmitted, the serial communication is initialized, and the data/commands being transmitted are considered invalid. COMMAND 1 : DISPLAYMODE SETTING COMMANDS KK1207 provides 4 display mode setting as shown in the diagram below: As stated earlier a command is the first one byte(b0 to b7) transmitted to KK1207 via the DIN Pin when STB is “LOW”. However, for these commands, Bit No.3 to Bit No.6(b2 to b5) are ignored, Bit No.7 & Bit No.8(b6 to b7) are given a value of “0”. The Display Mode Setting Commands determine the number of segments and grids be used (1/4 to 1/7 duty, 12 to 9 segments). When these commands are executed, the display forcibly turned off. A display command “ON” must be executed in order to resume display. If the same mode setting is selected, no command execution is take place, therefore, nothing happens. When Power is turned “ON”, the 7-Grid, 9-Segment Mode is selected. LSB MSB 0 0 - - - Don’t Care - b1 b0 Display Mode Settings : 00 : 4 Grids, 12 Segments 01 : 5 Grids, 11 Segments 10 : 6 Grids, 10 Segments 11 : 7 Grids, 9 Segments 4 TECHNICAL DATA KK1207 COMMAND 2 : DATA SETTING COMMANDS The Data Setting Commands executes the Data Write Mode for KK1207. The Data Setting Command, the bits5 and 6 (b4, b5) are ignored, bit7(b6) is given the value of “1” while bit8(b7) is given the value of “0”. Please refer to the diagram below. When power is turned ON, bit 4 to bit 1 (b3 to b0) are given the value of “0”. LSB MSB 0 1 - - Don’t Care b3 b2 b1 b0 Data Write Mode Settings : 00 : Write Data to Display Mode Address Increment Mode Settings (Display Mode): 0 : Increment Address after Data has been Written 1 : Fixes Address Mode Settings : 0 : Normal Operation Mode 1 : Test Mode 5 TECHNICAL DATA KK1207 COMMAND 3 : ADDRESS SETTING COMMANDS Address Setting Commands are used to set the address of the display memory. The address is considered valid if it has a value of “00H” to 0DH”. If the address is set to 0EH or higher, the data is ignored until a valid address is set. When power is turned ON, the address is set at “00H”. Please refer to the diagram below. LSB MSB 1 1 - - b3 b2 b1 b0 Address : 00H to 0DH Don’t Care Display Mode and RAM Address Data transmitted from an external device to KK1207 via the serial interface are stored in the Display RAM and are assigned addresses. The RAM Addresses of KK1207 are given below in 8 bit unit. SG4 SG5 SG1 SG8 SG9 SG12 00HL 00HU 01HL DIG1 02HL 02HU 03HL DIG2 04HL 04HU 05HL DIG3 06HL 06HU 07HL DIG4 08HL 08HU 09HL DIG5 0AHL 0AHU 0BHL DIG6 0CHL 0CHU 0DHL DIG7 b3 b0 b4 b7 xxHL xxHU Lower 4 bits Higher 4 bits 6 TECHNICAL DATA KK KK1207 PIN DESCRIPTION Pin Name I/O Description Pin No. OSC I Oscillator Input Pin. A resistor is connected to this pin and GND. 1 DIN I Data Input Pin. This pin inputs serial data at the rising edge of the shift clock (staring from the lower bit) 2 CLK I Clock Input Pin. Rising edge trigger. 3 STB I Strobe pin for Serial Interface. The data input after the STB has fallen is processed as a command. When this pin is “HIGH”, CLK is ignored. 4 VDD - Power Supply 5,18 SG1 to SG9 O Segment Output Pins(p-channel, open drain) 6~14 SG10/GR7 to SG12/GR5 O Segment Output Pin/ Grid Output Pin (CMOS Output) 15~17 GND - Ground Pin 19,24 GR4 to GR1 O Grid Output Pins (n-channel, open drain) 20~23 3 TECHNICAL DATA KK1207 COMMAND 3 : ADDRESS SETTING COMMANDS Address Setting Commands are used to set the address of the display memory. The address is considered valid if it has a value of “00H” to 0DH”. If the address is set to 0EH or higher, the data is ignored until a valid address is set. When power is turned ON, the address is set at “00H”. Please refer to the diagram below. LSB MSB 1 1 - - b3 b2 b1 b0 Address : 00H to 0DH Don’t Care Display Mode and RAM Address Data transmitted from an external device to KK1207 via the serial interface are stored in the Display RAM and are assigned addresses. The RAM Addresses of KK1207 are given below in 8 bit unit. SG4 SG5 SG1 SG8 SG9 SG12 00HL 00HU 01HL DIG1 02HL 02HU 03HL DIG2 04HL 04HU 05HL DIG3 06HL 06HU 07HL DIG4 08HL 08HU 09HL DIG5 0AHL 0AHU 0BHL DIG6 0CHL 0CHU 0DHL DIG7 b3 b0 b4 b7 xxHL xxHU Lower 4 bits Higher 4 bits 6 TECHNICAL DATA KK1207 SWITCHING CHARACTERISTIC WAVEFORM KK1207 Switching Characteristies Waveform is given below. fOSC OSC PWSTB STB tCLK-STB PWCLK PWCLK CLK tsetup thold DIN tTZL Gn tTLZ 90% 10% tTZH tTHZ 90% Sn 10% PW CLK (Clock Pulse Width) ≥400ns t setup (Data Setup Time) ≥ 100ns t CLK-STB (Clock - Strobe Time) ≥ 1㎲ t TZH (Rise Time) ≤ 1㎲ t TZL <1㎲ PWSTB (Strobe Pulse Width) ≥ 1㎲ thold (Data Hold Time) ≥ 100ns t THZ (Fall Time) ≤ 10㎲ fosc = Oscillation Frequency t TlZ <10㎲ 9 TECHNICAL DATA KK207 SERIAL COMMUMICATION FORMAT The following diagram shows the KK1207 serial communication format. RECEPTION (Data/Command Write) If data continues. STB DIN CLK b0 1 b1 2 b2 3 b6 7 b7 8 10 TECHNICAL DATA KK1207 APLICATIONS Display memory is updated by incrementing addresses. Please refer to the following diagram. STB CLK DIN --------------------- Command1 Command2 Command3 Data1 --------------------- Data2 Command4 Where : Command 1 : Display Mode Setting Command 2 : Data Setting Command Command 3 : Address Setting Command Data 1 to n : Transfer Display Data (14 Bytes max.) Command 4 : Display Control Command The following diagram shows the waveforms when updating specific addresses. STB DIN CLK command2 command3 Data command3 Data Where : Command 2 -- Data Setting Command Command 3 -- Address Setting Command Data -- Display Data 11 TECHNICAL DATA KK1207 RECOMMENDED SOFTWARE PROGRAMMING FLOWCHART START SET COMMAND 1 SET COMMAND 2 SET COMMAND 3 Clear Display RAM (see Note 5) INITIAL SETTING SET COMMAND 4 MAIN PROGRAM SET COMMAND 1 SET COMMAND2 MAIN LOOP SET COMMAND 3 SET COMMAND 4 END Note : 1. Command 1 : Display Mode Setting 2. Command 2 : Data Setting Commands 3. Command 3 : Address Setting Commands 4. Command 4 : Display Control Commands 5. When IC power is applied for the first time, the contents of the Display RAM are not defined : thus, it is strongly suggested that the contents of the Display RAM must be cleared during the initial setting. 12 TECHNICAL DATA KK1207 SOP 24L (300 MIL) THERMAL PERFORMANCE IN STILL AIR Junction Temperature : 100℃ Power Dissipation, Pd (mW) 1200 1000 966 IC Mounted Glass Epoxy PCB 800 600 616 400 IC Single 200 0 -25 0 25 Ambient Temperature, Ta 50 75 100 (℃) 13 TECHNICAL DATA KK1207 ABSOLUTE MAXIMUM RATINGS (Unless otherwise stated, Ta=25℃, GND=0V) Parameter Symbol Rating Units Supply Voltage VDD -0.5 to +7.0 V Logic Input Voltage VI -0.5 to VDD+0.5 V Driver Output Current/Pin IOLGR +250 mA IOHSG -50 mA ITOTAL 400 mA Maximum Driver Output Current/Total RECOMMENDED OPERATING RANGE (Unless otherwise stated, Ta= -20 to +70℃, GND=0V) Parameter Symbol Min. Typ. Max. Unit Logic Supply Voltage VDD 4.5 5 5.5 V Dynamic Current (see Note) IDDdyn . . 5 mA High-Level Input Voltage VIH 0.8VDD . VDD V Low-Level Input Voltage VIL 0 . 0.3 VDD V Note : Test Condition : Set Display Control Commands = 80H (Display Turn OFF State) 14 TECHNICAL DATA KK1207 ELECTRICAL CHARACTERISTICS (Unless otherwise stated, VDD=5V, GND=OV, Ta=25℃, Symbol Test Condition Min. Typ. Max. Unit IOHSG1 VO = VDD - 1V SG1 to SG9. SG10/GR7 to SG12/GR5 -10 -14 -30 mA IOHSG2 VO = VDD - 2V SG1 to SG9. SG10/GR 7 to SG12/GR5 -20 -25 -50 mA IOLGR VO = 0.3V GR1 TO GR4. SG10/GR7 to SG12/GR5 100 140 - mA ITOLSG VO = VDD - 1V SG1 TO SG9. SG10/GR7 to SG12/GR5 - - ±5 % VIH - 0.8VDD - - V Low-Level Input Voltage VIL - . - 0.3VDD V Oscillation Frequency fOSC R = 51KOms 350 500 650 kHz Parameter High-Level Output Current Low-Level Output Current Segment High-Level Output Current Tolerance High-Level Input Voltage 15 TECHNICAL DATA KK1207 APPLICATION CIRCUIT +5V 0.1pF 51K S1 S2 S3 S4 S5 S6 S7 GND DIN CLK STB VDD SG1 SG2 SG3 SG4 SG5 SG6 SG7 GR1 GR2 GR3 GR4 GND VDD SG12/GR5 SG11/GR6 SG10/GR7 SG9 SG8 G1 G2 G3 G4 S1 +5V S12 S11 S10 S9 S8 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 S2 S3 S4 S5 S6 S7 S8 4-GRID X 12-SEGMENT (COMMON CAHODE) MCU OSC G1 DIGIT1 G2 DIGIT2 G3 DIGIT3 G4 DIGIT4 SEG8 S9 SEG9 S10 SEG10 S11 SEG11 S12 SEG12 Note : The capacitor (0.1uF) connected between the GND and VDD Pins must be located as near as possible to the KK1207 chip. COMMON CATHODE TYPE LED PANEL SEG1 SEG2 a COM/ DIGITAL(GRID) b a c SEG3 SEG4 SEG5 SEG6 SEG7 SEG8 d b f g e f c e g d h h 16 KK1207 Package Dimensions(24SOP) D SUFFIX SOIC (MS - 013AD) Dimension, mm A 24 13 H B 1 P 12 G R x 45 C -TK D SEATING PLANE 0.25 (0.010) M T C M NOTES: 1. Dimensions A and B do not include mold flash or protrusion. 2. Maximum mold flash or protrusion 0.15 mm (0.006) per side for A; for B ‑ 0.25 mm (0.010) per side. J F Symbol MIN MAX A 15.20 15.60 B 7.40 7.60 C 2.35 2.65 D 0.33 0.51 F 0.40 1.27 G 1.27 H 9.53 M J 0° 8° K 0.10 0.30 M 0.23 0.32 P 10.00 10.65 R 0.25 0.75 17