TECHNICAL DATA KKF8594E 512 x 8-bit CMOS EEPROMS with I2Cbus Interface The KKF8594E is а 4-Kbit (512 х 8-bit) floating gate electrically erasable programmable read only memory (ЕЕРPROM). By using an internal redundant storage code it is fault tolerant to single bit errors. This feature dramatically increases reliability compared to conventional ЕЕРRОМ memories. Power consumption is low due to the full СМОS technology used. The programming voltage 1s generated on-chip, using а voltage multiplier. As data bytes are received and transmitted via the serial I2C-bus, а package using eight pins is sufficient. Up to four KKF8594E devices may be connected to the Ic-bus. Chip select is accomplished by two address inputs. Timing of the Erase/Write cycle is done internally, thus no external components are required. Pin 7 must be connected to either VDD or left open-circuit. There is an option of using an external clock or timing the length of an Erase/Write cycle. A write protection input (pin 1) allows disable of write-commands from the master by а hardware signal. When pin 1 is HIGH and one of the upper 256 ЕЕРRОМ cells is addressed, then the data bytes will not be acknowledged by the KKF8594E and the ЕЕРRОМ contents are not changed. KKF8594E Plastic DIP TA = -40° to 85°C PIN ASSIGNMENT • Low Power CMOS maximum active current 2.5 mА • maximum standby current 10 µA • Non-volatile storage of 4-Kbits organized as two pages each 256 х 8-bits • Only one power supply required • On-chip voltage multiplier • Serial input/output bus (I2C) • Write operations byte write mode 8.byte page write mode (minimizes total write time рег byte) • Write-protection input • Read operations sequential read random read • .Extended supply voltage range (2,5 to 6.0 V). • Internal timer for writing (no external components) • .Power-on reset • .High reliability by using а redundant storage code (single bit error correction) • .Endurance 100 k. Tamb = 85 °С • 10 years non-volatile data retention time • Pin and Address compatible to KKF8594E Family and PCx8598X2 Family 1 KKF8594E ORDERING INFORMATION PACKAGE EXTENDED TYPE NUMBER PINS PIN POSITION 8 KKF8594E MATERIAL DIP CODE plastic SOT97 QUICK REFERENCE DATA SYMBOL PARAMETER VDD Positive supply voltage IDDR Supply current READ IDDW Supply current ERASE/WRITE IDDO Supply current STANDBY CONDITIONS fSCL= 100 kHz VDD= 3V VDD= 6V fSCL= 100 kHz VDD= 3V VDD= 6V VDD= 3V VDD= 6V MIN MAX UNIT 2.5 6.0 V - 60 200 µA µA - 0.8 2.5 mA mA - 3.5 10 µA µA LIMITING VALUES In accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER VDD positive supply voltage VI voltage on any input pin II CONDITIONS MIN MAX UNIT -0.3 +7.0 V IZII > 500 Ω VSS-0.8 VDD+0.8 V current on any input pin - - 1 mA IO output current - - 10 mA Tstg storage temperature range -65 +150 °C Tamb ambient operating range KKF8594E -40 +40 °C temperature 2 KKF8594E CHARACTERISTICS KKF8594E: VDD =4.5 to 5.5 V; VSS = 0 V; Tamb = -40 to +85°C SYMBOL Supply VDD IDDR IDDW IDDO PARAMETER positive supply voltage PCF8594E supply current READ KKF8594E supply current ERASE/WRITE KKF8594E supply current STANDY KKF8594E PTC Input VIL LOW level input voltage VIH HIGH level input voltage SCL Input VIL LOW level input voltage VIH HIGH level input voltage ILI input leakage current fSCL clock frequency CI input capacitance SDA Input/Output VIL LOW level input voltage VIH HIGH level input voltage ILI input leakage current fSCL clock frequency CI input capacitance Data retention time tS data region time CONDITIONS MIN MAX UNIT 4.5 5.5 V - 200 µA - 2.5 mA - 10 µA -0.8 0.9VDD 0.1VDD VDD+0.8 V V VI = VSS -0.8 0.7VDD 0 - 0.3VDD VDD+0.8 ±1 100 7 V V µA kHz pF IOH = 3 mA; VDD(min) VOH = VDD VI = VSS -0.8 0.7VDD - 0.3VDD VDD+0.8 0.4 1 7 V V V µA pF Tamb = 55 °C 10 - yrs fSCL = 100 kHz VDD(max) fSCL = 100 kHz VDD(max) VDD(max) VI = VDD or VSS WRITE CYCLE LIMITS The power-on reset circuit resets the I2C-bus logic with a set-up time ≤ 10 µA. Selection of chip address is achieved by connecting the A1 and A2 inputs to either VSS or VDD. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT Supply tSW ERASE/WRITE cycle time internal oscillator external clock NSW ERASE/WRITE cycles per byte KKF8594E fP tIL tHIGH tr tf td programming frequency LOW time HIGH time rise time fall time delay time Endurance Tamb = -40 to +85°C tE/W = 4 to 10 ms Tamb = 22°C; tE/W = 5ms Programming 4 7 - 10 - - 10 000 - - 100 000 25 5 5 0 - 60 300 300 tLOW ms ms kHz µs µs ns ns µs 3 KKF8594E LOGIC DIAGRAMM Ucc 1.5-10кОм WP WP Ucc A1 PTC A2 SCL U SS SDA WP Ucc A1 PTC A2 SCL U SS SDA PTC SCL WP A1 A2 U SS WP A1 A2 SDA U SS U SS 4 KKF8594E 5 KKF8594E N SUFFIX PLASTIC DIP (MS – 001BA) A Dimension, mm 5 8 B 1 4 MIN MAX A 8.51 10.16 B 6.1 7.11 5.33 C L F Symbol C D 0.36 0.56 F 1.14 1.78 -T- SEATING PLANE N G K D 0.25 (0.010) M M H J T NOTES: 1. Dimensions “A”, “B” do not include mold flash or protrusions. Maximum mold flash or protrusions 0.25 mm (0.010) per side. G 2.54 H 7.62 J 0° 10° K 2.92 3.81 L 7.62 8.26 M 0.2 0.36 N 0.38 6