NSC 100302

100302
Low Power Quint 2-Input OR/NOR Gate
General Description
The 100302 is a monolithic quint 2-input OR/NOR gate with
common enable. All inputs have 50 kΩ pull-down resistors
and all outputs are buffered.
n
n
n
n
2000V ESD protection
Pin/function compatible with 100102
Voltage compensated operating range = −4.2V to −5.7V
Standard Microcircuit Drawing
(SMD) 5962-9152802
Features
n 43% power reduction of the 100102
Logic Symbol
Pin Names
Description
Dna–Dne
Data Inputs
E
Enable Input
Oa–Oe
Data Outputs
Oa–Oe
Complementary Data Outputs
Truth Table
DS100303-1
D1X
D2X
E
OX
OX
L
L
L
L
H
L
L
H
H
L
L
H
L
H
L
L
H
H
H
L
H
L
L
H
L
H
L
H
H
L
H
H
L
H
L
H
H
H
H
L
H = HIGH Voltage Level
L = LOW Voltage Level
© 1998 National Semiconductor Corporation
DS100303
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100302 Low Power Quint 2-Input OR/NOR Gate
August 1998
Connection Diagrams
24-Pin DIP
24-Pin Quad Cerpak
DS100303-3
DS100303-2
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2
Absolute Maximum Ratings (Note 1)
≥2000V
ESD (Note 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Recommended Operating
Conditions
Above which the useful life may be impaired
−65˚C to +150˚C
Storage Temperature (TSTG)
Maximum Junction Temperature (TJ)
Ceramic
+175˚C
VEE Pin Potential to
Ground Pin
−7.0V to +0.5V
Input Voltage (DC)
VEE to +0.5V
Output Current (DC Output HIGH)
−50 mA
Case Temperature (TC)
Military
Supply Voltage (VEE)
−55˚C to +125˚C
−5.7V to −4.2V
Note 1: Absolute maximum ratings are those values beyond which the device may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2: ESD testing conforms to MIL-STD-883, Method 3015.
Military Version
DC Electrical Characteristics
VEE = −4.2V to −5.7V, VCC = VCCA = GND, TC = −55˚C to +125˚C (Note 5)
Symbol
Parameter
Conditions
Min
Max
Units
TC
VOH
Output HIGH Voltage
−1025
−870
mV
0˚C to +125˚C
−1085
−870
mV
−55˚C
VOL
Output LOW Voltage
−1830 −1620
mV
0˚C to +125˚C
−1830 −1555
mV
VOHC
Output HIGH Voltage
−1035
mV
VOLC
Output LOW Voltage
VIH
Input HIGH Voltage
−1085
−1165
VIN = VIH(Max)
Loading with
or VIL (Min)
50Ω to −2.0V
IIL
IIH
IEE
Input LOW Voltage
−55˚C
VIN = VIH(Max)
mV
−55˚C
−1610
mV
0˚C to +125˚C
−1555
mV
−55˚C
−870
mV
−55˚C to +125˚C
−1830 −1475
Input LOW Current
0.50
µA
Input HIGH Current
Power Supply Current
mV
−48
(Notes 3, 4,
5)
0˚C to +125˚C
or VIL (Min)
Loading with
50Ω to −2.0V
Guaranteed HIGH Signal
for All Inputs
VIL
Notes
−55˚C to +125˚C
Guaranteed LOW Signal
−55˚C to +125˚C
for All Inputs
VEE = −4.2V
240
µA
0˚C to +125˚C
µA
−55˚C
VIN = VIL(Min)
−17
mA
−55˚C to +125˚C
Inputs Open
(Notes 3, 4,
5, 6)
(Notes 3, 4,
5, 6)
(Notes 3, 4,
5)
VIN = VIH (Max)
VEE = −5.7V
340
(Notes 3, 4,
5)
(Notes 3, 4,
5)
(Notes 3, 4,
5, 6)
Note 3: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals −55˚C), then testing immediately
without allowing for the junction temperature to stabilize due to heat dissipation after power-up. This provides “cold start” specs which can be considered a worst case
condition at cold temperatures.
Note 4: Screen tested 100% on each device at −55˚C, +25˚C, and +125˚C, Subgroups 1, 2, 3, 7, and 8.
Note 5: Sample tested (Method 5005, Table I) on each manufactured lot at −55˚C, +25˚C, and +125˚C, Subgroups A1, 2, 3, 7, and 8.
Note 6: Guaranteed by applying specified input condition and testing VOH/VOL.
AC Electrical Characteristics
VEE = −4.2V to −5.7V, VCC = VCCA = GND
Symbol
Parameter
tPLH
Propagation Delay
tPHL
Data to Output
tPLH
Propagation Delay
tPHL
Enable to Output
tTLH
Transition Time
tTHL
20% to 80%, 80% to 20%
TC = −55˚C
TC = +25˚C
TC = +125˚C
Min
Max
Min
Max
Min
Max
0.30
1.80
0.40
1.50
0.40
1.70
ns
0.60
2.60
0.80
2.30
0.80
2.80
ns
0.30
1.20
0.30
1.20
0.30
1.20
Units
ns
Conditions
Notes
(Notes 7, 8,
9, 10, 11)
Figures 1, 2
(Note 10)
Note 7: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals −55˚C), then testing immediately
after power-up. This provides “cold start” specs which can be considered a worst case condition at cold temperatures.
3
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AC Electrical Characteristics
(Continued)
Note 8: Screen tested 100% on each device at +25˚C temperature only, Subgroup A9.
Note 9: Sample tested (Method 5005, Table I) on each manufactured lot at +25˚C, Subgroup A9, and at +125˚C and −55˚C temperatures, Subgroups A10 and A11.
Note 10: Not tested at +25˚C, +125˚C, and −55˚C temperature (design characterization data).
Note 11: The propagation delay specified is for single output switching. Delays may vary up to 100 ps with multiple outputs switching.
Test Circuitry
DS100303-5
Notes:
VCC, VCCA = +2V, VEE = −2.5V
L1 and L2 = equal length 50Ω impedance lines
RT = 50Ω terminator internal to scope
Decoupling 0.1 µF from GND to VCC and VEE
All unused outputs are loaded with 50Ω to GND
CL = Fixture and stray capacitance ≤ 3 pF
FIGURE 1. AC Test Circuit
Switching Waveforms
DS100303-6
FIGURE 2. Propagation Delay and Transition Times
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4
Physical Dimensions
inches (millimeters) unless otherwise noted
24-Lead Ceramic Dual-In-Line Package (0.400" Wide) (D)
NS Package Number J24E
24-Lead Quad Cerpak (F)
NS Package Number W24B
5
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100302 Low Power Quint 2-Input OR/NOR Gate
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ure to perform when properly used in accordance
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