Revised August 2000 100371 Low Power Triple 4-Input Multiplexer with Enable General Description Features The 100371 contains three 4-input multiplexers which share a common decoder (inputs S0 and S1). Output buffer gates provide true and complement outputs. A HIGH on the Enable input (E) forces all true outputs LOW (see Truth Table). All inputs have 50 kΩ pull-down resistors. ■ 35% power reduction of the 100171 ■ 2000V ESD protection ■ Pin/function compatible with 100171 ■ Voltage compensated operating range = −4.2V to −5.7V ■ Available to industrial grade temperature range Ordering Code: Order Number Package Number Package Description 100371SC M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 100371PC N24E 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide 10371QC V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square 10371QI V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square Industrial Temperature Range (−40°C to +85°C) Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Connection Diagrams 24-Pin DIP/SOIC Pin Descriptions Pin Names 28-Pin PLCC Description I0x–I3x Data Inputs S0, S1 Select Inputs E Enable Input (Active LOW) Za–Zc Data Outputs Za–Zc Complementary Data Outputs © 2000 Fairchild Semiconductor Corporation DS010148 www.fairchildsemi.com 100371 Low Power Triple 4-Input Multiplexer with Enable October 1989 100371 Truth Table Inputs Outputs E S0 S1 Zn L L L I0x L H L I1x L L H I2x L H H I3x H X X L H = HIGH Voltage Level L = LOW Voltage Level X = Don’t Care Logic Diagram www.fairchildsemi.com 2 Recommended Operating Conditions −65°C to +150°C Storage Temperature (TSTG) +150°C Maximum Junction Temperature (TJ) Case Temperature (TC) −7.0V to +0.5V VEE Pin Potential to Ground Pin Output current (DC Output HIGH) −50 mA ESD (Note 2) ≥2000V 0°C to +85°C Commercial VEE to +0.5V Input Voltage (DC) 100371 Absolute Maximum Ratings(Note 1) −40°C to +85°C Industrial −5.7V to −4.2V Supply Voltage (VEE) Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 2: ESD testing conforms to MIL-STD-883, Method 3015. Commercial Version DC Electrical Characteristics (Note 3) VEE = −4.2V to −5.7V, VCC = VCCA = GND, TC = 0°C to +85°C Min Typ Max Units VOH Symbol Output HIGH Voltage Parameter −1025 −955 −870 mV VIN =VIH (Max) Conditions VOL Output LOW Voltage −1830 −1705 −1620 mV or VIL (Min) 50Ω to −2.0V VOHC Output HIGH Voltage −1035 mV VIN = VIH (Min) Loading with VOLC Output LOW Voltage −1610 mV or VIL (Max) 50Ω to −2.0V VIH Input HIGH Voltage −1165 −870 mV Guaranteed HIGH Signal VIL Input LOW Voltage −1830 −1475 mV Guaranteed LOW Signal IIL Input LOW Current 0.50 IIH Input HIGH Current Loading with for All Inputs for All Inputs IEE I0X–I3X 340 S0, S1, E 300 Power Supply Current −75 −39 µA VIN = VIL (Min) µA VIN = VIH (Max) mA Inputs Open Note 3: The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under “worst case” conditions. DIP AC Electrical Characteristics VEE = −4.2V to −5.7V, VCC = VCCA = GND Symbol Parameter tPLH Propagation Delay tPHL I0x–I3x to Output tPLH Propagation Delay tPHL S0, S1 to Output tPLH Propagation Delay tPHL E to Output tTLH Transition Time tTHL 20% to 80%, 80% to 20% TC = 0°C TC = +25°C TC = +85°C Units Min Max Min Max Min Max 0.45 1.50 0.45 1.50 0.45 1.60 ns 0.90 2.40 0.90 2.40 1.00 2.60 ns 0.65 2.30 0.65 2.30 0.75 2.40 ns 0.35 1.20 0.35 1.20 0.35 1.20 ns Conditions Figures 1, 2 (Note 4) Figures 1, 2 Note 4: The propagation delay specified is for single output switching. Delays may vary up to 300 ps with multiple outputs switching. 3 www.fairchildsemi.com 100371 Commercial Version (Continued) SOIC and PLCC AC Electrical Characteristics VEE = −4.2V to −5.7V, VCC = VCCA = GND Symbol Parameter tPLH Propagation Delay tPHL I0x–I3x to Output tPLH Propagation Delay tPHL S0, S1 to Output tPLH Propagation Delay tPHL E to Output tTLH Transition Time tTHL 20% to 80%, 80% to 20% tOSHL Maximum Skew Common Edge Output-to-Output Variation TC = 0°C TC = +25°C TC = +85°C Units Conditions Min Max Min Max Min Max 0.45 1.30 0.45 1.30 0.45 1.40 ns 0.90 2.20 0.90 2.20 1.00 2.40 ns 0.65 2.10 0.65 2.10 0.75 2.20 ns 0.35 1.10 0.35 1.10 0.35 1.10 ns Figures 1, 2 Figures 1, 2 (Note 5) PLCC only 400 400 400 ps (Note 6) 490 490 490 ps (Note 6) 490 490 490 ps (Note 6) 430 430 430 ps Data to Output Path tOSLH Maximum Skew Common Edge Output-to-Output Variation PLCC only Data to Output Path tOST Maximum Skew Opposite Edge Output-to-Output Variation PLCC only Data to Output Path tPS Maximum Skew Pin (Signal) Transition Variation PLCC only (Note 6) Data to Output Path Note 5: The propagation delay specified is for single output switching. Delays may vary up to 300 ps with multiple outputs switching. Note 6: Output-to-Output Skew is defined as the absolute value of the difference between the actual propagation delay for any outputs within the same packaged device. The specifications apply to any outputs switching in the same direction either HIGH-to-LOW (tOSHL), or LOW-to-HIGH (tOSLH), or in opposite directions both HL and LH (tOST). Parameters tOST and tPS guaranteed by design. www.fairchildsemi.com 4 100371 Industrial Version PLCC DC Electrical Characteristics (Note 7) VEE = −4.2V to −5.7V, VCC = VCCA = GND, TC = −40°C to +85°C TC = −40°C Symbol Parameter Min Max TC = 0°C to +85°C Min Max Units Conditions VOH Output HIGH Voltage −1085 −870 −1025 −870 mV VIN =VIH (Max) Loading with VOL Output LOW Voltage −1830 −1575 −1830 −1620 mV or VIL(Min) 50Ω to −2.0V VOHC Output HIGH Voltage −1095 mV VIN = VIH (Min) Loading with VOLC Output LOW Voltage −1610 mV or VIL(Max) 50Ω to −2.0V VIH Input HIGH Voltage −1170 −870 −1165 −870 mV Guaranteed HIGH Signal VIL Input LOW Voltage −1830 −1480 −1830 −1475 mV Guaranteed LOW Signal IIL Input LOW Current 0.50 IIH Input HIGH Current −1035 −1565 for All Inputs for All Inputs IEE 0.50 I0X–I3X 340 340 S0, S1, E 300 300 Power Supply Current −75 −35 −75 −39 µA VIN = VIL (Min) µA VIN = VIH (Max) mA Inputs Open Note 7: The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under “worst case” conditions. PLCC AC Electrical Characteristics VEE = −4.2V to −5.7V, VCC = VCCA = GND Symbol Parameter tPLH Propagation Delay tPHL I0x–I3x to Output tPLH Propagation Delay tPHL S0, S1 to Output tPLH Propagation Delay tPHL E to Output tTLH Transition Time tTHL 20% to 80%, 80% to 20% TC = −40°C TC = +25°C TC = +85°C Units Min Max Min Max Min Max 0.40 1.30 0.45 1.30 0.45 1.40 ns 0.70 2.20 0.90 2.20 1.00 2.40 ns 0.65 2.10 0.65 2.10 0.75 2.20 ns 0.20 1.60 0.35 1.10 0.35 1.10 ns Conditions Figures 1, 2 (Note 8) Figures 1, 2 Note 8: The propagation delay specified is for single output switching. Delays may vary up to 300 ps with multiple outputs switching. 5 www.fairchildsemi.com 100371 Test Circuitry Notes: VCC, VCCA = +2V, VEE = −2.5V L1 and L2 = equal length 50Ω impedance lines RT = 50Ω terminator internal to scope Decoupling 0.1 µF from GND to VCC and VEE All unused outputs are loaded with 50Ω to GND CL = Fixture and stray capacitance ≤ 3 pF FIGURE 1. AC Test Circuit Switching Waveforms FIGURE 2. Propagation Delay and Transition Times www.fairchildsemi.com 6 100371 Physical Dimensions inches (millimeters) unless otherwise noted 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M24B 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide Package Number N24E 7 www.fairchildsemi.com 100371 Low Power Triple 4-Input Multiplexer with Enable Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square Package Number V28A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. 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