NSC ADCV0831M6

ADCV0831
8 Bit Serial I/O Low Voltage Low Power ADC with
Auto Shutdown in a SOT Package
General Description
Features
The ADCV0831 is a low voltage 8-bit successive approximation A/D converter with serial I/O. The I/O is a 3-wire serial interface compatible with NSC’s MICROWIRE ™ & Motorola’s
SPI standards. It easily interfaces with standard shift registers or microprocessors.
Low voltage and auto shutdown features make the
ADCV0831 ideal for portable battery operated electronic devices. The main benefits are most apparent in small portable
electronic devices. The tiny A/D converter can be placed
anywhere on the board.
n
n
n
n
Applications
n
n
n
n
n
n
Digitizing automotive sensors
Process control monitoring
Remote sensing in noisy environments
Instrumentation
Test systems
Embedded diagnostics
Tiny 6-pin SOT 23 package
Serial digital data link requires few I/O pins
Auto Shutdown
0V to 3V analog input range with single 3V power
supply
n TTL/CMOS input/output compatible
Key Specifications
(For 3V supply, typical, unless otherwise noted.)
n Resolution: 8 bits
n Conversion time (fC = 700 kHz): 16µs
n Low power dissipation: 720µW
n Single supply: 2.7V to 5VDC
n Linearity error: ± 1.5LSB over temperature
n No missing codes over temperature
n Shutdown supply current 10nA
Ordering Information
Temperature Range
(0˚C ≤ Tj ≤ +70˚C)
Package
Supplied As
ADCV0831M6
MA06A
1k Units Tape and Reel
ADCV0831M6X
MA06A
3k Units Tape and Reel
Connection Diagram
ADCV0831
DS100104-1
TRI-STATE ® is a registered trademark of National Semiconductor Corporation.
COPS™ microcontrollers and MICROWIRE™ are trademarks of National Semiconductor Corporation.
© 2000 National Semiconductor Corporation
DS100104
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ADCV0831 8 Bit Serial I/O Low Voltage Low Power ADC with Auto Shutdown in a SOT Package
February 2000
ADCV0831
Absolute Maximum Ratings (Notes 1, 3)
Soldering Temperature (Note 7)
Convection Infrared (15 sec.)
Wave Soldering (4 sec.) (Note 7)
Storage Temperature
Thermal Resistance (θ JA)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (VCC)
Voltage at Inputs and Outputs
Input Current at Any Pin (Note 4)
Package Input Current (Note 4)
Power Dissipation at TA = 25˚C
(Note 5)
ESD Susceptibility (Note 6)
5.5V
−0.3V to VCC + 0.3V
± 5 mA
± 20 mA
215˚C
260˚C
−65˚C to +150˚C
265˚C/W
Operating Ratings (Notes 2, 3)
0˚C≤ Tj ≤70˚C
2.7VDC to 5V
Temperature Range
Supply Voltage (VCC)
470 mW
2000V
Electrical Characteristics
The following specifications apply for VCC = 3VDC, and fCLK = 500 kHz unless otherwise specified. Boldface limits apply for
TA = TJ = TMIN to T MAX; all other limits TA = T J = 25˚C.
Symbol
Parameter
Conditions
Integral Linearity Error
Offset Error
Full Scale Error
Typical
(Note 8)
Limits
(Note 9)
± 0.6
± 0.1
± 0.3
± 1.5
± 1.5
± 1.5
LSB (max)
8
Bits (min)
(VCC + 0.05)
V (max)
Resolution
VIN
Analog Input Voltage
VIN(1)
Logical “1” Input Voltage
VCC = 3V
VIN(0)
Logical “0” Input Voltage
VCC = 3V
IIN(1)
Logical “1” Input Current
VIN = 3V
0.01
Units
LSB (max)
LSB (max)
(GND − 0.05)
V (min)
2.0
V (min)
0.8
V (max)
1
µA (max)
IIN(0)
Logical “0” Input Current
VIN = 0V
0.01
−1
µA (max)
VOUT(1)
Logical “1” Output Voltage
Iout =-360µA
2.8
2.4
V (min)
VOUT(0)
Logical “0” Output Voltage
Iout =1.6 mA
0.24
0.4
V (max)
IOUT
TRI-STATE ® Output Current
VOUT = 0V
0.01
3.0
µA (max)
ISOURCE
Output Source Current
VOUT = 0V
2.6
1.0
mA (min)
ISINK
Output Sink Current
VOUT = 3V
7.4
3.0
mA (min)
ICC
Supply Current
CS = HIGH
0.01
30
µA (max)
CS = LOW
200
400
µA (max)
AC Electrical Characteristics
The following specifications apply for VCC = +3 VDC, and tr = t f = 20 ns unless otherwise specified. Boldface limits apply for
TA = TJ = T MIN to TMAX; all other limits TA = TJ = 25˚C.
Symbol
Parameter
fCLK
Clock Frequency
tSET-UP
CS failing edge to CLK rising edge
Conditions
Typical
Limits
(Note 8)
(Note 9)
700
10
Units
kHz (max)
kHz (min)
25
ns
Clock Duty Cycle
40
% (min)
60
% (max)
TC
Conversion Time
11
Clock
Periods
tpd
CLK Falling Edge to Data Valid
142
250
ns (max)
70
200
250
Low to High
CL = 100 pF
High to Low
t1H, t 0H
CS Rising Edge to Data Output TRI-STATE
CL = 100 pF, RL =2
kΩ
75
(see TRI-STATE Test Circuits)
CL = 100 pF, RL = 10
kΩ
50
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2
ns (max)
(Continued)
The following specifications apply for VCC = +3 VDC, and tr = t f = 20 ns unless otherwise specified. Boldface limits apply for
TA = TJ = T MIN to TMAX; all other limits TA = TJ = 25˚C.
Symbol
Parameter
Conditions
Typical
Limits
(Note 8)
(Note 9)
Units
CIN
Capacitance of Logic Inputs
5
pF
COUT
Capacitance of Logic Outputs
5
pF
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
Note 2: Operating Ratings indicate conditions for which the device is functional. These ratings do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions.
Note 3: All voltages are measured with respect to GND = 0 VDC, unless otherwise specified.
Note 4: When the input voltage VIN at any pin exceeds the power supplies (VIN < GND or VIN > VCC) the current at that pin should be limited to 5 mA. The 20 mA
maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 5 mA to four pins.
Note 5: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA and the ambient temperature, T A. The maximum
allowable power dissipation at any temperature is P D = (TJMAX − TA)/θJA or the number given in the Absolute Maximum Ratings, whichever is lower.
Note 6: Human body model, 100 pF capacitor discharged through a 1.5 kΩ resistor.
Note 7: See AN450 “Surface Mounting Methods and Their Effect on Product Reliability” or Linear Data Book section “Surface Mount” for other methods of soldering
surface mount devices.
Note 8: Typicals are at TJ = 25˚C and represent the most likely parametric norm.
Note 9: Guaranteed to National’s AOQL (Average Outgoing Quality Level).
Typical Performance Characteristics
The following specifications apply for VCC = 3V, unless otherwise specified
Integral Linearity Error vs
Supply Voltage
Linearity Error vs
Temperature
Linearity Error vs
Clock Frequency
DS100104-62
Power Supply Current
vs Temperature
DS100104-56
Output Current vs
Temperature
DS100104-57
DS100104-55
Power Supply Current
vs Clock Frequency
DS100104-58
DS100104-61
3
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ADCV0831
AC Electrical Characteristics
ADCV0831
TRI-STATE Test Circuits and Waveforms
DS100104-8
Timing Diagrams
Data Output Timing
DS100104-10
Start Conversion Timing
DS100104-11
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4
ADCV0831
Timing Diagrams
(Continued)
Timing
DS100104-12
5
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ADCV0831
Functional Description
The design of this converter utilizes a comparator structure
with built-in sample-and-hold which provides for VIN to be
converted by a successive approximation routine.
2.0 REFERENCE CONSIDERATIONS
In a ratiometric system, the analog input voltage is proportional to the voltage used for the A/D reference. This voltage
is the system power supply. This technique relaxes the stability requirements of the system reference as the analog input and A/D reference move together maintaining the same
output code for a given input condition.
Since there is no separate reference and analog supply pins,
the analog side is very sensitive. The PC layout of the
ADCV0831 is very critical. The ADCV0831 should be used
with an analog ground plane and single-point grounding
techniques. The Gnd pin should be tied directly to the ground
plane. One supply bypass capacitor (0.1 µF) is recommended to decouple all the digital signals on the supplies.
The lead length of the capacitor should be as short as possible.
The analog input voltage can range from 50mV below
ground to 50mV above VCC without degrading conversion
accuracy.
The ADCV0831 is intended to work with a CPU which
strobes data on the clock’s rising edge. The ADCV0831
strobes data on the clock’s falling edge so that the data output is stable when the CPU reads it in.
When the Chip Select pin is high, the output is TRI-STATE
and the ADCV0831 is in shutdown mode and draws less
than 30 µA of current. During shutdown the digital logic
draws no current at CMOS logic levels, and the analog circuitry is turned off. When the Chip Select pin goes low, all the
analog circuitry turns on, and the conversion process begins.
3.0 THE ANALOG INPUT
The most important feature of this converter is that it can be
located right at the analog signal source through just a few
wires. It can communicate with a processor with a highly
noise immune serial bit stream. This greatly minimizes circuitry to maintain analog signal accuracy which otherwise is
most susceptible to noise pickup. However, a few words are
in order with regard to the analog inputs should the input be
noisy to begin with or possibly riding on a large
common-mode voltage.
The input has a sample and hold, therefore a capacitor (0.01
µF) is needed at the input pin in order to swamp out any
feedthrough signal coming from the sample and hold circuitry.
The input capacitor lead length is not as critical as the supply
decoupling capacitor, as long as the capacitor is large
enough to swamp out any sample and hold feedthrough.
Source resistance limitation is important with regard to the
DC leakage currents of the input multiplexer. Bypass capacitors should not be used if the source resistance is greater
than 1kΩ. The worst-case leakage current of ± 1µA over temperature will create a 1mV input error with a 1kΩ source resistance. An op-amp RC active low pass filter can provide
both impedance buffering and noise filtering should a high
impedance signal source be required.
1.0 THE DIGITAL INTERFACE
The most important characteristic of this converter is the serial data link with the controlling processor. Using a serial
communication format offers three very significant system
improvements. It allows many functions to be included in a
small package, it can eliminate the transmission of low level
analog signals by locating the converter right at the analog
sensor, and can transmit highly noise immune digital data
back to the host processor.
To understand the operation of this converter it is best to refer to the Timing Diagrams and to follow a complete conversion sequence.
1. A conversion is initiated by pulling the CS (chip select)
line low. This line must be held low for the entire conversion.
2. During the conversion the output of the SAR comparator
indicates whether the analog input is greater than (high)
or less than (low) a series of successive voltages in a resistor ladder (last 8 bits). After each comparison the
comparator’s output is shifted to the DO line on the falling edge of CLK. This data is the result of the conversion
being shifted out (with the MSB first) and can be read by
the processor immediately.
3. After 11 clock periods the conversion is completed.
4. All internal registers are cleared when the CS line is
high. See Data Input Timing under Timing Diagrams. If
another conversion is desired CS must make a high to
low transition.
DS100104-59
Recommended Power Supply Bypassing
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6
The ADCV0831 is ideal for applications operating with ratiometric transducers. The ADCV0831 can measure the signal produced
by the transducer and produce a corresponding code to the microprocessor. The microprocessor can then control the system producing the signal.
Operating with Ratiometric Transducers
DS100104-63
The ADCV0831 can be used in low-cost remote temperature sensor system. For a temperature sensor, the LM60 is an excellent
companion to the ADCV0831, since it can operate off 3V supply. The LM60 linear scale factor is 6.25mV/˚C. Therefore, the
ADCV0831 can digitize a couple of degrees change in temperature and provide the output to the microprocessor, which in turn
can adjust the system environment. For higher accuracy, a low-offset op-amp can be used to gain up the LM60 output.
Low-Cost Remote Temperature Sensor
DS100104-60
7
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ADCV0831
Applications
ADCV0831
Applications
(Continued)
When the input of the ADCV0831 is driven by an op-amp operating at a supply voltage greater than 5V, it is a good idea to protect
the input of the ADCV0831 from exceeding the supply voltage. Two diodes can be added to the input one to supply and one to
the ground pin.
Protecting the input
DS100104-64
Note: Diodes are IN914
This circuit utilizes the LM385 reference to detect the power supply voltage level. When the supply voltage is 3V, the LSB = 3/256
= 11.7mV. Since the LM385 reference sets the input to 1.2V. The output code is 102. As the supply voltage decreases, the LSB
decreases and the output code increases. When the supply voltage reaches 2.7V, the LSB = 10.5 mV. The input voltage is still
at 1.2V, and the output code is 114. If the supply voltage increases, the LSB increases and the output code decreases. When the
supply voltage reaches 3.3V, the LSB = 12.9mV and the output code is 93.
Power Supply Level Detection
DS100104-65
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8
inches (millimeters) unless otherwise noted
Order Number ADCV0831M6X, ADCV0831M6
NS Package Number MA06A
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ADCV0831 8 Bit Serial I/O Low Voltage Low Power ADC with Auto Shutdown in a SOT Package
Physical Dimensions