KERSEMI IRFR3710ZTRL

IRFR3710ZPbF
IRFU3710ZPbF
IRFU3710Z-701PbF
Features
l
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l
l
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Advanced Process Technology
Ultra Low On-Resistance
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Multiple Package Options
Lead-Free
HEXFET® Power MOSFET
D
VDSS = 100V
RDS(on) = 18mΩ
G
Description
ID = 42A
S
HEXFET®
This
Power MOSFET utilizes the
latest processing techniques to achieve extremely
low on-resistance per silicon area. Additional
features of this design are a 175°C junction
operating temperature, fast switching speed and
improved repetitive avalanche rating . These
features combine to make this design an extremely
efficient and reliable device for use in a wide
variety of applications.
D-Pak
I-Pak
IRFR3710ZPbF IRFU3710ZPbF
I-Pak Leadform 701
IRFU3710Z-701PbF
Refer to page 11 for package outline
Absolute Maximum Ratings
ID @ TC = 25°C
ID @ TC = 100°C
ID @ TC = 25°C
IDM
PD @TC = 25°C
VGS
EAS (Thermally limited)
EAS (Tested )
IAR
EAR
TJ
TSTG
Parameter
Max.
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V (Package Limited)
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Single Pulse Avalanche Energy Tested Value
Avalanche Current
Repetitive Avalanche Energy
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
56
39
42
220
140
0.95
± 20
150
200
See Fig.12a, 12b, 15, 16
c
d
c
h
g
Units
A
W
W/°C
V
mJ
A
mJ
-55 to + 175
°C
300 (1.6mm from case )
Thermal Resistance
Parameter
RθJC
RθJA
RθJA
Junction-to-Case
Junction-to-Ambient (PCB mount)
Junction-to-Ambient
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i
Typ.
Max.
Units
–––
–––
–––
1.05
50
110
°C/W
1
IRFR/U3710ZPbF & IRFU3710Z-701PbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
V(BR)DSS
Drain-to-Source Breakdown Voltage
∆V(BR)DSS/∆TJ
RDS(on)
Min. Typ. Max. Units
–––
–––
Breakdown Voltage Temp. Coefficient
–––
0.088
–––
Static Drain-to-Source On-Resistance
–––
15
18
VGS(th)
Gate Threshold Voltage
2.0
–––
4.0
V
VDS = VGS, ID = 250µA
gfs
IDSS
Forward Transconductance
39
–––
–––
S
VDS = 25V, ID = 33A
–––
–––
20
µA
–––
–––
250
Gate-to-Source Forward Leakage
–––
–––
200
Gate-to-Source Reverse Leakage
–––
–––
-200
Qg
Total Gate Charge
–––
69
100
Qgs
Gate-to-Source Charge
–––
15
–––
Qgd
Gate-to-Drain ("Miller") Charge
–––
25
–––
td(on)
Turn-On Delay Time
–––
14
–––
VDD = 50V
tr
Rise Time
–––
43
–––
ID = 33A
td(off)
Turn-Off Delay Time
–––
53
–––
tf
Fall Time
–––
42
–––
VGS = 10V
LD
Internal Drain Inductance
–––
4.5
–––
Between lead,
LS
Internal Source Inductance
–––
7.5
–––
6mm (0.25in.)
from package
and center of die contact
VGS = 0V
IGSS
Drain-to-Source Leakage Current
V
Conditions
100
VGS = 0V, ID = 250µA
V/°C Reference to 25°C, ID = 1mA
mΩ VGS = 10V, ID = 33A
e
VDS = 100V, VGS = 0V
VDS = 100V, VGS = 0V, TJ = 125°C
nA
VGS = 20V
VGS = -20V
ID = 33A
nC
VDS = 80V
VGS = 10V
ns
nH
RG = 6.8 Ω
e
e
D
G
S
Ciss
Input Capacitance
–––
2930
–––
Coss
Output Capacitance
–––
290
–––
Crss
Reverse Transfer Capacitance
–––
180
–––
Coss
Output Capacitance
–––
1200
–––
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Coss
Output Capacitance
–––
180
–––
VGS = 0V, VDS = 80V, ƒ = 1.0MHz
Coss eff.
Effective Output Capacitance
–––
430
–––
VGS = 0V, VDS = 0V to 80V
VDS = 25V
pF
ƒ = 1.0MHz
f
Source-Drain Ratings and Characteristics
Parameter
Min. Typ. Max. Units
Conditions
IS
Continuous Source Current
–––
–––
56
ISM
(Body Diode)
Pulsed Source Current
–––
–––
220
showing the
integral reverse
VSD
(Body Diode)
Diode Forward Voltage
–––
–––
1.3
V
p-n junction diode.
TJ = 25°C, IS = 33A, VGS = 0V
trr
Reverse Recovery Time
–––
35
53
ns
Qrr
Reverse Recovery Charge
–––
41
62
nC
ton
Forward Turn-On Time
c
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2
MOSFET symbol
A
D
G
TJ = 25°C, IF = 33A, VDD = 50V
di/dt = 100A/µs
S
e
e
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
IRFR/U3710ZPbF & IRFU3710Z-701PbF
1000
1000
100
BOTTOM
VGS
15V
10V
6.0V
5.0V
4.8V
4.5V
4.3V
4.0V
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
100
10
4.0V
60µs PULSE WIDTH
Tj = 25°C
1
0.1
1
10
BOTTOM
4.0V
10
1
60µs PULSE WIDTH
Tj = 175°C
0.1
100
0.1
V DS, Drain-to-Source Voltage (V)
100
100
T J = 175°C
100
TJ = 25°C
VDS = 25V
60µs PULSE WIDTH
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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Gfs, Forward Transconductance (S)
ID, Drain-to-Source Current (Α)
10
Fig 2. Typical Output Characteristics
1000
1.0
1
V DS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
10
VGS
15V
10V
6.0V
5.0V
4.8V
4.5V
4.3V
4.0V
T J = 25°C
80
60
T J = 175°C
40
20
V DS = 10V
0
0
10
20
30
40
50
60
70
80
ID,Drain-to-Source Current (A)
Fig 4. Typical Forward Transconductance
vs. Drain Current
3
IRFR/U3710ZPbF & IRFU3710Z-701PbF
100000
VGS, Gate-to-Source Voltage (V)
ID= 33A
C oss = C ds + C gd
10000
C, Capacitance(pF)
12.0
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
Ciss
1000
Coss
Crss
100
10.0
VDS= 80V
VDS= 50V
VDS= 20V
8.0
6.0
4.0
2.0
0.0
10
1
10
100
0
VDS, Drain-to-Source Voltage (V)
1000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
10.00
T J = 25°C
VGS = 0V
0.10
0.4
0.6
0.8
1.0
1.2
1.4
1.6
VSD, Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
40
50
60
70
80
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100
T J = 175°C
0.2
30
Fig 6. Typical Gate Charge vs.
Gate-to-Source Voltage
1000.00
1.00
20
QG Total Gate Charge (nC)
Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
100.00
10
1.8
100µsec
10
1msec
1
Tc = 25°C
Tj = 175°C
Single Pulse
10msec
0.1
1
10
100
1000
VDS, Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRFR/U3710ZPbF & IRFU3710Z-701PbF
60
Limited By Package
50
ID, Drain Current (A)
RDS(on) , Drain-to-Source On Resistance
(Normalized)
3.0
40
30
20
10
0
ID = 56A
VGS = 10V
2.5
2.0
1.5
1.0
0.5
25
50
75
100
125
150
-60 -40 -20 0
175
T C , Case Temperature (°C)
20 40 60 80 100 120 140 160 180
T J , Junction Temperature (°C)
Fig 10. Normalized On-Resistance
vs. Temperature
Fig 9. Maximum Drain Current vs.
Case Temperature
Thermal Response ( Z thJC )
10
1
D = 0.50
0.20
0.10
0.05
0.02
0.01
0.1
0.01
τJ
τJ
τ1
R2
R2
τ2
τ1
τ2
Ci= τi/Ri
Ci i/Ri
SINGLE PULSE
( THERMAL RESPONSE )
0.001
R1
R1
R3
R3
τ3
τC
τ
τ3
Ri (°C/W) τi (sec)
0.576
0.000540
0.249
0.001424
0.224
0.007998
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFR/U3710ZPbF & IRFU3710Z-701PbF
DRIVER
L
VDS
D.U.T
RG
20V
VGS
+
V
- DD
IAS
tp
A
0.01Ω
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
EAS , Single Pulse Avalanche Energy (mJ)
700
15V
ID
3.4A
4.8A
BOTTOM 33A
TOP
600
500
400
300
200
100
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
I AS
Fig 12c. Maximum Avalanche Energy
vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
QG
QGS
QGD
4.0
VG
Charge
Fig 13a. Basic Gate Charge Waveform
L
DUT
0
1K
VCC
VGS(th) Gate threshold Voltage (V)
10 V
3.0
ID = 250µA
2.0
1.0
-75 -50 -25
0
25
50
75 100 125 150 175 200
T J , Temperature ( °C )
Fig 13b. Gate Charge Test Circuit
Fig 14. Threshold Voltage vs. Temperature
6
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IRFR/U3710ZPbF & IRFU3710Z-701PbF
1000
Avalanche Current (A)
Duty Cycle = Single Pulse
100
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming ∆ Tj = 25°C due to
avalanche losses
0.01
10
0.05
0.10
1
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current vs.Pulsewidth
EAR , Avalanche Energy (mJ)
200
TOP
Single Pulse
BOTTOM 1% Duty Cycle
ID = 33A
150
100
50
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy
vs. Temperature
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of T jmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav ) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
7
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IRFR/U3710ZPbF & IRFU3710Z-701PbF
D.U.T
Driver Gate Drive
ƒ
+
‚
„
•
•
•
•
D.U.T. ISD Waveform
Reverse
Recovery
Current
+
dv/dt controlled by RG
Driver same type as D.U.T.
I SD controlled by Duty Factor "D"
D.U.T. - Device Under Test
P.W.
Period
*

RG
D=
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
-
Period
P.W.
+
VDD
+
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
-
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V DS
VGS
RG
RD
D.U.T.
+
-VDD
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 18a. Switching Time Test Circuit
VDS
90%
10%
VGS
td(on)
tr
t d(off)
tf
Fig 18b. Switching Time Waveforms
8
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IRFR/U3710ZPbF & IRFU3710Z-701PbF
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
D-Pak (TO-252AA) Part Marking Information
E XAMP LE : T H IS IS AN IRF R 120
WIT H AS S E MB L Y
L OT CODE 1234
AS S E MB L E D ON WW 16, 2001
IN T H E AS S E MB L Y LINE "A"
P ART NUMB E R
INT E R NAT IONAL
R E CT IF IE R
L OGO
Note: "P" in as s embly line pos ition
indicates "L ead-F ree"
IR F R 120
12
116A
34
AS S E MB L Y
L OT CODE
DAT E CODE
YE AR 1 = 2001
WE E K 16
L INE A
"P " in as s embly line pos ition indicates
"L ead-F ree" qualification to the cons umer-level
OR
INT E R NAT IONAL
R E CT IF IE R
L OGO
P ART NU MB E R
IR F R 120
12
AS S E MB L Y
L OT CODE
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34
DAT E CODE
P = DE S IGNAT E S L E AD-F RE E
PR ODU CT (OPT IONAL )
P = DE S IGNAT E S L E AD-F RE E
PR ODU CT QU ALIF IE D T O T H E
CONS U ME R LE VE L (OPT IONAL )
YE AR 1 = 2001
WE E K 16
9
IRFR/U3710ZPbF & IRFU3710Z-701PbF
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
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IRFR/U3710ZPbF & IRFU3710Z-701PbF
I-Pak Leadform Option 701 Package Outline
‰
Dimensions are shown in millimeters (inches)
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11
IRFR/U3710ZPbF & IRFU3710Z-701PbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRR
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
FEED DIRECTION
TRL
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Notes:
„ Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS .
max. junction temperature. (See fig. 11).
‚ Limited by TJmax, starting TJ = 25°C, L = 0.28mH … Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
RG = 25Ω, IAS = 33A, VGS =10V. Part not
avalanche performance.
recommended for use above this value.
† This value determined from sample failure population. 100%
ƒ Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
tested to this value in production.
‡ When mounted on 1" square PCB (FR-4 or G-10 Material) .
For recommended footprint and soldering techniques refer to
application note #AN-994.
 Repetitive rating; pulse width limited by
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12