NEC UPD160010N

DATA SHEET
MOS INTEGRATED CIRCUIT
µPD160010
384-/360-OUTPUT TFT-LCD SOURCE DRIVER
(COMPATIBLE WITH 256 GRAY SCALES, mini-LVDS INTERFACE SUPPORTED)
DESCRIPTION
The µ PD160010 is a source driver for TFT-LCDS that supports the display of 256 gray scales and employs mini-LVDS
interface. Which can realize a full-color display of 16,777,216 colors by output of 256 values γ -corrected by an internal D/A
converter and 10-by-2 external power modules. Because the output dynamic range is as large as VSS2 + 0.2 V to VDD2 − 0.2
V, level inversion operation of the LCD’s common electrode is rendered unnecessary. Also, to be able to deal with dot-line
inversion, n-line inversion, this source driver is equipped with a built-in 8-bit D/A converter circuit whose odd output pins and
even output pins respectively output gray scale voltages of differing polarity. Because of the incorporation of mini-LVDS
interface, the data transfer speed has improved and the amount of wiring on the PCB has been significantly reduced.
Remark "mini-LVDS" is the technology with Texas Instruments applied LVDS technology and developed.
(LVDS: Low Voltage Differential Signaling)
FEATURES
• Differential interface: CLK, gray scale data,
• CMOS interface: STHR(L), R,/L, STB, SB, POL, Osel, Vsel1, Vsel2, SRC, ORC, RxBIAS1, RxBIAS2
• 384/360 outputs (Osel)
• Capable of outputting 256 values by means of 10-by-2 external power modules (20 units) and a D/A converter
• Logic power supply voltage (VDD1): 2.7 to 3.6V
• Driver power supply voltage (VDD2): 10.0 to 16.5V
• High-speed data transfer: fCLK = 190 MHz MAX. (internal data transfer speed when operating at VDD1 = 2.7 V)
• Output dynamic range: VSS2 + 0.2 V to VDD2 − 0.2 V
• Apply for dot-line inversion, n-line inversion
• Output voltage polarity inversion function (POL)
★ ORDERING INFORMATION
Part Number
Package
µPD160010N-xxx
TCP (TAB package)
µPD160010NL-xxx
COF (COF package)
Remark The TCP/COF’s external shape is customized. To order the required shape, please contact one of our sales
representatives.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No.
S16316EJ2V0DS00 (2nd edition)
Date Published March 2004 NS CP (K)
Printed in Japan
The mark ★ shows major revised points.
2003
µPD160010
D3A
D3B
D2A
D2B
D1A
D1B
D0A
D0B
CLKA
CLKB
★ 1. BLOCK DIAGRAM
RxBIAS1, RxBIAS2
SB
STHR
STHL
STB
VDD1A
VSS1A
VDD1D
VSS1D
Logic
Controller
Osel
R,/L
CLK
D0 to D3
Serial to Parallel Converter
STHR
STHL
Bi-directional shift register
Latch
VDD2
V0-V19
D/A converter
VSS2
POL
SRC
ORC
Voltage follower output
MODE
Vsel1, Vsel2
-------------------------------S1
S2
S3
S384
Remark /xxx indicates active low signals.
2. RELATIONSHIP BETWEEN OUTPUT CIRCUIT AND D/A CONVERTER
S1
S2
S383
S384
•
•
•
•
POL
10
·····
V0
V9
8-bit D/A converter
10
·····
V10
Multiplexer
V19
2
Data Sheet S16316EJ2V0DS
µPD160010
3. PIN CONFIGURATION (µPD160010NL-xxx:COF, Copper Foil Surface, Face-down)
VSS2
VDD2
V0
V1
V2
V3
V4
V5
V6
V7
V8
V9
(VD D 1D )
TEST
(VSS 1D )
TEST
(VD D 1D )
TEST
(VSS 1D )
ORC
(VD D 1D )
S TH R
STH L
PO L
S TB
(VSS 1D )
SR C
(VD D 1D )
TEST
TEST
TEST
VS S1D
V SS1A
(VS S1A)
D 0A
D 0B
(VS S1A)
D 1A
D 1B
(VS S1A)
C LK A
C LK B
(VS S1A)
D 2A
D 2B
(VS S1A)
D 3A
D 3B
V D D 1A
V D D 1D
TEST
TEST
TEST
(VD D 1D )
R xBIA S2
(VSS 1D )
R xBIA S1
(VD D 1D )
Vsel1
(VSS 1D )
Vsel2
(VD D 1D )
O sel
(VSS 1D )
R ,/L
(VD D 1D )
MODE
(VSS 1D )
SB
(VD D 1D )
V10
V11
V12
V13
V14
V15
V16
V17
V18
V19
VDD2
VSS2
S1
S2
S3
C opper foil
surface
S 382
S 383
S 384
Remarks 1. This figure does not specify the COF package.
2. (VDD1D) and (VSS1D) is available for supply to logic input terminal. Please don’t use these pins for power
supply terminal with current.
(VSS1A) must be connected to analog GND on PCB.
Data Sheet S16316EJ2V0DS
3
µPD160010
4. PIN FUNCTIONS
(1/2)
Pin Symbol
Pin Name
S1 to S384
Driver
D0A, D0B
Gray scale data
I/O
Output
Input
(mini-LVDS)
D1A, D1B
Description
The D/A converted 256-gray-scale analog voltage is output.
Display data with gray-scale data (8-bit) and control signal (RST = reset).
Refer to Table 4−1.
D2A, D2B
D3A, D3B
CLKA,
Shift clock
CLKB
R,/L
Input
(mini-LVDS)
Shift direction
control
Input
(CMOS)
Shift clock.
Refer to Table 4−1.
The shift direction control pin of shift register. The shift directions of the shift
registers are as follows.
R,/L = H (right shift): STHR input, S1→S384, STHL output
R,/L = L (left shift): STHL input, S384→S1, STHR output
STHR
Right shift start
pulse
STHL
I/O
(CMOS)
Left shift start pulse
This is the start pulse I/O pin when connected in cascade. Loading of display data
starts when a high level is read.
For right shift, STHR is input and STHL is output.
For left shift, STHL is input and STHR is output.
STB
Latch
Input
(CMOS)
POL
Polarity
Input
(CMOS)
Change the input mode, latched the registered data and transfer to DAC at the
rising edge. And supplied voltage to LCD pixel is output at falling edge.
Control the polarity of the output.
Input of the POL signal is allowed the setup time (t14) with respect to STB’s rising
edge. Refer to Table 4−3.
SB
Bus-line set-back
Input
(CMOS)
Change the data order of mini-LVDS input.
Refer to Table 4−1.
Input “L” level to this pin.
RxBIAS1,
mini-LVDS receiver
Input
RxBIAS2
bias voltage control
(CMOS)
Osel
Number of output
pins select pin
Input
(CMOS)
This pin controls the bias current of mini-LVDS receiver circuit. Please refer to the
following table.
RxBIAS1
RxBIAS2
L
L
H
H
L
H
L
H
IBIAS
I1 (Low power)
I2
I3
I4 (High power)
This pin selects the number of output pins.
Osel = L: 384-output mode
Osel = H: 360-output mode
Output pins S181 through S204 are invalid in 360-output mode.
SRC
ORC
Slew-rate control
Output resistance
control
MODE
Output reset control
Input
SRC = H: High-slew-rate mode (large current consumption)
(CMOS)
SRC = L: Low-slew-rate mode (small current consumption)
Input
ORC = H: Low output resistance mode
(CMOS)
ORC = L: High output resistance mode
Input
(CMOS)
4
MODE = H: Output reset
MODE = L: No output reset
Data Sheet S16316EJ2V0DS
µPD160010
(2/2)
Pin Symbol
Vsel1, Vsel2
Pin Name
VDD2 selector
I/O
Input
(CMOS)
Description
This pin controls the bias current of output amplifier.
Logic input to Vsel1 and Vsel2 have a dependence on VDD2 and load condition and so
on. Output waveform simulation should be done before decision.
V0 to V19
γ -corrected power
−
supplies
Vsel1
Vsel2
L
L
H
H
L
H
L
H
VDD2 Range (reference)
10.5 V TYP.
12.5 V TYP.
16.0 V TYP.
Non-assign
Input the γ -corrected power supplies from outside. Make sure to maintain the
following relationships. During the gray scale voltage output, be sure to keep the
gray scale level power supply at a constant level.
VDD2 − 0.2 V ≥ V0 > V1 > V2 > V3 > V4 > V5 > V6 > V7 > V8 > V9 ≥ 0.5 VDD2
0.5 VDD2 ≥ V10 > V11 >V12 > V13 > V14 > V15 > V16 >V17 > V18 > V19 ≥ VSS2 + 0.2 V
VDD1D
Low-voltage logic
−
VDD1A
Low-voltage analog
−
VDD2
Driver power supply
−
VSS1D
Low-voltage logic
−
Driver ground
TEST
TEST
Ground for internal logic circuit.
−
Ground for internal mini-LVDS receiver circuit.
−
Ground for internal high voltage circuit.
Please wire VSS1D and VSS1A in external circuit boards.
ground
VSS2
10.0 to 16.5 V
Please wire VSS1D and VSS1A in external circuit boards.
ground
Low-voltage analog
2.7 to 3.6 V
VDD1D and VDD1A should be same electric potential.
power supply
VSS1A
2.7 to 3.6 V
VDD1D and VDD1A should be same electric potential.
power supply
Input
Please leave these pins open in normal operation mode.
(CMOS)
Cautions 1. The power start sequence must be VDD1, logic input, and VDD2 & V0-V19 in that order. Reverse this
sequence to shut down.
2. To stabilize the supply voltage, please be sure to insert a 0.47 µ F bypass capacitor between
VDD1-VSS1 and VDD2-VSS2. Furthermore, for increased precision of the D/A converter,
insertion of a bypass capacitor of about 0.01 µ F is also advised between the γ -corrected power
supply terminals (V0, V1, V2,....., V19) and VSS2.
Data Sheet S16316EJ2V0DS
5
µPD160010
Table 4−1. Function (Bus-line Set-Back)
Pin Name
SB = L
D0A
D0(+)
D0B
D0(−)
D1A
D1(+)
D1B
D1(−)
CLKA
CLK(+)
CLKB
CLK(−)
D2A
D2(+)
D2B
D2(−)
D3A
D3(+)
D3B
D3(−)
Remark Suffix "+" indicates positive polarity and "−" indicates
negative polarity at each differential signal input pair.
Table 4−2. Function (R,/L and STHR(L))
R,/L
STHR
STHL
Shift Direction
H (Right shift)
IN
OUT
S1 → S384
L (Left shift)
OUT
IN
S384 → S1
Table 4−3. Function (POL and γ -corrected power supplies)
6
POL
Odd Numbered Output
H
V10-V19
V0-V9
L
V0-V9
V10-V19
Data Sheet S16316EJ2V0DS
Even Numbered Output
µPD160010
5. RELATIONSHIP BETWEEN INPUT DATA AND OUTPUT VOLTAGE VALUE
µ PD160010 incorporates a 8-bit D/A converter whose odd output pins and even output pins output respectively gray
scale voltages of differing polarity with respect to the LCD’s counter electrode (common electrode) voltage. The D/A
converter consists of ladder resistors and switches.
Figure 5−1 shows the relationship between the driving voltages such as liquid-crystal driving voltages VDD2, VSS2 and
common electrode potential VCOM, and γ -corrected voltages V0-V19 and the input data. Be sure to maintain the voltage
relationships of below.
VDD2 – 0.2 V ≥ V0 > V1 > V2 > V3 > V4 > V5 > V6 > V7 > V8 > V9 ≥ 0.5 VDD2
0.5 VDD2 ≥ V10 > V11 > V12 > V13 > V14 > V15 > V16 > V17 > V18 > V19 ≥ VSS2 + 0.2 V
Figures 5−2 shows γ -corrected power supply and ladder resistors ratio and figure 5−3 shows the relationship between
the input data and the output data.
Figure 5−1. Relationship between Input Data and γ -corrected Power Supplies
VDD2
0.2 V
V0
1
V1
14
V2
48
V3
64
V4
64
V5
32
17
V6
V7
14
V8
1
V9
Split interval
0.5 VDD2
V10
1
V11
14
V12
V13
17
32
V14
64
V15
64
V16
48
V17
14
V18
1
V19
0.2 V
VSS2
00 01 0F
3F
7F
Input data (HEX.)
Data Sheet S16316EJ2V0DS
BF
DF F0 FE FF
7
µPD160010
Figure 5−2. γ -corrected Power Supply and Ladder Resistors Ratio
V0
V10
R1
R10
V1
V11
R2
R11
V2
V12
R3
R12
V3
V13
R4
R13
V4
V14
R5
R14
V5
V15
R6
R15
V6
V16
R7
R16
V7
V17
R8
R17
V8
V18
R9
R18
V9
V19
Positive Polarity
R1, R18: r0
R2, R17: r1 to r14
R3, R16: r15 to r62
R4, R15: r63 to r126
R5, R14: r127 to r190
R6, R13: r191 to r222
R7, R12: r223 to r239
R8, R11: r240 to r253
R9, R10: r254
Rn
8
Ratio
R1, R18
173
R2, R17
1475
R3, R16
2419
R4, R15
2083
R5, R14
1940
R6, R13
1219
R7, R12
794
R8, R13
1373
R9, R10
525
Negative Polarity
rn
r0
r1
r2
r3
r4
r5
r6
r7
r8
r9
r10
r11
r12
r13
r14
r15
r16
r17
r18
r19
r20
r21
r22
r23
r24
r25
r26
r27
r28
r29
r30
r31
r32
r33
r34
r35
r36
r37
r38
r39
r40
r41
r42
r43
r44
r45
r46
r47
r48
r49
r50
r51
r52
r53
r54
r55
r56
r57
r58
r59
r60
r61
r62
r63
Ratio
173
155
142
131
122
114
107
102
97
93
89
85
82
79
77
74
72
70
69
67
65
64
62
61
60
59
58
57
56
55
54
53
52
51
51
50
49
49
48
47
47
46
46
45
45
44
44
43
43
43
42
42
41
41
41
40
40
40
39
39
39
38
38
38
rn
r64
r65
r66
r67
r68
r69
r70
r71
r72
r73
r74
r75
r76
r77
r78
r79
r80
r81
r82
r83
r84
r85
r86
r87
r88
r89
r90
r91
r92
r93
r94
r95
r96
r97
r98
r99
r100
r101
r102
r103
r104
r105
r106
r107
r108
r109
r110
r111
r112
r113
r114
r115
r116
r117
r118
r119
r120
r121
r122
r123
r124
r125
r126
r127
Data Sheet S16316EJ2V0DS
Ratio
38
37
37
37
37
36
36
36
36
35
35
35
35
35
34
34
34
34
34
34
33
33
33
33
33
33
33
32
32
32
32
32
32
32
32
31
31
31
31
31
31
31
31
31
31
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
29
29
rn
r128
r129
r130
r131
r132
r133
r134
r135
r136
r137
r138
r139
r140
r141
r142
r143
r144
r145
r146
r147
r148
r149
r150
r151
r152
r153
r154
r155
r156
r157
r158
r159
r160
r161
r162
r163
r164
r165
r166
r167
r168
r169
r170
r171
r172
r173
r174
r175
r176
r177
r178
r179
r180
r181
r182
r183
r184
r185
r186
r187
r188
r189
r190
r191
Ratio
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
31
31
31
31
31
31
31
31
31
32
32
32
32
32
32
32
33
33
33
33
33
33
34
34
rn
r192
r193
r194
r195
r196
r197
r198
r199
r200
r201
r202
r203
r204
r205
r206
r207
r208
r209
r210
r211
r212
r213
r214
r215
r216
r217
r218
r219
r220
r221
r222
r223
r224
r225
r226
r227
r228
r229
r230
r231
r232
r233
r234
r235
r236
r237
r238
r239
r240
r241
r242
r243
r244
r245
r246
r247
r248
r249
r250
r251
r252
r253
r254
Ratio
34
34
35
35
35
35
35
36
36
36
37
37
37
37
38
38
38
39
39
39
40
40
40
41
41
41
42
42
42
43
43
43
44
44
44
45
45
46
46
46
47
47
48
48
49
50
50
52
53
55
57
59
62
66
71
78
86
98
114
138
178
258
525
µPD160010
Figure 5−3. Relationship between Input Data and Output Voltage (1/2)
(Output voltage) VDD2 − 0.2 V ≥ V0 > V1 > V2 > V3 > V4 > V5 > V6 > V7 > V8 > V9 ≥ 0.5 VDD2
Data
00H
01H
02H
03H
04H
05H
06H
07H
08H
09H
0AH
0BH
0CH
0DH
0EH
0FH
10H
11H
12H
13H
14H
15H
16H
17H
18H
19H
1AH
1BH
1CH
1DH
1EH
1FH
20H
21H
22H
23H
24H
25H
26H
27H
28H
29H
2AH
2BH
2CH
2DH
2EH
2FH
30H
31H
32H
33H
34H
35H
36H
37H
38H
39H
3AH
3BH
3CH
3DH
3EH
3FH
Output Voltage
V0'
V1'
V2'
V3'
V4'
V5'
V6'
V7'
V8'
V9'
V10'
V11'
V12'
V13'
V14'
V15'
V16'
V17'
V18'
V19'
V20'
V21'
V22'
V23'
V24'
V25'
V26'
V27'
V28'
V29'
V30'
V31'
V32'
V33'
V34'
V35'
V36'
V37'
V38'
V39'
V40'
V41'
V42'
V43'
V44'
V45'
V46'
V47'
V48'
V49'
V50'
V51'
V52'
V53'
V54'
V55'
V56'
V57'
V58'
V59'
V60'
V61'
V62'
V63'
V0
V1
V2+(V1-V2) X
V2+(V1-V2) X
V2+(V1-V2) X
V2+(V1-V2) X
V2+(V1-V2) X
V2+(V1-V2) X
V2+(V1-V2) X
V2+(V1-V2) X
V2+(V1-V2) X
V2+(V1-V2) X
V2+(V1-V2) X
V2+(V1-V2) X
V2+(V1-V2) X
V2
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3+(V2-V3) X
V3
1320
1178
1047
925
811
704
602
505
412
323
238
156
77
/
/
/
/
/
/
/
/
/
/
/
/
/
1475
1475
1475
1475
1475
1475
1475
1475
1475
1475
1475
1475
1475
2345
2273
2203
2134
2067
2002
1938
1876
1815
1755
1696
1638
1581
1525
1470
1416
1363
1311
1260
1209
1159
1110
1061
1013
966
919
873
827
782
737
693
649
606
563
520
478
436
395
354
313
273
233
193
154
115
76
38
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
Data
40H
41H
42H
43H
44H
45H
46H
47H
48H
49H
4AH
4BH
4CH
4DH
4EH
4FH
50H
51H
52H
53H
54H
55H
56H
57H
58H
59H
5AH
5BH
5CH
5DH
5EH
5FH
60H
61H
62H
63H
64H
65H
66H
67H
68H
69H
6AH
6BH
6CH
6DH
6EH
6FH
70H
71H
72H
73H
74H
75H
76H
77H
78H
79H
7AH
7BH
7CH
7DH
7EH
7FH
V64'
V65'
V66'
V67'
V68'
V69'
V70'
V71'
V72'
V73'
V74'
V75'
V76'
V77'
V78'
V79'
V80'
V81'
V82'
V83'
V84'
V85'
V86'
V87'
V88'
V89'
V90'
V91'
V92'
V93'
V94'
V95'
V96'
V97'
V98'
V99'
V100'
V101'
V102'
V103'
V104'
V105'
V106'
V107'
V108'
V109'
V110'
V111'
V112'
V113'
V114'
V115'
V116'
V117'
V118'
V119'
V120'
V121'
V122'
V123'
V124'
V125'
V126'
V127'
Output Voltage
V4+(V3-V4) X 2045
V4+(V3-V4) X 2007
V4+(V3-V4) X 1970
V4+(V3-V4) X 1933
V4+(V3-V4) X 1896
V4+(V3-V4) X 1859
V4+(V3-V4) X 1823
V4+(V3-V4) X 1787
V4+(V3-V4) X 1751
V4+(V3-V4) X 1715
V4+(V3-V4) X 1680
V4+(V3-V4) X 1645
V4+(V3-V4) X 1610
V4+(V3-V4) X 1575
V4+(V3-V4) X 1540
V4+(V3-V4) X 1506
V4+(V3-V4) X 1472
V4+(V3-V4) X 1438
V4+(V3-V4) X 1404
V4+(V3-V4) X 1370
V4+(V3-V4) X 1336
V4+(V3-V4) X 1303
V4+(V3-V4) X 1270
V4+(V3-V4) X 1237
V4+(V3-V4) X 1204
V4+(V3-V4) X 1171
V4+(V3-V4) X 1138
V4+(V3-V4) X 1105
V4+(V3-V4) X 1073
V4+(V3-V4) X 1041
V4+(V3-V4) X 1009
V4+(V3-V4) X
977
V4+(V3-V4) X
945
V4+(V3-V4) X
913
V4+(V3-V4) X
881
V4+(V3-V4) X
849
V4+(V3-V4) X
818
V4+(V3-V4) X
787
V4+(V3-V4) X
756
V4+(V3-V4) X
725
V4+(V3-V4) X
694
V4+(V3-V4) X
663
V4+(V3-V4) X
632
V4+(V3-V4) X
601
V4+(V3-V4) X
570
V4+(V3-V4) X
539
V4+(V3-V4) X
509
V4+(V3-V4) X
479
V4+(V3-V4) X
449
V4+(V3-V4) X
419
V4+(V3-V4) X
389
V4+(V3-V4) X
359
V4+(V3-V4) X
329
V4+(V3-V4) X
299
V4+(V3-V4) X
269
V4+(V3-V4) X
239
V4+(V3-V4) X
209
V4+(V3-V4) X
179
V4+(V3-V4) X
149
V4+(V3-V4) X
119
V4+(V3-V4) X
89
V4+(V3-V4) X
59
V4+(V3-V4) X
29
V4
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
Data
80H
81H
82H
83H
84H
85H
86H
87H
88H
89H
8AH
8BH
8CH
8DH
8EH
8FH
90H
91H
92H
93H
94H
95H
96H
97H
98H
99H
9AH
9BH
9CH
9DH
9EH
9FH
A0H
A1H
A2H
A3H
A4H
A5H
A6H
A7H
A8H
A9H
AAH
ABH
ACH
ADH
AEH
AFH
B0H
B1H
B2H
B3H
B4H
B5H
B6H
B7H
B8H
B9H
BAH
BBH
BCH
BDH
BEH
BFH
V128'
V129'
V130'
V131'
V132'
V133'
V134'
V135'
V136'
V137'
V138'
V139'
V140'
V141'
V142'
V143'
V144'
V145'
V146'
V147'
V148'
V149'
V150'
V151'
V152'
V153'
V154'
V155'
V156'
V157'
V158'
V159'
V160'
V161'
V162'
V163'
V164'
V165'
V166'
V167'
V168'
V169'
V170'
V171'
V172'
V173'
V174'
V175'
V176'
V177'
V178'
V179'
V180'
V181'
V182'
V183'
V184'
V185'
V186'
V187'
V188'
V189'
V190'
V191'
Data Sheet S16316EJ2V0DS
Output Voltage
V5+(V4-V5) X 1911
V5+(V4-V5) X 1882
V5+(V4-V5) X 1853
V5+(V4-V5) X 1824
V5+(V4-V5) X 1795
V5+(V4-V5) X 1766
V5+(V4-V5) X 1737
V5+(V4-V5) X 1708
V5+(V4-V5) X 1679
V5+(V4-V5) X 1650
V5+(V4-V5) X 1621
V5+(V4-V5) X 1592
V5+(V4-V5) X 1563
V5+(V4-V5) X 1534
V5+(V4-V5) X 1505
V5+(V4-V5) X 1476
V5+(V4-V5) X 1447
V5+(V4-V5) X 1418
V5+(V4-V5) X 1389
V5+(V4-V5) X 1360
V5+(V4-V5) X 1331
V5+(V4-V5) X 1302
V5+(V4-V5) X 1273
V5+(V4-V5) X 1244
V5+(V4-V5) X 1215
V5+(V4-V5) X 1185
V5+(V4-V5) X 1155
V5+(V4-V5) X 1125
V5+(V4-V5) X 1095
V5+(V4-V5) X 1065
V5+(V4-V5) X 1035
V5+(V4-V5) X 1005
V5+(V4-V5) X
975
V5+(V4-V5) X
945
V5+(V4-V5) X
915
V5+(V4-V5) X
885
V5+(V4-V5) X
855
V5+(V4-V5) X
825
V5+(V4-V5) X
795
V5+(V4-V5) X
765
V5+(V4-V5) X
735
V5+(V4-V5) X
704
V5+(V4-V5) X
673
V5+(V4-V5) X
642
V5+(V4-V5) X
611
V5+(V4-V5) X
580
V5+(V4-V5) X
549
V5+(V4-V5) X
518
V5+(V4-V5) X
487
V5+(V4-V5) X
456
V5+(V4-V5) X
424
V5+(V4-V5) X
392
V5+(V4-V5) X
360
V5+(V4-V5) X
328
V5+(V4-V5) X
296
V5+(V4-V5) X
264
V5+(V4-V5) X
232
V5+(V4-V5) X
199
V5+(V4-V5) X
166
V5+(V4-V5) X
133
V5+(V4-V5) X
100
V5+(V4-V5) X
67
V5+(V4-V5) X
34
V5
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
Data
C0H
C1H
C2H
C3H
C4H
C5H
C6H
C7H
C8H
C9H
CAH
CBH
CCH
CDH
CEH
CFH
D0H
D1H
D2H
D3H
D4H
D5H
D6H
D7H
D8H
D9H
DAH
DBH
DCH
DDH
DEH
DFH
E0H
E1H
E2H
E3H
E4H
E5H
E6H
E7H
E8H
E9H
EAH
EBH
ECH
EDH
EEH
EFH
F0H
F1H
F2H
F3H
F4H
F5H
F6H
F7H
F8H
F9H
FAH
FBH
FCH
FDH
FEH
FFH
V192'
V193'
V194'
V195'
V196'
V197'
V198'
V199'
V200'
V201'
V202'
V203'
V204'
V205'
V206'
V207'
V208'
V209'
V210'
V211'
V212'
V213'
V214'
V215'
V216'
V217'
V218'
V219'
V220'
V221'
V222'
V223'
V224'
V225'
V226'
V227'
V228'
V229'
V230'
V231'
V232'
V233'
V234'
V235'
V236'
V237'
V238'
V239'
V240'
V241'
V242'
V243'
V244'
V245'
V246'
V247'
V248'
V249'
V250'
V251'
V252'
V253'
V254'
V255'
Output Voltage
V6+(V5-V6) X 1185
V6+(V5-V6) X 1151
V6+(V5-V6) X 1117
V6+(V5-V6) X 1082
V6+(V5-V6) X 1047
V6+(V5-V6) X 1012
V6+(V5-V6) X
977
V6+(V5-V6) X
942
V6+(V5-V6) X
906
V6+(V5-V6) X
870
V6+(V5-V6) X
834
V6+(V5-V6) X
797
V6+(V5-V6) X
760
V6+(V5-V6) X
723
V6+(V5-V6) X
686
V6+(V5-V6) X
648
V6+(V5-V6) X
610
V6+(V5-V6) X
572
V6+(V5-V6) X
533
V6+(V5-V6) X
494
V6+(V5-V6) X
455
V6+(V5-V6) X
415
V6+(V5-V6) X
375
V6+(V5-V6) X
335
V6+(V5-V6) X
294
V6+(V5-V6) X
253
V6+(V5-V6) X
212
V6+(V5-V6) X
170
V6+(V5-V6) X
128
V6+(V5-V6) X
86
V6+(V5-V6) X
43
V6
V7+(V6-V7) X
751
V7+(V6-V7) X
707
V7+(V6-V7) X
663
V7+(V6-V7) X
619
V7+(V6-V7) X
574
V7+(V6-V7) X
529
V7+(V6-V7) X
483
V7+(V6-V7) X
437
V7+(V6-V7) X
391
V7+(V6-V7) X
344
V7+(V6-V7) X
297
V7+(V6-V7) X
249
V7+(V6-V7) X
201
V7+(V6-V7) X
152
V7+(V6-V7) X
102
V7+(V6-V7) X
52
V7
V8+(V7-V8) X 1320
V8+(V7-V8) X 1265
V8+(V7-V8) X 1208
V8+(V7-V8) X 1149
V8+(V7-V8) X 1087
V8+(V7-V8) X 1021
V8+(V7-V8) X
950
V8+(V7-V8) X
872
V8+(V7-V8) X
786
V8+(V7-V8) X
688
V8+(V7-V8) X
574
V8+(V7-V8) X
436
V8+(V7-V8) X
258
V8
V9
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
794
794
794
794
794
794
794
794
794
794
794
794
794
794
794
794
/
/
/
/
/
/
/
/
/
/
/
/
/
1373
1373
1373
1373
1373
1373
1373
1373
1373
1373
1373
1373
1373
9
µPD160010
Figure 5−3. Relationship between Input Data and Output Voltage (2/2)
(Output voltage) 0.5 VDD2 ≥ V10 > V11 > V12 > V13 > V14 > V15 > V16 > V17 > V18 > V19 ≥ VSS2 + 0.2 V
Data
00H
01H
02H
03H
04H
05H
06H
07H
08H
09H
0AH
0BH
0CH
0DH
0EH
0FH
10H
11H
12H
13H
14H
15H
16H
17H
18H
19H
1AH
1BH
1CH
1DH
1EH
1FH
20H
21H
22H
23H
24H
25H
26H
27H
28H
29H
2AH
2BH
2CH
2DH
2EH
2FH
30H
31H
32H
33H
34H
35H
36H
37H
38H
39H
3AH
3BH
3CH
3DH
3EH
3FH
Output Voltage
V0''
V1''
V2''
V3''
V4''
V5''
V6''
V7''
V8''
V9''
V10''
V11''
V12''
V13''
V14''
V15''
V16''
V17''
V18''
V19''
V20''
V21''
V22''
V23''
V24''
V25''
V26''
V27''
V28''
V29''
V30''
V31''
V32''
V33''
V34''
V35''
V36''
V37''
V38''
V39''
V40''
V41''
V42''
V43''
V44''
V45''
V46''
V47''
V48''
V49''
V50''
V51''
V52''
V53''
V54''
V55''
V56''
V57''
V58''
V59''
V60''
V61''
V62''
V63''
10
V19
V18
V18+(V17-V18) X
V18+(V17-V18) X
V18+(V17-V18) X
V18+(V17-V18) X
V18+(V17-V18) X
V18+(V17-V18) X
V18+(V17-V18) X
V18+(V17-V18) X
V18+(V17-V18) X
V18+(V17-V18) X
V18+(V17-V18) X
V18+(V17-V18) X
V18+(V17-V18) X
V17
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V17+(V16-V17) X
V16
155
297
428
550
664
771
873
970
1063
1152
1237
1319
1398
/
/
/
/
/
/
/
/
/
/
/
/
/
1475
1475
1475
1475
1475
1475
1475
1475
1475
1475
1475
1475
1475
74
146
216
285
352
417
481
543
604
664
723
781
838
894
949
1003
1056
1108
1159
1210
1260
1309
1358
1406
1453
1500
1546
1592
1637
1682
1726
1770
1813
1856
1899
1941
1983
2024
2065
2106
2146
2186
2226
2265
2304
2343
2381
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
2419
Data
40H
41H
42H
43H
44H
45H
46H
47H
48H
49H
4AH
4BH
4CH
4DH
4EH
4FH
50H
51H
52H
53H
54H
55H
56H
57H
58H
59H
5AH
5BH
5CH
5DH
5EH
5FH
60H
61H
62H
63H
64H
65H
66H
67H
68H
69H
6AH
6BH
6CH
6DH
6EH
6FH
70H
71H
72H
73H
74H
75H
76H
77H
78H
79H
7AH
7BH
7CH
7DH
7EH
7FH
V64''
V65''
V66''
V67''
V68''
V69''
V70''
V71''
V72''
V73''
V74''
V75''
V76''
V77''
V78''
V79''
V80''
V81''
V82''
V83''
V84''
V85''
V86''
V87''
V88''
V89''
V90''
V91''
V92''
V93''
V94''
V95''
V96''
V97''
V98''
V99''
V100''
V101''
V102''
V103''
V104''
V105''
V106''
V107''
V108''
V109''
V110''
V111''
V112''
V113''
V114''
V115''
V116''
V117''
V118''
V119''
V120''
V121''
V122''
V123''
V124''
V125''
V126''
V127''
Output Voltage
V16+(V15-V16) X
38
V16+(V15-V16) X
76
V16+(V15-V16) X
113
V16+(V15-V16) X
150
V16+(V15-V16) X
187
V16+(V15-V16) X
224
V16+(V15-V16) X
260
V16+(V15-V16) X
296
V16+(V15-V16) X
332
V16+(V15-V16) X
368
V16+(V15-V16) X
403
V16+(V15-V16) X
438
V16+(V15-V16) X
473
V16+(V15-V16) X
508
V16+(V15-V16) X
543
V16+(V15-V16) X
577
V16+(V15-V16) X
611
V16+(V15-V16) X
645
V16+(V15-V16) X
679
V16+(V15-V16) X
713
V16+(V15-V16) X
747
V16+(V15-V16) X
780
V16+(V15-V16) X
813
V16+(V15-V16) X
846
V16+(V15-V16) X
879
V16+(V15-V16) X
912
V16+(V15-V16) X
945
V16+(V15-V16) X
978
V16+(V15-V16) X 1010
V16+(V15-V16) X 1042
V16+(V15-V16) X 1074
V16+(V15-V16) X 1106
V16+(V15-V16) X 1138
V16+(V15-V16) X 1170
V16+(V15-V16) X 1202
V16+(V15-V16) X 1234
V16+(V15-V16) X 1265
V16+(V15-V16) X 1296
V16+(V15-V16) X 1327
V16+(V15-V16) X 1358
V16+(V15-V16) X 1389
V16+(V15-V16) X 1420
V16+(V15-V16) X 1451
V16+(V15-V16) X 1482
V16+(V15-V16) X 1513
V16+(V15-V16) X 1544
V16+(V15-V16) X 1574
V16+(V15-V16) X 1604
V16+(V15-V16) X 1634
V16+(V15-V16) X 1664
V16+(V15-V16) X 1694
V16+(V15-V16) X 1724
V16+(V15-V16) X 1754
V16+(V15-V16) X 1784
V16+(V15-V16) X 1814
V16+(V15-V16) X 1844
V16+(V15-V16) X 1874
V16+(V15-V16) X 1904
V16+(V15-V16) X 1934
V16+(V15-V16) X 1964
V16+(V15-V16) X 1994
V16+(V15-V16) X 2024
V16+(V15-V16) X 2054
V15
/
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/
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/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
2083
Data
80H
81H
82H
83H
84H
85H
86H
87H
88H
89H
8AH
8BH
8CH
8DH
8EH
8FH
90H
91H
92H
93H
94H
95H
96H
97H
98H
99H
9AH
9BH
9CH
9DH
9EH
9FH
A0H
A1H
A2H
A3H
A4H
A5H
A6H
A7H
A8H
A9H
AAH
ABH
ACH
ADH
AEH
AFH
B0H
B1H
B2H
B3H
B4H
B5H
B6H
B7H
B8H
B9H
BAH
BBH
BCH
BDH
BEH
BFH
V128''
V129''
V130''
V131''
V132''
V133''
V134''
V135''
V136''
V137''
V138''
V139''
V140''
V141''
V142''
V143''
V144''
V145''
V146''
V147''
V148''
V149''
V150''
V151''
V152''
V153''
V154''
V155''
V156''
V157''
V158''
V159''
V160''
V161''
V162''
V163''
V164''
V165''
V166''
V167''
V168''
V169''
V170''
V171''
V172''
V173''
V174''
V175''
V176''
V177''
V178''
V179''
V180''
V181''
V182''
V183''
V184''
V185''
V186''
V187''
V188''
V189''
V190''
V191''
Output Voltage
V15+(V14-V15) X
29
V15+(V14-V15) X
58
V15+(V14-V15) X
87
V15+(V14-V15) X
116
V15+(V14-V15) X
145
V15+(V14-V15) X
174
V15+(V14-V15) X
203
V15+(V14-V15) X
232
V15+(V14-V15) X
261
V15+(V14-V15) X
290
V15+(V14-V15) X
319
V15+(V14-V15) X
348
V15+(V14-V15) X
377
V15+(V14-V15) X
406
V15+(V14-V15) X
435
V15+(V14-V15) X
464
V15+(V14-V15) X
493
V15+(V14-V15) X
522
V15+(V14-V15) X
551
V15+(V14-V15) X
580
V15+(V14-V15) X
609
V15+(V14-V15) X
638
V15+(V14-V15) X
667
V15+(V14-V15) X
696
V15+(V14-V15) X
725
V15+(V14-V15) X
755
V15+(V14-V15) X
785
V15+(V14-V15) X
815
V15+(V14-V15) X
845
V15+(V14-V15) X
875
V15+(V14-V15) X
905
V15+(V14-V15) X
935
V15+(V14-V15) X
965
V15+(V14-V15) X
995
V15+(V14-V15) X 1025
V15+(V14-V15) X 1055
V15+(V14-V15) X 1085
V15+(V14-V15) X 1115
V15+(V14-V15) X 1145
V15+(V14-V15) X 1175
V15+(V14-V15) X 1205
V15+(V14-V15) X 1236
V15+(V14-V15) X 1267
V15+(V14-V15) X 1298
V15+(V14-V15) X 1329
V15+(V14-V15) X 1360
V15+(V14-V15) X 1391
V15+(V14-V15) X 1422
V15+(V14-V15) X 1453
V15+(V14-V15) X 1484
V15+(V14-V15) X 1516
V15+(V14-V15) X 1548
V15+(V14-V15) X 1580
V15+(V14-V15) X 1612
V15+(V14-V15) X 1644
V15+(V14-V15) X 1676
V15+(V14-V15) X 1708
V15+(V14-V15) X 1741
V15+(V14-V15) X 1774
V15+(V14-V15) X 1807
V15+(V14-V15) X 1840
V15+(V14-V15) X 1873
V15+(V14-V15) X 1906
V14
Data Sheet S16316EJ2V0DS
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/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
1940
Data
C0H V192''
C1H V193''
C2H V194''
C3H V195''
C4H V196''
C5H V197''
C6H V198''
C7H V199''
C8H V200''
C9H V201''
CAH V202''
CBH V203''
CCH V204''
CDH V205''
CEH V206''
CFH V207''
D0H V208''
D1H V209''
D2H V210''
D3H V211''
D4H V212''
D5H V213''
D6H V214''
D7H V215''
D8H V216''
D9H V217''
DAH V218''
DBH V219''
DCH V220''
DDH V221''
DEH V222''
DFH V223''
E0H V224''
E1H V225''
E2H V226''
E3H V227''
E4H V228''
E5H V229''
E6H V230''
E7H V231''
E8H V232''
E9H V233''
EAH V234''
EBH V235''
ECH V236''
EDH V237''
EEH V238''
EFH V239''
F0H V240''
F1H V241''
F2H V242''
F3H V243''
F4H V244''
F5H V245''
F6H V246''
F7H V247''
F8H V248''
F9H V249''
FAH V250''
FBH V251''
FCH V252''
FDH V253''
FEH V254''
FFH V255''
Output Voltage
V14+(V13-V14) X
34
V14+(V13-V14) X
68
V14+(V13-V14) X
102
V14+(V13-V14) X
137
V14+(V13-V14) X
172
V14+(V13-V14) X
207
V14+(V13-V14) X
242
V14+(V13-V14) X
277
V14+(V13-V14) X
313
V14+(V13-V14) X
349
V14+(V13-V14) X
385
V14+(V13-V14) X
422
V14+(V13-V14) X
459
V14+(V13-V14) X
496
V14+(V13-V14) X
533
V14+(V13-V14) X
571
V14+(V13-V14) X
609
V14+(V13-V14) X
647
V14+(V13-V14) X
686
V14+(V13-V14) X
725
V14+(V13-V14) X
764
V14+(V13-V14) X
804
V14+(V13-V14) X
844
V14+(V13-V14) X
884
V14+(V13-V14) X
925
V14+(V13-V14) X
966
V14+(V13-V14) X 1007
V14+(V13-V14) X 1049
V14+(V13-V14) X 1091
V14+(V13-V14) X 1133
V14+(V13-V14) X 1176
V13
V13+(V12-V13) X
43
V13+(V12-V13) X
87
V13+(V12-V13) X
131
V13+(V12-V13) X
175
V13+(V12-V13) X
220
V13+(V12-V13) X
265
V13+(V12-V13) X
311
V13+(V12-V13) X
357
V13+(V12-V13) X
403
V13+(V12-V13) X
450
V13+(V12-V13) X
497
V13+(V12-V13) X
545
V13+(V12-V13) X
593
V13+(V12-V13) X
642
V13+(V12-V13) X
692
V13+(V12-V13) X
742
V12
V12+(V11-V12) X
53
V12+(V11-V12) X
108
V12+(V11-V12) X
165
V12+(V11-V12) X
224
V12+(V11-V12) X
286
V12+(V11-V12) X
352
V12+(V11-V12) X
423
V12+(V11-V12) X
501
V12+(V11-V12) X
587
V12+(V11-V12) X
685
V12+(V11-V12) X
799
V12+(V11-V12) X
937
V12+(V11-V12) X 1115
V11
V10
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/
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/
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
1219
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
794
794
794
794
794
794
794
794
794
794
794
794
794
794
794
794
/
/
/
/
/
/
/
/
/
/
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/
/
1373
1373
1373
1373
1373
1373
1373
1373
1373
1373
1373
1373
1373
µPD160010
6. FUNCTION DESCRIPTION
6.1 Input Data Mapping
Display data and control data (RST) are input to D0(+/−) to D3(+/−).
Data mapping is changed in response to the mode, and the mode is changed by STB.
<Data Input Mode>
CL K (+)
D0(+)
D00
D01
D02
D03
D04
D05
D06
D07
D00
D01
D1(+)
D10
D11
D12
D13
D14
D15
D16
D17
D10
D11
D2(+)
D20
D21
D22
D23
D24
D25
D26
D27
D20
D21
D3(+)
D30
D31
D32
D33
D34
D35
D36
D37
D30
D31
Data Input Cycle
6.2 Composition of Display Data
MSB
Dn7
LSB
Dn6
Dn5
Dn4
Dn3
Dn2
Dn1
Dn0
Remark n = 0 to 3
Data Sheet S16316EJ2V0DS
11
µPD160010
6.3 Relation between Display Data and Output Number
This relationship is irrespective of R,/L condition.
(1) In case of 384 channel output
(a) Right shift (R,/L = H)
Output
Display Data
S1
S2
S3
Æ
S382
S383
D00 to D07
D10 to D17
D20 to D27
Æ
D10 to D17
D20 to D27
S384
S383
S382
Æ
S3
S2
D30 to D37
D20 to D27
D10 to D17
Æ
D20 to D27
D10 to D17
S384
D30 to D37
(b) Left shift (R,/L = L)
Output
Display Data
S1
D00 to D07
(2) In case of 360 channel output
(a) Right shift (R,/L = H)
Output
Display Data
S1
S2
S3
S180
S181 to S204
S205
Æ
D30 to D37
NA
D00 to D07
Æ
S205
S204 to S181
S180
Æ
D00 to D07
NA
D30 to D37
Æ
Æ
D00 to D07 D10 to D17 D20 to D27 Æ
S382
D10 to D17
S383
S384
D20 to D27 D30 to D37
Remark NA: Non-assign
(b) Left shift (R,/L = L)
Output
Display Data
S384
S383
S382
Æ
D30 to D37 D20 to D27 D10 to D17 Æ
S3
D20 to D27
S2
D10 to D17
Remark NA: Non-assign
6.4 Cascade
Multiple chips can be used in a cascade connection.
• Input STHR(L) pad at lead (head) chip is fixed to H.
• Input STHR(L) after secondary chips are connected from output STHR(L) at foregoing chip.
• Output STHR(L) of final stage driver IC can support current load up to ±1.0 mA (MAX.) by using pull-up or
pull-down resistor.
12
Data Sheet S16316EJ2V0DS
S1
D00 to D07
µPD160010
6.5 Taking in the Display Data
(1) The lead (head) chip is set to control signal input mode (so called control mode),
and the receivers at D0(+/−) and CLK(+/−) of all chips are activated by rising edge of STB.
(2) Input the reset (RST) signal as L to D0(+/−). This RST should be kept over 200 ns after rising of STB.
(3) RST as H is input to D0(+/−) and H width should be over 50 ns and also over 3 CLK cycles.
(4) Input the RST as L to D0(+/−) and then changed to the data input mode function.
By the way, input STB again when a second RST is necessary.
(5) Data sampling starts at the rising edge of CLK after reading of "RST = L".
(6) At the same time data sampling starts, internal counter starts counting the data cycle for STHR(L)
signal generation.
(7) After data sampling is finished, the receivers turn OFF.
(8) After the receivers turn OFF, keep the timing for more than 5 CLK cycles until STB is applied.
(9) Figure 6−1 shows the rough timing chart from application of STB to the start of data sampling.
Figure 6−1 Timing from Start to Sampling (reference)
Read the Reset (RST)
Read the RST = L
CL K 1
CLK(+)
D0(+)
RST
Data1
Data2
Data1
Data2
Over than 50 ns
& 3 CLK cycle
D1(+) to D3(+)
200 ns
Start the data sampling
STB
STHR(L)
Control signal input mode
Data Sheet S16316EJ2V0DS
Data input mode
13
µPD160010
7. ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings (TA = 25°C, VSS1 = VSS2 = 0 V)
Parameter
Symbol
Ratings
Unit
V
Logic power supply voltage
VDD1
−0.5 to +4.0
Driver power supply voltage
VDD2
−0.5 to +18.0
V
Logic input voltage
VI1
−0.5 to VDD1 + 0.5
V
Logic output voltage
VO1
−0.5 to VDD1 + 0.5
V
Logic output current
IO
± 1.0
mA
Driver input voltage
VI2
−0.5 to VDD2 + 0.5
V
Driver output voltage
VO2
−0.5 to VDD2 + 0.5
V
Operating ambient temperature
TA
−10 to +90
°C
Storage temperature
Tstg
−55 to +125
°C
Caution Product quality may suffer if the absolute maximum rating is exceeded even momentarily for any
parameter. That is, the absolute maximum ratings are rated values at which the product is on the verge
of suffering physical damage, and therefore the product must be used under conditions that ensure that
the absolute maximum ratings are not exceeded.
Recommended Operating Range (TA = −10 to +90 °C, VSS1 = VSS2 = 0 V)
Parameter
Symbol
Logic power supply voltage
VDD1
Driver power supply voltage
VDD2
CMOS high-level input voltage
VIH
CMOS low-level input voltage
VIL
mini-LVDS input voltage
VI
Condition
MIN.
TYP.
MAX.
Unit
2.7
3.0
3.6
V
10.0
15.4
16.5
V
0.7 VDD1
VDD1
V
0
0.3 VDD1
V
0.3 + (VID/2)
(VDD1−1.2) −
V
STHR(L), R,/L, STB,
SB, POL, Osel, RxBIAS1,
RxBIAS2, SRC, ORC, Vsel1,
Vsel2
VDD1 =3.0 V, VID = 200 mV
(VID/2)
(Center)
mini-LVDS differential voltage range
VID
VDD1 = 3.0 V, VI = 1.7 V
200
600
mV
0.5 VDD2
VDD2 − 0.2
V
0.2
0.5 VDD2
V
0.2
VDD2 − 0.2
V
190
MHz
(Amplitude: peak to peak)
γ - corrected voltage
V0-V9
V10-V19
Driver output voltage
VOUT
Clock frequency
fCLK
CLKA, CLKB, TA = 25°C,
VDD1 = 3.0 V,
VID = 200 mV, VI = 1.7 V
14
Data Sheet S16316EJ2V0DS
159
µPD160010
Electrical Characteristics (TA = 25 °C, VDD1 = 3.0 V, VDD2 = 13.0 V, VSS1 = VSS2 = 0 V)
Parameter
Input leakage current
Symbol
IIL
Condition
MIN.
TYP.
MAX.
Unit
± 1.0
µA
12.0
16.3
kΩ
− 334
− 200
µA
STHR(L), R,/L, STB, SB, POL, Osel,
RxBIAS1, RxBIAS2, SRC, ORC, Vsel1,
Vsel2, CLKA, CLKB, D0A, D0B to D3A,
D3B
γ -corrected resistor value
Driver output current
Rγ
IVOH
V0-V9 = V10 -V19
VX = VDD2 − 0.2 V, VOUT = VX − 1.0 V
7.8
Note1
,
low output resistance mode (ORC = H)
Note1
µA
IVOL
VX = VSS2 + 0.2 V, VOUT = VX + 1.0 V
∆VP-P 1
Input: 00H to 3FH
± 10
± 20
mV
∆VP-P 2
Input: 40H to 7FH, 80H to BFH
±7
± 15
mV
∆VP-P 3
Input: C0H to FFH
±4
± 10
mV
AVO
Input: 3FH, 7FH, BFH
± 16
± 20
mV
7.50
mA
No CLK & Input, VDD1 = 3.6 V
4.50
mA
Raster pattern, VDD2 = 16.5 V,
30.0
mA
30.0
mA
,
360
527
low output resistance mode (ORC = H)
Output swing voltage difference
deviation
Note2
Output swing voltage average
deviation
Note3
Logic dynamic current consumption
IDD11
Checkered,
fSTB = 100 kHz (PW = 500 ns),
fCLK =159 MHz, VDD1 = 3.6 V
Logic static current consumption
IDD12
Driver dynamic current consumption IDD21
fSTB = 100 kHz (PW = 500 ns),
with no load
Driver static current consumption
IDD22
Raster pattern, VDD2 = 16.5 V,
Input: FFH, with no load
★ Notes1. VX refers to the output voltage of analog output pins S1 to S384.
VOUT refers to the voltage applied to analog output pins S1 to S384.
2. Amplitude offset when all of output ports out same data.
3. Deviation of averaged amplitude offset value between chips.
Data Sheet S16316EJ2V0DS
15
µPD160010
Switching Characteristics (TA = 25 °C, VDD1 = 3.0 V, VDD2 = 13.0 V, VSS1 = VSS2 = 0 V)
Parameter
Symbol
Condition
MIN.
6
TYP.
MAX.
Unit
Start pulse delay time
t1
CL = 50 pF
15
22
ns
Driver output delay time
t2
RL = 7 kΩ, CL = 65 pF
2.1
2.5
µs
t3
Refer to <Test Condition >
3.9
5.0
µs
1.3
2.5
µs
t4
3.4
5.0
µs
CMOS interface, STHR(L)
10
15
pF
mini-LVDS interface,
5
10
pF
t5
Input capacitance
CI1
CI2
Except STHR(L), V0-V19
<Test Condition>
Measurement point
RL1
RL2
RL3
RL4
RL5
Output
RLn = 1.4 kΩ
CLn = 13 pF
CL1
CL2
CL3
CL4
CL5
GND
Timing Requirements (TA = 25 °C, VDD1 = 3.0 V, VSS1 = 0 V, tr = tf = 0.5 ns)
Parameter
Symbol
Condition
MIN.
TYP.
MAX.
Unit
Clock pulse width
t6
5.2
6.2
ns
Clock pulse high period
t7
2.1
2.6
ns
Clock pulse low period
t8
2.1
2.6
ns
Data setup time
t9
1.0
ns
Data hold time
t10
1.0
ns
Start pulse setup time
t11
0
ns
STB pulse width
t13
200
ns
POL setup time
t14
−5.0
ns
RST high period
t16
50.0
ns
3
CLK
Receiver OFF to STB timing
t17
5
CLK
STB to RST input time
t18
200
ns
Remark Unless otherwise specified, VIH and VIL of the CMOS signals are defined as VIH = 0.7 VDD1, VIL = 0.3 VDD1.
16
Data Sheet S16316EJ2V0DS
CLK(+)
50%
CLK(−)
365/2525
50%
50%
50%
1/1
50%
LV0(+)
Data
Data
Data
NA
NA
80%
20%
20%
NA
NA
NA
NA
RST = L
RST = L RST = H
RST = H
NA
RST = L
NA
Data Sheet S16316EJ2V0DS
STHR(L)/Input@#1
Data
Data
NA
NA
NA
NA
NA
NA
NA
NA
NA
50%
Data
Data
Control Signal Input Mode
LV0(+/−) to Data
LV3(+/−)
2/2
50%
359/359
1/361
5/365
9/369
50%
50%
50%
50%
NA
NA
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data Input Mode
NA
NA
Data
Data
Data
Data
Fixed "H"
t1
t 12
70%
"L" 30%
STHR(R)/Output@#1
STHR(L)/Input@#2
t 19
t 17
t 18
t 13
70%
30%
STB
70%
t 14
POL
10/370
t 9 t 10 t 9 t 10
t 16
Last Data Timing
LV0(−)
t 21
t 20
361/2521
30%
t 15
70%
30%
70%
30%
t3
t2
8 Bit Accuracy
−0.1 VDD2
Hi-Z
Output
t4
t5
8 Bit Accuracy
"H"
"H"
70%
30%
t 11
"L"
17
µPD160010
+0.1 VDD2
t1
t 12
t 11
Switching Characteristic Waveform (R,/L = H)
t8
t7
360/2520
Unless otherwise specified, VIH and VIL of the CMOS signals are defined as VIH = 0.7 VDD1, VIL = 0.3 VDD1.
Read the Reset = L
Also, unless otherwise specified, VIH and VIL of the mini-LVDS signals are defined as VIH = VIL = VI (Center of VID).
Read the Reset = H
t6
(Clock and display data numbers are examples when W-SXGA+ is used.)
<Mode = "H" (360ch mode)> @W-SXGA+: 1680 x 1050
µPD160010
★ 8. RECOMMENDED MOUNTING CONDITIONS
The following conditions must be met for mounting conditions of the µPD160010.
For more details, refer to the
[Semiconductor Device Mount Manual] (http://www.necel.com/pkg/en/mount/index.html)
Please consult with our sales offices in case other mounting process is used, or in case the mounting is done under
different conditions.
µPD160010N-xxx: TCP (TAB Package)
Mounting Condition
Thermocompression
Mounting Method
Soldering
Condition
Heating tool 300 to 350°C, heating for 2 to 3 sec, pressure 100g (per
solder).
2
ACF
Temporary bonding 70 to 100°C, pressure 3 to 8 kg/cm , time 3 to 5
(Adhesive Conductive
sec. Real bonding 165 to 180°C pressure 25 to 45 kg/cm , time 30 to
Film)
40 sec. (When using the anisotropy conductive film SUMIZAC1003 of
2
Sumitomo Bakelite, Ltd.)
Caution To find out the detailed conditions for mounting the ACF part, please contact the ACF
manufacturing company. Be sure to avoid using two or more mounting methods at a time.
18
Data Sheet S16316EJ2V0DS
µPD160010
NOTES FOR CMOS DEVICES
1
VOLTAGE APPLICATION WAVEFORM AT INPUT PIN
Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the
CMOS device stays in the area between VIL (MAX) and VIH (MIN) due to noise, etc., the device may
malfunction. Take care to prevent chattering noise from entering the device when the input level is fixed,
and also in the transition period when the input level passes through the area between VIL (MAX) and
VIH (MIN).
2
HANDLING OF UNUSED INPUT PINS
Unconnected CMOS device inputs can be cause of malfunction. If an input pin is unconnected, it is
possible that an internal input level may be generated due to noise, etc., causing malfunction. CMOS
devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed
high or low by using pull-up or pull-down circuitry. Each unused pin should be connected to VDD or GND
via a resistor if there is a possibility that it will be an output pin. All handling related to unused pins must
be judged separately for each device and according to related specifications governing the device.
3
PRECAUTION AGAINST ESD
A strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and
ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as
much as possible, and quickly dissipate it when it has occurred.
Environmental control must be
adequate. When it is dry, a humidifier should be used. It is recommended to avoid using insulators that
easily build up static electricity. Semiconductor devices must be stored and transported in an anti-static
container, static shielding bag or conductive material. All test and measurement tools including work
benches and floors should be grounded.
The operator should be grounded using a wrist strap.
Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for
PW boards with mounted semiconductor devices.
4
STATUS BEFORE INITIALIZATION
Power-on does not necessarily define the initial status of a MOS device. Immediately after the power
source is turned ON, devices with reset functions have not yet been initialized. Hence, power-on does
not guarantee output pin levels, I/O settings or contents of registers. A device is not initialized until the
reset signal is received. A reset operation must be executed immediately after power-on for devices
with reset functions.
Data Sheet S16316EJ2V0DS
19