STT3998N Dual N-Ch Enhancement Mode Mos.FET 3.7 A, 20 V, RDS(ON) 58 m Elektronische Bauelemente RoHS Compliant Product A suffix of “-C” specifies halogen and lead-free TSOP-6 DESCRIPTION A E These miniature surface mount MOSFETs utilize a high cell density trench process to provide low RDS(on) and to ensure minimal power loss and heat dissipation. Typical applications are DC-DC converters and power management in portable and battery-powered products such as computers, printers, PCMCIA cards, cellular and cordless telephones. F 20 2 3 C H J K REF. A B C D E F PRODUCT SUMMARY PRODUCT SUMMARY RDS(on) (m 58@VGS= 4.5V 82@VGS= 2.5V 1 DG Low RDS(on) provide higher efficiency and extends battery life. Low thermal impedance copper leadframe TSOP-6 saves board space. Fast switching speed. High performance trench technology. VDS(V) L 4 B FEATURES 5 6 Millimeter Min. Max. 2.70 3.10 2.60 3.00 1.40 1.80 1.10 MAX. 1.90 REF. 0.30 0.50 REF. G H J K L Millimeter Min. Max. 0 0.10 0.60 REF. 0.12 REF. 0° 10° 0.95 REF. ID(A) 3.7 3.1 G D S S G D ABSOLUTE MAXIMUM RATINGS(TA=25°C UNLESS OTHERWISE NOTED) Parameter Symbol VDS VGS Drain-Source Voltage Gate-Source Voltage Continuous Drain Current TA= 25°C TA= 70°C a Pulsed Drain Current b Continuous Source Current (Diode Conduction) a ID IDM IS TA= 25°C TA= 70°C Power Dissipation a Operating Junction and Storage Temperature Range PD Tj, Tstg Ratings Maximum 20 ±12 3.7 2.9 8 1.05 1.15 0.7 -55 ~ 150 Unit V V A A A W °C THERMAL RESISTANCE RATINGS Parameter Maximum Junction to Ambient a t ≦ 10 sec Steady State Symbol Typ. Max. Unit RJA 93 130 110 150 °C / W Notes a. Surface Mounted on 1” x 1” FR4 Board. b. Pulse width limited by maximum junction temperature. http://www.SeCoSGmbH.com/ 27-Aug-2010 Rev. A Any changes of specification will not be informed individually. Page 1 of 2 STT3998N Dual N-Ch Enhancement Mode Mos.FET 3.7 A, 20 V, RDS(ON) 58 m Elektronische Bauelemente ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise specified) Parameter Gate-Threshold Voltage Symbol Min. Typ. Max. Unit Test Conditions VGS(th) 0.7 - - V VDS=VGS, ID= 250uA Gate-Body Leakage IGSS - - 1 uA VDS= 0V, VGS= 12V - - 0.1 Zero Gate Voltage Drain Current IDSS On-State Drain Current a Drain-Source On-Resistance a ID(on) RDS(ON) uA - - 1 30 - - - - 58 VDS= 16V, VGS= 0V, TJ= 55°C A VDS = 5V, VGS= 4.5V mΩ - - 82 VDS= 16V, VGS= 0V VGS= 4.5V, ID= 3.7A VGS= 2.5V, ID= 2.7A Forward Transconductance a gfs - 10 - S VDS= 10V, ID= 6.8A Diode Forward Voltage a VSD - 0.8 - V IS= 1.05A, VGS= 0V DYNAMIC b Total Gate Charge Qg - 7.5 - Gate-Source Charge Qgs - 0.6 - Gate-Drain Charge Qgd - 1.0 - Turn-on Delay Time Td(on) - 5 - Tr - 12 - Td(off) - 13 - Tf - 7 - Rise Time Turn-off Delay Time Fall Time nC VDS= 10V, VGS= 4.5V, ID= 3.7A nS VDD= 10V, VGS= 4.5V, RGEN= 15, ID= 1A Notes a. Pulse test：PW ≦ 300 us duty cycle ≦ 2%. b. Guaranteed by design, not subject to production testing. http://www.SeCoSGmbH.com/ 27-Aug-2010 Rev. A Any changes of specification will not be informed individually. Page 2 of 2