ANPEC APW7176A

APW7176A
Dual 1.5MHz, 1A Synchronous Step-Down Converter
Features
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•
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•
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General Description
The APW7176A consists of two independent 1.5MHz constant frequency, current mode, and PWM step-down
1A Output Current on Each Channel
2.7V to 5.5V Input Voltage Range
converters. Each converter integrates a main switch with
a synchronous rectifier for high efficiency without an ex-
1.5MHz Constant Frequency Operation
Low Dropout Operation at 100% Duty Cycle
ternal Schottky diode. The APW7176A is ideal for powering portable equipment that runs from a single cell
Synchronous Topology
0.6V Low Reference Voltage
Lithium-Ion (Li+) battery. Each converter can supply 1A of
load current from a 2.7V to 5.5V input voltage. The output
Current Mode Operation
Over-Temperature Protection
voltage can be regulated as low as 0.6V. The APW7176A
can also run at 100% duty cycle for low dropout
Over-Current Protection
applications.
Up to 94% Efficiency
Pin Configuration
Internally Compensated
Lead Free and Green Devices Available
APW7176A
(RoHS Compliant)
EN1 1
FB1 2
Applications
•
•
10 SW1
IN2 3
TV Tuner/Box
9 GND1
TDFN3x3-10
(Top View)
8 IN1
GND2 4
7 FB2
SW2 5
6 EN2
Portable Instrument
Exposed pad
on backside
Ordering and Marking Information
Package Code
QB : TDFN3x3-10
Temperature Range
I : -40 to 85 oC
Handling Code
TR : Tape & Reel
Assembly Material
G : Halogen and Lead Free Device
APW7176A
Assembly Material
Handling Code
Temperature Range
Package Code
APW7176A QB:
APW
7176A
XXXXX
XXXXX - Date Code
Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which
are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for
MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen
free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by
weight).
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Oct., 2012
1
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APW7176A
Absolute Maximum Ratings
Symbol
(Note 1)
Parameter
Rating
Unit
VIN1/IN2
Input Supply Voltage (IN1/IN2 to GND1/GND2)
-0.3 ~ 6
V
VFB1/FB2
Voltage on FB1 and FB2 (FB1/FB2 to GND1/GND2)
-0.3 ~ VIN1/IN2+0.3
V
VEN1/EN2
Voltage on EN1 and EN2 (EN1/EN2 to GND1/GND2)
-0.3 ~ VIN1/IN2+0.3
V
VSW1/SW2
Voltage on SW1 and SW2 (SW1/SW2 to GND1/GND2)
-0.3 ~ VIN1/IN2+0.3
V
ISW_PEAK
Peak SW Current
1.8
A
2
W
o
PD
Maximum Power Dissipation (TA=25 C)
TJ
Maximum Junction Temperature
TSTG
Storage Temperature Range
TSDR
Maximum Lead Soldering Temperature, 10 Seconds
150
°C
-65 ~ 150
°C
260
°C
Note1: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are
stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device
reliability.
Thermal Characteristics
Symbol
Parameter
θJA
Junction-to-Ambient Resistance in Free Air
θJC
Junction-to-Case Resistance in Free Air
Typical Value
Unit
(Note 2)
TDFN3x3-10
TDFN3x3-10
50
°C/W
12
Note 2: θJA is measured on with the device mounted the PCB with top-layer pad of approximate 1” square of 1 oz copper.
Recommended Operating Conditions
Symbol
VIN1/IN2
R2/R4
Parameter
Input Supply Voltage (IN1/IN2 to GND1/GND2)
Feedback Resistance
(Note 3)
Range
Unit
2.7 ~ 5.5
V
~ 300
kΩ
IOUT
Output Current
0 ~ 1
A
TA
Operating Ambient Temperature
-40 ~ 85
°C
TJ
Operating Junction Temperature
-40 ~ 125
°C
Note 3: Please refer to the typical application circuit.
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Oct., 2012
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APW7176A
Electrical Characteristics
The denotes the specifications that apply over VIN=3.6V and TA =25°C, unless otherwise specifications.
Symbol
Parameter
VIN1/IN2
Each Converter Input Voltage Range
IFB1/FB2
FB1/FB2 Input Current
VFB1/FB2=0.6V
VREF1/REF2
Each Converter Reference Voltage
IOUT=0mA~1A
∆VREF1/REF2
Each Converter Reference Voltage Line
Regulation
-40 C≤TA≤85 C
Each Converter Peak Inductor Current
VIN1/IN2=3.3V, VFB=0.5V or
VOUT=90%, Duty cycle < 35%
Each Converter Load Regulation
Each Converter Switching Current
IPK
IDD
fOSC
Each Converter Quiescent Current in
Shutdown
Each Converter Oscillator Frequency
fOSC_FFB
Each Converter Frequency Foldback
ISD
RDS-P
RDS-N
VEN1/EN2
TOTP
Each Converter On Resistance of
PMOSFET
Each Converter On Resistance of
NMOSFET
Each Converter Enable Threshold
Unit
Min.
Typ.
Max.
2.7
-
5.5
V
-30
-
30
nA
0.588
0.6
0.612
V
-
0.04
-
%/V
1.4
1.6
-
A
IOUT=10mA~1A
-
0.5
-
%
VFB1/FB2=0.6V, SW1/SW2
Floating
-
2
-
mA
VEN1/EN2=0V, VIN=4.2V
-
-
1
µA
1.2
1.5
1.8
MHz
VFB=0V
-
210
-
kHz
ISW =100mA
-
0.28
-
Ω
ISW =-100mA
-
0.25
-
Ω
0.4
-
1
-
150
-
o
-
o
o
o
VFB=0.6V
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Oct., 2012
APW7176A
Test Conditions
-
3
50
V
C
C
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APW7176A
Typical Operating Characteristics
(Refer to the application circuit in the section “Typical Application Circuits”, VIN=3.6V, VOUT=1.8V, TA=25oC unless
otherwise specified )
Efficiency vs. Load Current
Efficiency vs. Load Current
100
100
90
90
80
80
70
Efficiency (%)
Efficiency (%)
70
60
VIN=5V
VIN=3.3V
50
40
60
50
VIN=3.3V
40
30
30
VOUT = 1.8V
L = 2.2µH
COUT = 10µF
20
10
VOUT = 1.2V
L = 2.2µH
COUT = 10µF
20
10
0
0
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
1
0
0.1
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
Load Current, IOUT(A)
Supply Voltage v.s. Quiescent Current
Supply Voltage vs. ON Resistance
0.35
35
0.30
30
ON Resistance(Ω)
Quiescent Current, IDD(µA)
1
Load Current, IOUT(A)
40
25
20
15
10
RP-FET
0.25
0.20
RN-FET
0.15
0.10
0.05
5
0
VIN=5V
2
2.5
3
3.5
4
4.5
5
5.5
0.00
6
Supply Voltage, V IN(V)
2
2.5
3
3.5
4
4.5
5
5.5
6
Supply Voltage, VIN(V)
Supply Voltage v.s. Reference Voltage
0.65
Reference Voltage, VREF(V)
0.64
0.63
0.62
0.61
0.6
0.59
0.58
0.57
0.56
0.55
2
2.5
3
3.5
4
4.5
5
5.5
6
Supply Voltage, VIN (V)
Copyright  ANPEC Electronics Corp.
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APW7176A
Operating Waveforms
(Refer to the application circuit in the section “Typical Application Circuits”, VIN=3.6V, VOUT=1.8V, TA=25oC unless
otherwise specified)
Soft Start
Load Transient Response
1A
1
VEN
300mA
1
VOUT ,1V/Div, DC
2
IOUT, 0.5A/Div, DC
VOUT ,100mV/Div, AC
2
3
IIN, 200mA/Div
L=2.2µH, VIN=5V, VOUT=1.8V, COUT=10µF
L=2.2µH, VIN=5V, COUT=10µF
Time: 100µs/Div
Time: 100µs/Div
Normal Operation
2.5V
1.5V
VIN, 0.5V/Div
1
VSW ,2V/Div, DC
2
VOUT ,20mV/Div, AC
VOUT,200mV/Div,AC
IL, 500mA/Div, DC
3
L=2.2µH, VINI=5V,
VOUT=1.2V, COUT=10µF
OUT = 100mA
Time: 500ns/Div
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Oct., 2012
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APW7176A
Pin Description
PIN
FUNCTION
NO.
NAME
1
EN1
Channel 1 Enable Control Input. Drive EN1 above 1V to turn on the Channel 1. Drive EN1 below 0.4V to
turn it off. In shutdown situation, all functions are disabled to decrease the supply current below 1µA.
Don’t left this pin floating.
2
FB1
Channel 1 Feedback Input. Connect FB1 to the center point of the external resistor divider. The
feedback voltage is 0.6V.
3
IN2
Channel 2 Supply Input. Bypass to the GND2 with a 4.7µF or greater ceramic capacitor.
4
GND2
Ground 2. Connected the exposed pad to the GND2.
5
SW2
Channel 2 Power Switch Output. Inductor connection to drains of the internal PMOSFET and NMOSFET
switches.
6
EN2
Channel 2 Enable Control Input. Drive EN2 above 1V to turn on the Channel 2. Drive EN2 below 0.4V to
turn it off. In shutdown situation, all functions are disabled to decrease the supply current below 1µA.
Don’t left this pin floating.
7
FB2
Channel 2 Feedback Input. Connect FB2 to the center point of the external resistor divider. The
feedback voltage is 0.6V.
8
IN1
Channel 1 Supply Input. Bypass to the GND1 with a 4.7µF or greater ceramic capacitor.
9
GND1
Ground 1. Connected the exposed pad to the GND1.
10
SW1
Channel 1 Power Switch Output. Inductor connection to drains of the internal PMOSFET and NMOSFET
switches.
Exposed
Pad
NC
No Internal Connection. Connecting this pad to GND1 and GND2.
Block Diagram
IN1/IN2
EN1/EN2
Shutdown
Control
Logic Control
SW1/SW2
Gate
Driver
OverTemperature
Protection
Current
Limit
∑
GND1/GND2
Oscillator
ICMP
FB1/FB2
COMP
EAMP
Softstart
VREF
0.6V
Diagram Represents 1/2 of the APW7176A
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Oct., 2012
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APW7176A
Typical Application Circuit
V IN 1 /IN 2
C IN 1
4 .7µ F
R5
1 0 0 kΩ
IN 1
VOUT1
1.2 V
1A
EN2
EN 1
OFF ON
R6
100k Ω
IN 2
L1
2.2µH
A P W 7 1 76 A
SW 2
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Oct., 2012
R2
150 k Ω
C O U T2
10µ F
FB2
FB1
10 pF
V OUT2
3 .3V
1A
R3
300 kΩ
R1
150 k Ω
C OUT1
10 µ F
OFF ON
L2
2 .2 µH
SW 1
C IN 2
4.7µF
GND1 GND2
R4
47 k Ω
7
10p F
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APW7176A
Function Description
Main Control Loop
Junction Temperature (TJ ) during continuous thermal
overload conditions, increasing the lifetime of the device.
The APW7176A has dual independent constant frequency,
current-mode PWM step-down converters. During nor-
Enable/Shutdown
mal operation, the internal P-channel power MOSFET is
turned on each cycle when the oscillator sets an internal
For each channel, driving EN to the ground places the
RS latch and is turned off when an internal comparator
(ICMP) resets the latch. The peak inductor current at which
channel in shutdown mode. When in shutdown, the internal power MOSFETs are turned off, all internal circuitry
ICMP resets the RS latch is controlled by the voltage on
the COMP, which is the output of the error amplifier
shuts down, and the quiescent supply current reduces to
1µA maximally.
(EAMP). An external resistive divider connected between
VOUT and ground allows the EAMP to receive an output
feedback voltage VFB at FB pin. When the load current
increases, it causes a slightly decrease in VFB associated
with the 0.6V reference, which in turn causes the COMP
voltage to increase until the average inductor current
matches the new load current.
Soft-Start
Each channel in the APW7176A has a built-in soft-start to
control the output voltage rise during start-up. During softstart, an internal ramp, connected to the one of the positive inputs of the error amplifier, raise up to replace the
reference voltage (0.6V typical) until the ramp voltage
reaches the reference voltage.
Short Circuit Protection
For each channel, when the output is shortened to the
ground, the frequency of the oscillator will be reduced to
210kHz. This lower frequency allows the inductor current
to safely discharge, thereby preventing current runaway.
The oscillator’s frequency will gradually increase to its
designed rate when the feedback voltage on the FB again
approaches 0.6V.
Over-Temperature Protection (OTP)
For each channel, the over-temperature circuit limits the
junction temperature of the APW7176A. When the junction temperature exceeds 150oC, a thermal sensor turns
off the power MOSFETs, allowing the channels to cool
down. The thermal sensor allows the converter to start a
soft-start process and to regulate the output voltage again
after the junction temperature cools by 40οC. The OTP is
designed with a 40οC hysteresis to lower the average
Copyright  ANPEC Electronics Corp.
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APW7176A
Application Information
IL
Inductor Selection
IOUT
Due to the high switching frequency as 1.5MHz, the inductor value of the application of the APW7176A is usually
in the range from 1µH to 4.7µH. The criterion of selecting
IIN
0A
a suitable inductor depends on its maximum current ripple.
The maximum current ripple defines as 40% of the fully
I(CIN)
IIN
0A
load current. In the APW7176A applications, the maximum
value of current ripple is 400mA, the 40% of 1A. Calculate
L by the equation (1):
L=
(VIN − VOUT ) ⋅ VOUT ⋅
VIN
1
...............(1)
∆IL ⋅ fOSC
0A
I(COUT)
where fOSC is the switching frequency of APW7176A and
∆IL is the value of the maximum current ripple. It can be
I(Q1)
any value of current ripple that smaller than the maximum
value you can accept. In order to perform high efficiency,
selecting a low DC resistance inductor is a helpful way.
Another important parameter is the DC current rating of
IOUT
0A
the inductor. The minimum value of DC current rating
equals the full load value of 1A, and then plus the half of
D*TS
the current ripple. Choose inductors with suitable DC cur-
PWM
(1-D)*TS
rent rating to ensure the inductors don’t operate in the
saturation.
0A
Figure-2
Input Capacitor Selection
By observing the waveform of I(CIN), the RMS value of I(CIN)
is
The input capacitor must be able to support the maximum input operating voltage and maximum RMS input
I(CIN ) =
current. The Buck converter absorbs pulse current from
input power source.
[(I
OUT
] (
− IIN ) ⋅ D + IIN ⋅ 1 − D
2
2
)
2
.....( 2)
Replace D and IIN by following relation:
I(Q1)
D=
I(CIN)
IIN
Q1
L
VIN
CIN
IIN = D ⋅ IOUT .........................( 4 )
I(L)
Q2
VOUT
..............................(3)
VIN
I(COUT)
COUT
The RMS value of input capacitor current equal:
IOUT
I(CIN ) = IOUT ⋅ D(1 − D) ............(5)
PWM
When D=0.5, the RMS current of input capacitor will be
maximum value. Use this value to choose the input capacitor with suitable current rating.
Figure-1
Figure-1 shows a schematic of a Buck converter. The
waveforms are shown as Figure-2.
Copyright  ANPEC Electronics Corp.
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APW7176A
Application Information (Cont.)

TS
∆VOUT = ∆IL ⋅  ESR +
8 ⋅ COUT

Output Capacitor Selection
The output voltage ripple is a significant parameter to
estimate the performance of a convertor. There are two

.................(8)


Thermal Consideration
discrete components that affect the output voltage ripple
to be bigger or smaller. It is recommended to use the
APW7176A is a high efficiency switching converter, it
criterion mentioned in the "Inductor Selection" to choose
a suitable inductor. Then, based on this known inductor
means less power loss transferred into heat. Due to the
on resistance difference between internal power
current ripple, the value and equivalent-series-resistance
(ESR) of output capacitor will affect the output voltage ripple
PMOSFET and NMOSFET, the power dissipation at high
duty cycle is greater than the low duty cycle. The worst
to be smaller or larger. The output voltage ripple consists
of two portions, one is the product of ESR and inductor
case in the dropout operation is the conduction loss dissipate mainly on the internal power PMOSFET. The power
current ripple, the other portion is the function of the inductor current ripple and the output capacitance. Figure-3
dissipation is nearly defined as:
PD = (IOUT ) [RDS−P ⋅ D + RDS−N ⋅ (1 − D)].......(9)
2
illustrates the waveform of the ripple voltage which is
generated when the inductor ripple current charges or
The APW7176A provides internal over-temperature
protection. When the junction temperature reaches 150
discharges the pure capacitor without the ESR.
degrees centigrade, the APW7176 will turn off both internal power PMOSFET and NMOSFET. The estimation of
the junction temperature, TJ, is defined as:
∆IL
0A
I(COUT)
TJ = PD ⋅ θJA ............................................(10 )
where the θJA is the thermal resistance of the package
utilized by the APW7176A.
0.5TS
∆VOUT1
Output Voltage Setting
V OUT
Then APW7176A has the adjustable version for output
voltage setting by the users. A suggestion of maximum
value of R2 is 300kΩ to keep the minimum current that
Figure-3
Evaluate the ∆VOUT1 by the ideal of energy equalization.
provides enough noise rejection ability through the resistor divider. The output voltage is programmed by the
According to the definition of Q,
Q=
equation as below:
11
1 
 ∆IL ⋅ TS  = COUT ⋅ ∆VOUT 1 ....( 6 )
22
2 

R 
VOUT = 0.6 ⋅ 1 + 1 ...............................(11)
 R2 
where TS is the inverse of switching frequency and the ∆IL
is the inductor current ripple. Move the COUT to the left side
to estimate the value of ∆VOUT1 as equation (7).
∆VOUT1 =
VOUT
∆IL ⋅ TS
................................(7)
8 ⋅ COUT
APW7176A
R1
FB
As mentioned above, one part of output voltage ripple is
the product of the inductor current ripple and ESR of output capacitor. The equation (8) explains the output volt-
R2
age ripple estimation.
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Oct., 2012
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APW7176A
Application Information (Cont.)
Layout Consideration
For all switching power supplies, the layout is an important step in the design; especially at high peak currents
and switching frequencies. If the layout is not carefully
done, the regulator might show noise problems and duty
cycle jitter.
1. The input capacitor should be placed close to the VIN
and the GND. Connecting the capacitor and VIN/GND
with short and wide trace without any via holes for good
input voltage filtering.
2. The high current paths (GND1/GND2, IN1/IN2, and SW1/
SW2) should be placed very close to the device with
short, direct and wide traces.
3. To minimize copper trace connections that can inject
noise into the system, the inductor should be placed as
close as possible to the SW pin to minimize the noise
coupling into other circuits.
4. Since the feedback pin and network is a high impedance circuit, the feedback network should be routed
away from the inductor. The feedback pin and feedback
network should be shielded with a ground plane or
trace to minimize noise coupling into this circuit.
5. A star ground connection or ground plane minimizes
ground shifts and noise is recommended.
Copyright  ANPEC Electronics Corp.
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APW7176A
Package Information
TDFN3x3-10
D
Pin 1
b
E
A
D2
A1
A3
L
K
E2
Pin 1 Corner
e
S
Y
M
B
O
L
TDFN3x3-10
MILLIMETERS
INCHES
MIN.
MAX.
MIN.
MAX.
A
0.70
0.80
0.028
0.031
A1
0.00
0.05
0.000
0.002
0.012
A3
0.20 REF
0.008 REF
b
0.18
0.30
0.007
D
2.90
3.10
0.114
0.122
D2
2.20
2.70
0.087
0.106
E
2.90
3.10
0.114
0.122
E2
1.40
1.75
0.055
0.069
e
0.50 BSC
L
0.30
K
0.20
0.020 BSC
0.012
0.50
0.020
0.008
Note : 1. Followed from JEDEC MO-229 VEED-5.
Copyright  ANPEC Electronics Corp.
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APW7176A
Carrier Tape & Reel Dimensions
P0
P2
P1
A
B0
W
F
E1
OD0
K0
A0
A
OD1 B
B
T
SECTION A-A
SECTION B-B
H
A
d
T1
Application
TDFN3x3-10
A
H
330±2.00
50 MIN.
P0
P1
T1
12.4+2.00
-0.00
P2
4.0±0.10
8.0±0.10
2.0±0.05
C
13.0+0.50
-0.20
D0
1.5+0.10
-0.00
d
D
W
E1
F
1.5 MIN.
20.2 MIN.
12.0±0.30
1.75±0.10
5.5±0.05
D1
T
0.6+0.00
-0.40
A0
B0
K0
3.30±0.20
3.30±0.20
1.30±0.20
1.5 MIN.
(mm)
Devices Per Unit
Package Type
Unit
Quantity
TDFN3x3-10
Tape & Reel
3000
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APW7176A
Taping Direction Information
TDFN3x3-10
USER DIRECTION OF FEED
Classification Profile
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APW7176A
Classification Reflow Profiles
Profile Feature
Sn-Pb Eutectic Assembly
Pb-Free Assembly
100 °C
150 °C
60-120 seconds
150 °C
200 °C
60-120 seconds
3 °C/second max.
3°C/second max.
183 °C
60-150 seconds
217 °C
60-150 seconds
See Classification Temp in table 1
See Classification Temp in table 2
Time (tP)** within 5°C of the specified
classification temperature (Tc)
20** seconds
30** seconds
Average ramp-down rate (Tp to Tsmax)
6 °C/second max.
6 °C/second max.
6 minutes max.
8 minutes max.
Preheat & Soak
Temperature min (Tsmin)
Temperature max (Tsmax)
Time (Tsmin to Tsmax) (ts)
Average ramp-up rate
(Tsmax to TP)
Liquidous temperature (TL)
Time at liquidous (tL)
Peak package body Temperature
(Tp)*
Time 25°C to peak temperature
* Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum.
** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum.
Table 1. SnPb Eutectic Process – Classification Temperatures (Tc)
Package
Thickness
<2.5 mm
≥2.5 mm
Volume mm
<350
235 °C
220 °C
3
Volume mm
≥350
220 °C
220 °C
3
Table 2. Pb-free Process – Classification Temperatures (Tc)
Package
Thickness
<1.6 mm
1.6 mm – 2.5 mm
≥2.5 mm
Volume mm
<350
260 °C
260 °C
250 °C
3
Volume mm
350-2000
260 °C
250 °C
245 °C
3
Volume mm
>2000
260 °C
245 °C
245 °C
3
Reliability Test Program
Test item
SOLDERABILITY
HOLT
PCT
TCT
HBM
MM
Latch-Up
Copyright  ANPEC Electronics Corp.
Rev. A.1 - Oct., 2012
Method
JESD-22, B102
JESD-22, A108
JESD-22, A102
JESD-22, A104
MIL-STD-883-3015.7
JESD-22, A115
JESD 78
15
Description
5 Sec, 245°C
1000 Hrs, Bias @ Tj=125°C
168 Hrs, 100%RH, 2atm, 121°C
500 Cycles, -65°C~150°C
VHBM≧2KV
VMM≧200V
10ms, 1tr≧100mA
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APW7176A
Customer Service
Anpec Electronics Corp.
Head Office :
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Copyright  ANPEC Electronics Corp.
Rev. A.1 - Oct., 2012
16
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