SHENZHENFREESCALE AOT7S65

AOT7S65/AOB7S65/AOTF7S65
650V 7A α MOS TM Power Transistor
General Description
The AOT7S65 & AOB7S65 & AOTF7S65 have been fabricated using the advanced αMOSTM high voltage process that is designed to deliver high levels of
performance and robustness in switching applications. By providing low RDS(on), Qg and EOSS along with guaranteed avalanche capability these parts can be
adopted quickly into new and existing offline power supply designs.
Features
VDS @ Tj,max
750V
IDM
30A
RDS(ON),max
0.65Ω
Qg,typ
9.2nC
Eoss @ 400V
2µJ
D
G
S
Absolute Maximum Ratings TA=25°C unless otherwise noted
Parameter
AOT7S65/AOB7S65
Symbol
VDS
Drain-Source Voltage
Gate-Source Voltage
VGS
TC=25°C
Continuous Drain
Current
Pulsed Drain Current
TC=100°C
C
ID
AOTF7S65L
±30
7
5
IDM
30
Units
V
V
7*
7*
5*
5*
A
Avalanche Current C
IAR
1.7
A
Repetitive avalanche energy C
EAR
43
mJ
Single pulsed avalanche energy G
EAS
TC=25°C
Power Dissipation B Derate above 25oC
MOSFET dv/dt ruggedness
H
Peak diode recovery dv/dt
Junction and Storage Temperature Range
Maximum lead temperature for soldering
J
purpose, 1/8" from case for 5 seconds
Thermal Characteristics
Parameter
Maximum Junction-to-Ambient A,D
PD
0.8
TJ, TSTG
TL
Symbol
RθJA
mJ
86
104
dv/dt
RθCS
Maximum Case-to-sink A
Maximum Junction-to-Case
RθJC
* Drain current limited by maximum junction temperature.
1/7
AOTF7S65
650
35
0.3
100
20
-55 to 150
27
W
0.2
o
W/ C
V/ns
°C
°C
300
AOT7S65/AOB7S65
AOTF7S65
AOTF7S65L
Units
65
65
65
°C/W
0.5
1.2
-3.6
-4.7
°C/W
°C/W
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AOT7S65/AOB7S65/AOTF7S65
650V 7A α MOS TM Power Transistor
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
ID=250µA, VGS=0V, TJ=25°C
650
-
-
ID=250µA, VGS=0V, TJ=150°C
700
750
-
V
µA
STATIC PARAMETERS
BVDSS
Drain-Source Breakdown Voltage
IDSS
Zero Gate Voltage Drain Current
VDS=650V, VGS=0V
-
-
1
VDS=520V, TJ=150°C
-
10
-
IGSS
Gate-Body leakage current
VDS=0V, VGS=±30V
-
-
±100
VGS(th)
Gate Threshold Voltage
VDS=5V,ID=250µA
2.6
3.3
4
nΑ
V
RDS(ON)
Static Drain-Source On-Resistance
VGS=10V, ID=3.5A, TJ=25°C
-
0.54
0.65
Ω
VGS=10V, ID=3.5A, TJ=150°C
-
1.48
1.64
Ω
VSD
Diode Forward Voltage
IS=3.5A,VGS=0V, TJ=25°C
-
0.82
-
V
IS
Maximum Body-Diode Continuous Current
-
-
7
A
ISM
Maximum Body-Diode Pulsed CurrentC
-
-
30
A
-
434
-
pF
-
30
-
pF
-
23
-
pF
-
80
-
pF
DYNAMIC PARAMETERS
Input Capacitance
Ciss
Coss
Output Capacitance
Co(er)
Effective output capacitance, energy
related H
Crss
Effective output capacitance, time
related I
Reverse Transfer Capacitance
Rg
Gate resistance
Co(tr)
VGS=0V, VDS=100V, f=1MHz
VGS=0V, VDS=0 to 480V, f=1MHz
VGS=0V, VDS=100V, f=1MHz
-
1
-
pF
VGS=0V, VDS=0V, f=1MHz
-
17.5
-
Ω
-
9.2
-
nC
-
2.5
-
nC
SWITCHING PARAMETERS
Total Gate Charge
Qg
VGS=10V, VDS=480V, ID=3.5A
Qgs
Gate Source Charge
Qgd
Gate Drain Charge
-
2.7
-
nC
tD(on)
Turn-On DelayTime
-
21
-
ns
tr
Turn-On Rise Time
-
14
-
ns
tD(off)
Turn-Off DelayTime
-
55
-
ns
tf
trr
Turn-Off Fall Time
-
15
-
ns
IF=3.5A,dI/dt=100A/µs,VDS=400V
VGS=10V, VDS=400V, ID=3.5A,
RG=25Ω
Body Diode Reverse Recovery Time
Peak Reverse Recovery Current
-
224
-
ns
Irm
IF=3.5A,dI/dt=100A/µs,VDS=400V
-
19
-
Qrr
Body Diode Reverse Recovery Charge IF=3.5A,dI/dt=100A/µs,VDS=400V
-
2.8
-
A
µC
A. The value of R θJA is measured with the device in a still air environment with T A =25°C.
B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation
limit for cases where additional heatsinking is used.
C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C, Ratings are based on low frequency and duty cycles to keep initial TJ
=25°C.
D. The R θJA is the sum of the thermal impedance from junction to case R θJC and case to ambient.
E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max.
F. These curves are based on the junction-to-case thermal impedance which is measured with the device mounted to a large heatsink, assuming a
maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse ratin g.
G. L=60mH, IAS=1.7A, VDD=150V, Starting TJ=25°C
H. Co(er) is a fixed capacitance that gives the same stored energy as Coss while VDS is rising from 0 to 80% V(BR)DSS.
I. Co(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% V(BR)DSS.
J. Wavesoldering only allowed at leads.
2/7
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AOT7S65/AOB7S65/AOTF7S65
650V 7A α MOS TM Power Transistor
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
12
14
7V
10V
12
10
7V
6V
10
6V
8
8
ID (A)
ID (A)
10V
5.5V
6
5.5V
6
5V
4
5V
4
2
VGS=4.5V
2
VGS=4.5V
0
0
0
5
10
15
0
20
5
-55°C
VDS=20V
1.2
RDS(ON) (Ω )
10
125°C
ID(A)
20
1.5
100
1
0.1
25°C
0.9
VGS=10V
0.6
0.3
0.0
0.01
2
4
6
8
0
10
3
VGS(Volts)
Figure 3: Transfer Characteristics
6
9
12
15
ID (A)
Figure 4: On-Resistance vs. Drain Current and
Gate Voltage
1.2
3
2.5
VGS=10V
ID=3.5A
BVDSS (Normalized)
Normalized On-Resistance
15
VDS (Volts)
Figure 2: On-Region Characteristics@125°C
VDS (Volts)
Figure 1: On-Region Characteristics@25°C
2
1.5
1
1.1
1
0.9
0.5
0
-100
-50
0
50
100
150
Temperature (°C)
Figure 5: On-Resistance vs. Junction Temperature
3/7
10
200
0.8
-100
-50
0
50
100
150
200
TJ (oC)
Figure 6: Break Down vs. Junction Temperature
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AOT7S65/AOB7S65/AOTF7S65
650V 7A α MOS TM Power Transistor
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
15
1.0E+02
1.0E+01
12
125°C
VDS=480V
ID=3.5A
1.0E-01
9
VGS (Volts)
IS (A)
1.0E+00
25°C
1.0E-02
6
1.0E-03
3
1.0E-04
1.0E-05
0
0.0
0.2
0.4
0.6
0.8
1.0
0
VSD (Volts)
Figure 7: Body-Diode Characteristics (Note E)
Ciss
12
15
Eoss(uJ)
4
100
Coss
3
Eoss
2
10
Crss
1
1
0
0
0
100
200
300
400
500
VDS (Volts)
Figure 9: Capacitance Characteristics
0
600
100
200
300
400
500
VDS (Volts)
Figure 10: Coss stored Energy
600
100
100
RDS(ON)
limited
10µs
100µs
1
1ms
DC
10µs
RDS(ON)
limited
10
ID (Amps)
10
100µs
1
1ms
DC
10ms
0.1
10ms
0.1
0.1s
TJ(Max)=150°C
TC=25°C
TJ(Max)=150°C
TC=25°C
0.01
1s
0.01
1
10
100
VDS (Volts)
Figure 11: Maximum Forward Biased Safe
Operating Area for AOT(B)7S65 (Note F)
4/7
9
5
1000
Capacitance (pF)
6
Qg (nC)
Figure 8: Gate-Charge Characteristics
10000
ID (Amps)
3
1000
1
10
100
1000
VDS (Volts)
Figure 12: Maximum Forward Biased Safe
Operating Area for AOTF7S65 (Note F)
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AOT7S65/AOB7S65/AOTF7S65
650V 7A α MOS TM Power Transistor
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
100
100
100µs
1
1ms
DC
80
EAS(mJ)
ID (Amps)
10µs
RDS(ON)
limited
10
60
40
10ms
0.1
0.1s
TJ(Max)=150°C
TC=25°C
1s
0.01
20
0
1
10
100
1000
VDS (Volts)
Figure 13: Maximum Forward Biased Safe
Operating Area for AOTF7S65L (Note F)
25
50
75
100
125
150
175
TCASE (°C)
Figure 14: Avalanche energy
Current rating ID(A)
8
6
4
2
0
0
25
50
75
100
125
150
TCASE (°C)
Figure 15: Current De-rating (Note B)
5/7
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AOT7S65/AOB7S65/AOTF7S65
650V 7A α MOS TM Power Transistor
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
Zθ JC Normalized Transient
Thermal Resistance
10
1
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
RθJC=1.2°C/W
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
0.1
PD
0.01
Single Pulse
0.001
0.00001
0.0001
Ton
0.001
0.01
T
0.1
1
10
Pulse Width (s)
Figure 16: Normalized Maximum Transient Thermal Impedance for AOT(B)7S65 (Note F)
Zθ JC Normalized Transient
Thermal Resistance
10
1
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
RθJC=3.6°C/W
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
0.1
PD
0.01
Ton
Single Pulse
0.001
0.00001
0.0001
0.001
0.01
0.1
T
1
10
100
Pulse Width (s)
Figure 17: Normalized Maximum Transient Thermal Impedance for AOTF7S65 (Note F)
Zθ JC Normalized Transient
Thermal Resistance
10
1
D=Ton/T
TJ,PK=TC+PDM.ZθJC.RθJC
RθJC=4.7°C/W
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
0.1
PD
0.01
Ton
Single Pulse
0.001
0.00001
0.0001
0.001
0.01
0.1
1
T
10
100
Pulse Width (s)
Figure 18: Normalized Maximum Transient Thermal Impedance for AOTF7S65L (Note F)
6/7
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AOT7S65/AOB7S65/AOTF7S65
650V 7A α MOS TM Power Transistor
Gate Charge Test Circuit & Waveform
Vgs
Qg
10V
+
+ Vds
VDC
-
Qgs
Qgd
VDC
DUT
-
Vgs
Ig
Charge
Res istive Switching Test Circuit & Waveforms
RL
Vds
Vds
DUT
Vgs
+
VDC
90%
Vdd
-
Rg
10%
Vgs
Vgs
t d(on)
tr
t d(off)
t on
tf
t off
Unclamped Inductive Switching (UIS) Test Circuit & Waveforms
L
EAR= 1/2 LI
Vds
2
AR
BVDSS
Vds
Id
+ Vdd
Vgs
Vgs
I AR
VDC
-
Rg
Id
DUT
Vgs
Vgs
Diode Recovery Tes t Circuit & Waveforms
Qrr = - Idt
Vds +
DUT
Vgs
Vds -
Isd
Vgs
Ig
7/7
L
Isd
+
VDC
-
IF
trr
dI/dt
IRM
Vdd
Vdd
Vds
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